rustc_target/spec/targets/
thumbv7a_nuttx_eabihf.rs

1// Targets Cortex-A7/A8/A9 processors (ARMv7-A)
2//
3// This target assumes that the device has a FPU (Floating Point Unit) and lowers all (single
4// precision) floating point operations to hardware instructions. Cortex-A7/A8/A9 processors
5// support VFPv3-D32 or VFPv4-D32 floating point units with optional double-precision support.
6//
7// This target uses the "hard" floating convention (ABI) where floating point values
8// are passed to/from subroutines via FPU registers (S0, S1, D0, D1, etc.).
9
10use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs};
11
12pub(crate) fn target() -> Target {
13    Target {
14        llvm_target: "thumbv7a-none-eabihf".into(),
15        metadata: TargetMetadata {
16            description: None,
17            tier: Some(3),
18            host_tools: None,
19            std: Some(true),
20        },
21        pointer_width: 32,
22        data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
23        arch: "arm".into(),
24
25        options: TargetOptions {
26            families: cvs!["unix"],
27            os: "nuttx".into(),
28            abi: "eabihf".into(),
29            llvm_floatabi: Some(FloatAbi::Hard),
30            // Cortex-A7/A8/A9 support VFPv3-D32/VFPv4-D32 with optional double-precision
31            // and NEON SIMD instructions
32            features: "+vfp3,+neon".into(),
33            max_atomic_width: Some(64),
34            ..base::thumb::opts()
35        },
36    }
37}