Skip to main content

rustc_target/spec/targets/
powerpc_wrs_vxworks_spe.rs

1use rustc_abi::Endian;
2
3use crate::spec::{
4    Arch, Cc, CfgAbi, LinkerFlavor, Lld, StackProbeType, Target, TargetMetadata, TargetOptions,
5    base,
6};
7
8pub(crate) fn target() -> Target {
9    let mut base = base::vxworks::opts();
10    base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mspe", "--secure-plt"]);
11    base.max_atomic_width = Some(32);
12    base.stack_probes = StackProbeType::Inline;
13
14    Target {
15        llvm_target: "powerpc-unknown-linux-gnuspe".into(),
16        metadata: TargetMetadata {
17            description: None,
18            tier: Some(3),
19            host_tools: Some(false),
20            std: None, // ?
21        },
22        pointer_width: 32,
23        data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
24        arch: Arch::PowerPC,
25        options: TargetOptions {
26            cfg_abi: CfgAbi::Spe,
27            endian: Endian::Big,
28            // feature msync would disable instruction 'fsync' which is not supported by fsl_p1p2
29            features: "+secure-plt,+msync".into(),
30            ..base
31        },
32    }
33}