rustc_target/spec/targets/
i686_unknown_linux_gnu.rs

1use crate::spec::{
2    Cc, LinkerFlavor, Lld, RustcAbi, SanitizerSet, StackProbeType, Target, TargetMetadata, base,
3};
4
5pub(crate) fn target() -> Target {
6    let mut base = base::linux_gnu::opts();
7    base.rustc_abi = Some(RustcAbi::X86Sse2);
8    // Dear distribution packager, if you are changing the base CPU model with the goal of removing
9    // the SSE2 requirement, make sure to also set the `rustc_abi` to `None` above or else the compiler
10    // will complain that the chosen ABI cannot be realized with the given CPU features.
11    // Also note that x86 without SSE2 is *not* considered a Tier 1 target by the Rust project, and
12    // it has some known floating-point correctness issues mostly caused by a lack of people caring
13    // for LLVM's x87 support (double-rounding, value truncation; see
14    // <https://github.com/rust-lang/rust/issues/114479> for details). This can lead to incorrect
15    // math (Rust generally promises exact math, so this can break code in unexpected ways) and it
16    // can lead to memory safety violations if floating-point values are used e.g. to access an
17    // array. If users run into such issues and report bugs upstream and then it turns out that the
18    // bugs are caused by distribution patches, that leads to confusion and frustration.
19    base.cpu = "pentium4".into();
20    base.max_atomic_width = Some(64);
21    base.supported_sanitizers = SanitizerSet::ADDRESS;
22    base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]);
23    base.stack_probes = StackProbeType::Inline;
24
25    Target {
26        llvm_target: "i686-unknown-linux-gnu".into(),
27        metadata: TargetMetadata {
28            description: Some("32-bit Linux (kernel 3.2, glibc 2.17+)".into()),
29            tier: Some(1),
30            host_tools: Some(true),
31            std: Some(true),
32        },
33        pointer_width: 32,
34        data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\
35            i128:128-f64:32:64-f80:32-n8:16:32-S128"
36            .into(),
37        arch: "x86".into(),
38        options: base,
39    }
40}