1use std::fmt;
2
3use rustc_span::Symbol;
4
5use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
6
7#[allow(non_camel_case_types)]
pub enum M68kInlineAsmRegClass { reg, reg_addr, reg_data, }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for M68kInlineAsmRegClass { }
#[automatically_derived]
#[doc(hidden)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for M68kInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for M68kInlineAsmRegClass {
#[inline]
fn clone(&self) -> M68kInlineAsmRegClass { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for M68kInlineAsmRegClass {
fn encode(&self, __encoder: &mut __E) {
let disc =
match *self {
M68kInlineAsmRegClass::reg => { 0usize }
M68kInlineAsmRegClass::reg_addr => { 1usize }
M68kInlineAsmRegClass::reg_data => { 2usize }
};
::rustc_serialize::Encoder::emit_u8(__encoder, disc as u8);
match *self {
M68kInlineAsmRegClass::reg => {}
M68kInlineAsmRegClass::reg_addr => {}
M68kInlineAsmRegClass::reg_data => {}
}
}
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for M68kInlineAsmRegClass {
fn decode(__decoder: &mut __D) -> Self {
match ::rustc_serialize::Decoder::read_u8(__decoder) as usize
{
0usize => { M68kInlineAsmRegClass::reg }
1usize => { M68kInlineAsmRegClass::reg_addr }
2usize => { M68kInlineAsmRegClass::reg_data }
n => {
::core::panicking::panic_fmt(format_args!("invalid enum variant tag while decoding `M68kInlineAsmRegClass`, expected 0..3, actual {0}",
n));
}
}
}
}
};
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for M68kInlineAsmRegClass {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
::core::fmt::Formatter::write_str(f,
match self {
M68kInlineAsmRegClass::reg => "reg",
M68kInlineAsmRegClass::reg_addr => "reg_addr",
M68kInlineAsmRegClass::reg_data => "reg_data",
})
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for M68kInlineAsmRegClass {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for M68kInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for M68kInlineAsmRegClass {
#[inline]
fn eq(&self, other: &M68kInlineAsmRegClass) -> bool {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
__self_discr == __arg1_discr
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for M68kInlineAsmRegClass {
#[inline]
fn partial_cmp(&self, other: &M68kInlineAsmRegClass)
-> ::core::option::Option<::core::cmp::Ordering> {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
::core::cmp::PartialOrd::partial_cmp(&__self_discr, &__arg1_discr)
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for M68kInlineAsmRegClass {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {
let __self_discr = ::core::intrinsics::discriminant_value(self);
::core::hash::Hash::hash(&__self_discr, state)
}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for M68kInlineAsmRegClass where __CTX: crate::HashStableContext {
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self {
M68kInlineAsmRegClass::reg => {}
M68kInlineAsmRegClass::reg_addr => {}
M68kInlineAsmRegClass::reg_data => {}
}
}
}
};
impl M68kInlineAsmRegClass {
pub fn name(self) -> rustc_span::Symbol {
match self {
Self::reg => rustc_span::sym::reg,
Self::reg_addr => rustc_span::sym::reg_addr,
Self::reg_data => rustc_span::sym::reg_data,
}
}
pub fn parse(name: rustc_span::Symbol)
-> Result<Self, &'static [rustc_span::Symbol]> {
match name {
rustc_span::sym::reg => Ok(Self::reg),
rustc_span::sym::reg_addr => Ok(Self::reg_addr),
rustc_span::sym::reg_data => Ok(Self::reg_data),
_ =>
Err(&[rustc_span::sym::reg, rustc_span::sym::reg_addr,
rustc_span::sym::reg_data]),
}
}
}
pub(super) fn regclass_map()
->
rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>> {
use rustc_data_structures::fx::FxHashMap;
use rustc_data_structures::fx::FxIndexSet;
use super::InlineAsmRegClass;
let mut map = FxHashMap::default();
map.insert(InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg),
FxIndexSet::default());
map.insert(InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr),
FxIndexSet::default());
map.insert(InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data),
FxIndexSet::default());
map
}def_reg_class! {
8 M68k M68kInlineAsmRegClass {
9 reg,
10 reg_addr,
11 reg_data,
12 }
13}
14
15impl M68kInlineAsmRegClass {
16 pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
17 &[]
18 }
19
20 pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
21 None
22 }
23
24 pub fn suggest_modifier(
25 self,
26 _arch: InlineAsmArch,
27 _ty: InlineAsmType,
28 ) -> Option<ModifierInfo> {
29 None
30 }
31
32 pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
33 None
34 }
35
36 pub fn supported_types(
37 self,
38 _arch: InlineAsmArch,
39 ) -> &'static [(InlineAsmType, Option<Symbol>)] {
40 match self {
41 Self::reg => {
use super::InlineAsmType::*;
&[(I16, None), (I32, None)]
}types! { _: I16, I32; },
42 Self::reg_data => {
use super::InlineAsmType::*;
&[(I8, None), (I16, None), (I32, None)]
}types! { _: I8, I16, I32; },
43 Self::reg_addr => {
use super::InlineAsmType::*;
&[(I16, None), (I32, None)]
}types! { _: I16, I32; },
44 }
45 }
46}
47
48#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
pub enum M68kInlineAsmReg { d0, d1, d2, d3, d4, d5, d6, d7, a0, a1, a2, a3, }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for M68kInlineAsmReg { }
#[automatically_derived]
#[doc(hidden)]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for M68kInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for M68kInlineAsmReg {
#[inline]
fn clone(&self) -> M68kInlineAsmReg { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for M68kInlineAsmReg {
fn encode(&self, __encoder: &mut __E) {
let disc =
match *self {
M68kInlineAsmReg::d0 => { 0usize }
M68kInlineAsmReg::d1 => { 1usize }
M68kInlineAsmReg::d2 => { 2usize }
M68kInlineAsmReg::d3 => { 3usize }
M68kInlineAsmReg::d4 => { 4usize }
M68kInlineAsmReg::d5 => { 5usize }
M68kInlineAsmReg::d6 => { 6usize }
M68kInlineAsmReg::d7 => { 7usize }
M68kInlineAsmReg::a0 => { 8usize }
M68kInlineAsmReg::a1 => { 9usize }
M68kInlineAsmReg::a2 => { 10usize }
M68kInlineAsmReg::a3 => { 11usize }
};
::rustc_serialize::Encoder::emit_u8(__encoder, disc as u8);
match *self {
M68kInlineAsmReg::d0 => {}
M68kInlineAsmReg::d1 => {}
M68kInlineAsmReg::d2 => {}
M68kInlineAsmReg::d3 => {}
M68kInlineAsmReg::d4 => {}
M68kInlineAsmReg::d5 => {}
M68kInlineAsmReg::d6 => {}
M68kInlineAsmReg::d7 => {}
M68kInlineAsmReg::a0 => {}
M68kInlineAsmReg::a1 => {}
M68kInlineAsmReg::a2 => {}
M68kInlineAsmReg::a3 => {}
}
}
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for M68kInlineAsmReg {
fn decode(__decoder: &mut __D) -> Self {
match ::rustc_serialize::Decoder::read_u8(__decoder) as usize
{
0usize => { M68kInlineAsmReg::d0 }
1usize => { M68kInlineAsmReg::d1 }
2usize => { M68kInlineAsmReg::d2 }
3usize => { M68kInlineAsmReg::d3 }
4usize => { M68kInlineAsmReg::d4 }
5usize => { M68kInlineAsmReg::d5 }
6usize => { M68kInlineAsmReg::d6 }
7usize => { M68kInlineAsmReg::d7 }
8usize => { M68kInlineAsmReg::a0 }
9usize => { M68kInlineAsmReg::a1 }
10usize => { M68kInlineAsmReg::a2 }
11usize => { M68kInlineAsmReg::a3 }
n => {
::core::panicking::panic_fmt(format_args!("invalid enum variant tag while decoding `M68kInlineAsmReg`, expected 0..12, actual {0}",
n));
}
}
}
}
};
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for M68kInlineAsmReg {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
::core::fmt::Formatter::write_str(f,
match self {
M68kInlineAsmReg::d0 => "d0",
M68kInlineAsmReg::d1 => "d1",
M68kInlineAsmReg::d2 => "d2",
M68kInlineAsmReg::d3 => "d3",
M68kInlineAsmReg::d4 => "d4",
M68kInlineAsmReg::d5 => "d5",
M68kInlineAsmReg::d6 => "d6",
M68kInlineAsmReg::d7 => "d7",
M68kInlineAsmReg::a0 => "a0",
M68kInlineAsmReg::a1 => "a1",
M68kInlineAsmReg::a2 => "a2",
M68kInlineAsmReg::a3 => "a3",
})
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for M68kInlineAsmReg {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for M68kInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for M68kInlineAsmReg {
#[inline]
fn eq(&self, other: &M68kInlineAsmReg) -> bool {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
__self_discr == __arg1_discr
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for M68kInlineAsmReg {
#[inline]
fn partial_cmp(&self, other: &M68kInlineAsmReg)
-> ::core::option::Option<::core::cmp::Ordering> {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
::core::cmp::PartialOrd::partial_cmp(&__self_discr, &__arg1_discr)
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for M68kInlineAsmReg {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {
let __self_discr = ::core::intrinsics::discriminant_value(self);
::core::hash::Hash::hash(&__self_discr, state)
}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for M68kInlineAsmReg where __CTX: crate::HashStableContext {
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self {
M68kInlineAsmReg::d0 => {}
M68kInlineAsmReg::d1 => {}
M68kInlineAsmReg::d2 => {}
M68kInlineAsmReg::d3 => {}
M68kInlineAsmReg::d4 => {}
M68kInlineAsmReg::d5 => {}
M68kInlineAsmReg::d6 => {}
M68kInlineAsmReg::d7 => {}
M68kInlineAsmReg::a0 => {}
M68kInlineAsmReg::a1 => {}
M68kInlineAsmReg::a2 => {}
M68kInlineAsmReg::a3 => {}
}
}
}
};
impl M68kInlineAsmReg {
pub fn name(self) -> &'static str {
match self {
Self::d0 => "d0",
Self::d1 => "d1",
Self::d2 => "d2",
Self::d3 => "d3",
Self::d4 => "d4",
Self::d5 => "d5",
Self::d6 => "d6",
Self::d7 => "d7",
Self::a0 => "a0",
Self::a1 => "a1",
Self::a2 => "a2",
Self::a3 => "a3",
}
}
pub fn reg_class(self) -> M68kInlineAsmRegClass {
match self {
Self::d0 => M68kInlineAsmRegClass::reg,
Self::d1 => M68kInlineAsmRegClass::reg,
Self::d2 => M68kInlineAsmRegClass::reg,
Self::d3 => M68kInlineAsmRegClass::reg,
Self::d4 => M68kInlineAsmRegClass::reg,
Self::d5 => M68kInlineAsmRegClass::reg,
Self::d6 => M68kInlineAsmRegClass::reg,
Self::d7 => M68kInlineAsmRegClass::reg,
Self::a0 => M68kInlineAsmRegClass::reg,
Self::a1 => M68kInlineAsmRegClass::reg,
Self::a2 => M68kInlineAsmRegClass::reg,
Self::a3 => M68kInlineAsmRegClass::reg,
}
}
pub fn parse(name: &str) -> Result<Self, &'static str> {
match name {
"d0" => Ok(Self::d0),
"d1" => Ok(Self::d1),
"d2" => Ok(Self::d2),
"d3" => Ok(Self::d3),
"d4" => Ok(Self::d4),
"d5" => Ok(Self::d5),
"d6" => Ok(Self::d6),
"d7" => Ok(Self::d7),
"a0" => Ok(Self::a0),
"a1" => Ok(Self::a1),
"a2" => Ok(Self::a2),
"a3" => Ok(Self::a3),
"a4" =>
Err("a4 is used internally by LLVM and cannot be used as an operand for inline asm"),
"a5" | "bp" =>
Err("a5 is used internally by LLVM and cannot be used as an operand for inline asm"),
"a6" | "fp" =>
Err("a6 is used internally by LLVM and cannot be used as an operand for inline asm"),
"a7" | "sp" | "usp" | "ssp" | "isp" =>
Err("the stack pointer cannot be used as an operand for inline asm"),
_ => Err("unknown register"),
}
}
pub fn validate(self, _arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target, _is_clobber: bool)
-> Result<(), &'static str> {
match self {
Self::d0 => { Ok(()) }
Self::d1 => { Ok(()) }
Self::d2 => { Ok(()) }
Self::d3 => { Ok(()) }
Self::d4 => { Ok(()) }
Self::d5 => { Ok(()) }
Self::d6 => { Ok(()) }
Self::d7 => { Ok(()) }
Self::a0 => { Ok(()) }
Self::a1 => { Ok(()) }
Self::a2 => { Ok(()) }
Self::a3 => { Ok(()) }
}
}
}
pub(super) fn fill_reg_map(_arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target,
_map:
&mut rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>>) {
#[allow(unused_imports)]
use super::{InlineAsmReg, InlineAsmRegClass};
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d0));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d0));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d1));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d1));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d2));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d2));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d3));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d3));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d4));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d4));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d5));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d5));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d6));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d6));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d7));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::d7));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a0));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a0));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a1));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a1));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a2));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a2));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a3));
}
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr))
{
set.insert(InlineAsmReg::M68k(M68kInlineAsmReg::a3));
}
}
}def_regs! {
49 M68k M68kInlineAsmReg M68kInlineAsmRegClass {
50 d0: reg, reg_data = ["d0"],
51 d1: reg, reg_data = ["d1"],
52 d2: reg, reg_data = ["d2"],
53 d3: reg, reg_data = ["d3"],
54 d4: reg, reg_data = ["d4"],
55 d5: reg, reg_data = ["d5"],
56 d6: reg, reg_data = ["d6"],
57 d7: reg, reg_data = ["d7"],
58 a0: reg, reg_addr = ["a0"],
59 a1: reg, reg_addr = ["a1"],
60 a2: reg, reg_addr = ["a2"],
61 a3: reg, reg_addr = ["a3"],
62 #error = ["a4"] =>
63 "a4 is used internally by LLVM and cannot be used as an operand for inline asm",
64 #error = ["a5", "bp"] =>
65 "a5 is used internally by LLVM and cannot be used as an operand for inline asm",
66 #error = ["a6", "fp"] =>
67 "a6 is used internally by LLVM and cannot be used as an operand for inline asm",
68 #error = ["a7", "sp", "usp", "ssp", "isp"] =>
69 "the stack pointer cannot be used as an operand for inline asm",
70 }
71}
72
73impl M68kInlineAsmReg {
74 pub fn emit(
75 self,
76 out: &mut dyn fmt::Write,
77 _arch: InlineAsmArch,
78 _modifier: Option<char>,
79 ) -> fmt::Result {
80 out.write_str(self.name())
81 }
82}