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rustc_target/asm/
nvptx.rs

1use rustc_span::Symbol;
2
3use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
4
5#[allow(non_camel_case_types)]
pub enum NvptxInlineAsmRegClass { reg16, reg32, reg64, }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for NvptxInlineAsmRegClass { }
#[automatically_derived]
#[doc(hidden)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for NvptxInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for NvptxInlineAsmRegClass {
    #[inline]
    fn clone(&self) -> NvptxInlineAsmRegClass { *self }
}
const _: () =
    {
        impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
            for NvptxInlineAsmRegClass {
            fn encode(&self, __encoder: &mut __E) {
                let disc =
                    match *self {
                        NvptxInlineAsmRegClass::reg16 => { 0usize }
                        NvptxInlineAsmRegClass::reg32 => { 1usize }
                        NvptxInlineAsmRegClass::reg64 => { 2usize }
                    };
                ::rustc_serialize::Encoder::emit_u8(__encoder, disc as u8);
                match *self {
                    NvptxInlineAsmRegClass::reg16 => {}
                    NvptxInlineAsmRegClass::reg32 => {}
                    NvptxInlineAsmRegClass::reg64 => {}
                }
            }
        }
    };
const _: () =
    {
        impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
            for NvptxInlineAsmRegClass {
            fn decode(__decoder: &mut __D) -> Self {
                match ::rustc_serialize::Decoder::read_u8(__decoder) as usize
                    {
                    0usize => { NvptxInlineAsmRegClass::reg16 }
                    1usize => { NvptxInlineAsmRegClass::reg32 }
                    2usize => { NvptxInlineAsmRegClass::reg64 }
                    n => {
                        ::core::panicking::panic_fmt(format_args!("invalid enum variant tag while decoding `NvptxInlineAsmRegClass`, expected 0..3, actual {0}",
                                n));
                    }
                }
            }
        }
    };
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for NvptxInlineAsmRegClass {
    #[inline]
    fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
        ::core::fmt::Formatter::write_str(f,
            match self {
                NvptxInlineAsmRegClass::reg16 => "reg16",
                NvptxInlineAsmRegClass::reg32 => "reg32",
                NvptxInlineAsmRegClass::reg64 => "reg64",
            })
    }
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for NvptxInlineAsmRegClass {
    #[inline]
    #[doc(hidden)]
    #[coverage(off)]
    fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for NvptxInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for NvptxInlineAsmRegClass {
    #[inline]
    fn eq(&self, other: &NvptxInlineAsmRegClass) -> bool {
        let __self_discr = ::core::intrinsics::discriminant_value(self);
        let __arg1_discr = ::core::intrinsics::discriminant_value(other);
        __self_discr == __arg1_discr
    }
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for NvptxInlineAsmRegClass {
    #[inline]
    fn partial_cmp(&self, other: &NvptxInlineAsmRegClass)
        -> ::core::option::Option<::core::cmp::Ordering> {
        let __self_discr = ::core::intrinsics::discriminant_value(self);
        let __arg1_discr = ::core::intrinsics::discriminant_value(other);
        ::core::cmp::PartialOrd::partial_cmp(&__self_discr, &__arg1_discr)
    }
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for NvptxInlineAsmRegClass {
    #[inline]
    fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {
        let __self_discr = ::core::intrinsics::discriminant_value(self);
        ::core::hash::Hash::hash(&__self_discr, state)
    }
}
const _: () =
    {
        impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
            for NvptxInlineAsmRegClass where __CTX: crate::HashStableContext {
            #[inline]
            fn hash_stable(&self, __hcx: &mut __CTX,
                __hasher:
                    &mut ::rustc_data_structures::stable_hasher::StableHasher) {
                ::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
                match *self {
                    NvptxInlineAsmRegClass::reg16 => {}
                    NvptxInlineAsmRegClass::reg32 => {}
                    NvptxInlineAsmRegClass::reg64 => {}
                }
            }
        }
    };
impl NvptxInlineAsmRegClass {
    pub fn name(self) -> rustc_span::Symbol {
        match self {
            Self::reg16 => rustc_span::sym::reg16,
            Self::reg32 => rustc_span::sym::reg32,
            Self::reg64 => rustc_span::sym::reg64,
        }
    }
    pub fn parse(name: rustc_span::Symbol)
        -> Result<Self, &'static [rustc_span::Symbol]> {
        match name {
            rustc_span::sym::reg16 => Ok(Self::reg16),
            rustc_span::sym::reg32 => Ok(Self::reg32),
            rustc_span::sym::reg64 => Ok(Self::reg64),
            _ =>
                Err(&[rustc_span::sym::reg16, rustc_span::sym::reg32,
                                rustc_span::sym::reg64]),
        }
    }
}
pub(super) fn regclass_map()
    ->
        rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
        rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>> {
    use rustc_data_structures::fx::FxHashMap;
    use rustc_data_structures::fx::FxIndexSet;
    use super::InlineAsmRegClass;
    let mut map = FxHashMap::default();
    map.insert(InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16),
        FxIndexSet::default());
    map.insert(InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32),
        FxIndexSet::default());
    map.insert(InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64),
        FxIndexSet::default());
    map
}def_reg_class! {
6    Nvptx NvptxInlineAsmRegClass {
7        reg16,
8        reg32,
9        reg64,
10    }
11}
12
13impl NvptxInlineAsmRegClass {
14    pub fn valid_modifiers(self, _arch: InlineAsmArch) -> &'static [char] {
15        &[]
16    }
17
18    pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
19        None
20    }
21
22    pub fn suggest_modifier(
23        self,
24        _arch: InlineAsmArch,
25        _ty: InlineAsmType,
26    ) -> Option<ModifierInfo> {
27        None
28    }
29
30    pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
31        None
32    }
33
34    pub fn supported_types(
35        self,
36        _arch: InlineAsmArch,
37    ) -> &'static [(InlineAsmType, Option<Symbol>)] {
38        match self {
39            Self::reg16 => {
    use super::InlineAsmType::*;
    &[(I8, None), (I16, None)]
}types! { _: I8, I16; },
40            Self::reg32 => {
    use super::InlineAsmType::*;
    &[(I8, None), (I16, None), (I32, None), (F32, None)]
}types! { _: I8, I16, I32, F32; },
41            Self::reg64 => {
    use super::InlineAsmType::*;
    &[(I8, None), (I16, None), (I32, None), (F32, None), (I64, None),
                (F64, None)]
}types! { _: I8, I16, I32, F32, I64, F64; },
42        }
43    }
44}
45
46#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
pub enum NvptxInlineAsmReg {}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for NvptxInlineAsmReg { }
#[automatically_derived]
#[doc(hidden)]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for NvptxInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for NvptxInlineAsmReg {
    #[inline]
    fn clone(&self) -> NvptxInlineAsmReg { *self }
}
const _: () =
    {
        impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
            for NvptxInlineAsmReg {
            fn encode(&self, __encoder: &mut __E) { match *self {} }
        }
    };
const _: () =
    {
        impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
            for NvptxInlineAsmReg {
            fn decode(__decoder: &mut __D) -> Self {
                {
                    ::core::panicking::panic_fmt(format_args!("`NvptxInlineAsmReg` has no variants to decode"));
                }
            }
        }
    };
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for NvptxInlineAsmReg {
    #[inline]
    fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
        match *self {}
    }
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for NvptxInlineAsmReg {
    #[inline]
    #[doc(hidden)]
    #[coverage(off)]
    fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for NvptxInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for NvptxInlineAsmReg {
    #[inline]
    fn eq(&self, other: &NvptxInlineAsmReg) -> bool { match *self {} }
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for NvptxInlineAsmReg {
    #[inline]
    fn partial_cmp(&self, other: &NvptxInlineAsmReg)
        -> ::core::option::Option<::core::cmp::Ordering> {
        match *self {}
    }
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for NvptxInlineAsmReg {
    #[inline]
    fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {
        match *self {}
    }
}
const _: () =
    {
        impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
            for NvptxInlineAsmReg where __CTX: crate::HashStableContext {
            #[inline]
            fn hash_stable(&self, __hcx: &mut __CTX,
                __hasher:
                    &mut ::rustc_data_structures::stable_hasher::StableHasher) {
                ::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
                match *self {}
            }
        }
    };
impl NvptxInlineAsmReg {
    pub fn name(self) -> &'static str { match self {} }
    pub fn reg_class(self) -> NvptxInlineAsmRegClass { match self {} }
    pub fn parse(name: &str) -> Result<Self, &'static str> {
        match name { _ => Err("unknown register"), }
    }
    pub fn validate(self, _arch: super::InlineAsmArch,
        _reloc_model: crate::spec::RelocModel,
        _target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
        _target: &crate::spec::Target, _is_clobber: bool)
        -> Result<(), &'static str> {
        match self {}
    }
}
pub(super) fn fill_reg_map(_arch: super::InlineAsmArch,
    _reloc_model: crate::spec::RelocModel,
    _target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
    _target: &crate::spec::Target,
    _map:
        &mut rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
        rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>>) {
    #[allow(unused_imports)]
    use super::{InlineAsmReg, InlineAsmRegClass};
}def_regs! {
47    // Registers in PTX are declared in the assembly.
48    // There are no predefined registers that one can use.
49    Nvptx NvptxInlineAsmReg NvptxInlineAsmRegClass {}
50}