rustc_target/spec/targets/thumbv6m_none_eabi.rs
1// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
2
3use crate::spec::{FloatAbi, Target, TargetMetadata, TargetOptions, base};
4
5pub(crate) fn target() -> Target {
6 Target {
7 llvm_target: "thumbv6m-none-eabi".into(),
8 metadata: TargetMetadata {
9 description: Some("Bare ARMv6-M".into()),
10 tier: Some(2),
11 host_tools: Some(false),
12 std: Some(false),
13 },
14 pointer_width: 32,
15 data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
16 arch: "arm".into(),
17
18 options: TargetOptions {
19 abi: "eabi".into(),
20 llvm_floatabi: Some(FloatAbi::Soft),
21 // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
22 // with +strict-align.
23 // Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
24 // The resulting atomics are ABI incompatible with atomics backed by libatomic.
25 features: "+strict-align,+atomics-32".into(),
26 // There are no atomic CAS instructions available in the instruction set of the ARMv6-M
27 // architecture
28 atomic_cas: false,
29 ..base::thumb::opts()
30 },
31 }
32}