miri/shims/x86/
sse3.rs

1use rustc_abi::CanonAbi;
2use rustc_middle::ty::Ty;
3use rustc_span::Symbol;
4use rustc_target::callconv::FnAbi;
5
6use crate::*;
7
8impl<'tcx> EvalContextExt<'tcx> for crate::MiriInterpCx<'tcx> {}
9pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
10    fn emulate_x86_sse3_intrinsic(
11        &mut self,
12        link_name: Symbol,
13        abi: &FnAbi<'tcx, Ty<'tcx>>,
14        args: &[OpTy<'tcx>],
15        dest: &MPlaceTy<'tcx>,
16    ) -> InterpResult<'tcx, EmulateItemResult> {
17        let this = self.eval_context_mut();
18        this.expect_target_feature_for_intrinsic(link_name, "sse3")?;
19        // Prefix should have already been checked.
20        let unprefixed_name = link_name.as_str().strip_prefix("llvm.x86.sse3.").unwrap();
21
22        match unprefixed_name {
23            // Used to implement the _mm_lddqu_si128 function.
24            // Reads a 128-bit vector from an unaligned pointer. This intrinsic
25            // is expected to perform better than a regular unaligned read when
26            // the data crosses a cache line, but for Miri this is just a regular
27            // unaligned read.
28            "ldu.dq" => {
29                let [src_ptr] = this.check_shim_sig_lenient(abi, CanonAbi::C, link_name, args)?;
30                let src_ptr = this.read_pointer(src_ptr)?;
31                let dest = dest.force_mplace(this)?;
32
33                this.mem_copy(src_ptr, dest.ptr(), dest.layout.size, /*nonoverlapping*/ true)?;
34            }
35            _ => return interp_ok(EmulateItemResult::NotSupported),
36        }
37        interp_ok(EmulateItemResult::NeedsReturn)
38    }
39}
miri/shims/x86/sse3.rs

miri/shims/x86/
sse3.rs
