rustc_target/asm/
spirv.rs1use rustc_span::Symbol;
2
3use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
4
5#[allow(non_camel_case_types)]
pub enum SpirVInlineAsmRegClass { reg, }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for SpirVInlineAsmRegClass { }
#[automatically_derived]
#[doc(hidden)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for SpirVInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for SpirVInlineAsmRegClass {
#[inline]
fn clone(&self) -> SpirVInlineAsmRegClass { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for SpirVInlineAsmRegClass {
fn encode(&self, __encoder: &mut __E) {
match *self { SpirVInlineAsmRegClass::reg => {} }
}
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for SpirVInlineAsmRegClass {
fn decode(__decoder: &mut __D) -> Self {
SpirVInlineAsmRegClass::reg
}
}
};
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for SpirVInlineAsmRegClass {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
::core::fmt::Formatter::write_str(f, "reg")
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for SpirVInlineAsmRegClass {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for SpirVInlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for SpirVInlineAsmRegClass {
#[inline]
fn eq(&self, other: &SpirVInlineAsmRegClass) -> bool { true }
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for SpirVInlineAsmRegClass {
#[inline]
fn partial_cmp(&self, other: &SpirVInlineAsmRegClass)
-> ::core::option::Option<::core::cmp::Ordering> {
::core::option::Option::Some(::core::cmp::Ordering::Equal)
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for SpirVInlineAsmRegClass {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for SpirVInlineAsmRegClass where __CTX: crate::HashStableContext {
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self { SpirVInlineAsmRegClass::reg => {} }
}
}
};
impl SpirVInlineAsmRegClass {
pub fn name(self) -> rustc_span::Symbol {
match self { Self::reg => rustc_span::sym::reg, }
}
pub fn parse(name: rustc_span::Symbol)
-> Result<Self, &'static [rustc_span::Symbol]> {
match name {
rustc_span::sym::reg => Ok(Self::reg),
_ => Err(&[rustc_span::sym::reg]),
}
}
}
pub(super) fn regclass_map()
->
rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>> {
use rustc_data_structures::fx::FxHashMap;
use rustc_data_structures::fx::FxIndexSet;
use super::InlineAsmRegClass;
let mut map = FxHashMap::default();
map.insert(InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg),
FxIndexSet::default());
map
}def_reg_class! {
6 SpirV SpirVInlineAsmRegClass {
7 reg,
8 }
9}
10
11impl SpirVInlineAsmRegClass {
12 pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
13 &[]
14 }
15
16 pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
17 None
18 }
19
20 pub fn suggest_modifier(
21 self,
22 _arch: InlineAsmArch,
23 _ty: InlineAsmType,
24 ) -> Option<ModifierInfo> {
25 None
26 }
27
28 pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
29 None
30 }
31
32 pub fn supported_types(
33 self,
34 _arch: InlineAsmArch,
35 ) -> &'static [(InlineAsmType, Option<Symbol>)] {
36 match self {
37 Self::reg => {
38 {
use super::InlineAsmType::*;
&[(I8, None), (I16, None), (I32, None), (I64, None), (F32, None),
(F64, None)]
}types! { _: I8, I16, I32, I64, F32, F64; }
39 }
40 }
41 }
42}
43
44#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
pub enum SpirVInlineAsmReg {}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for SpirVInlineAsmReg { }
#[automatically_derived]
#[doc(hidden)]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for SpirVInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for SpirVInlineAsmReg {
#[inline]
fn clone(&self) -> SpirVInlineAsmReg { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for SpirVInlineAsmReg {
fn encode(&self, __encoder: &mut __E) { match *self {} }
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for SpirVInlineAsmReg {
fn decode(__decoder: &mut __D) -> Self {
{
::core::panicking::panic_fmt(format_args!("`SpirVInlineAsmReg` has no variants to decode"));
}
}
}
};
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for SpirVInlineAsmReg {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
match *self {}
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for SpirVInlineAsmReg {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) {}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for SpirVInlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for SpirVInlineAsmReg {
#[inline]
fn eq(&self, other: &SpirVInlineAsmReg) -> bool { match *self {} }
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for SpirVInlineAsmReg {
#[inline]
fn partial_cmp(&self, other: &SpirVInlineAsmReg)
-> ::core::option::Option<::core::cmp::Ordering> {
match *self {}
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for SpirVInlineAsmReg {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) {
match *self {}
}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for SpirVInlineAsmReg where __CTX: crate::HashStableContext {
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self {}
}
}
};
impl SpirVInlineAsmReg {
pub fn name(self) -> &'static str { match self {} }
pub fn reg_class(self) -> SpirVInlineAsmRegClass { match self {} }
pub fn parse(name: &str) -> Result<Self, &'static str> {
match name { _ => Err("unknown register"), }
}
pub fn validate(self, _arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target, _is_clobber: bool)
-> Result<(), &'static str> {
match self {}
}
}
pub(super) fn fill_reg_map(_arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target,
_map:
&mut rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>>) {
#[allow(unused_imports)]
use super::{InlineAsmReg, InlineAsmRegClass};
}def_regs! {
45 SpirV SpirVInlineAsmReg SpirVInlineAsmRegClass {}
47}