rustc_target/spec/targets/
riscv32ima_unknown_none_elf.rs1use crate::spec::{
2 Arch, Cc, LinkerFlavor, Lld, LlvmAbi, PanicStrategy, RelocModel, Target, TargetMetadata,
3 TargetOptions,
4};
5
6pub(crate) fn target() -> Target {
7 Target {
8 data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
9 llvm_target: "riscv32".into(),
10 metadata: TargetMetadata {
11 description: Some("Bare RISC-V (RV32IMA ISA)".into()),
12 tier: Some(3),
13 host_tools: Some(false),
14 std: Some(false),
15 },
16 pointer_width: 32,
17 arch: Arch::RiscV32,
18
19 options: TargetOptions {
20 linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
21 linker: Some("rust-lld".into()),
22 cpu: "generic-rv32".into(),
23 max_atomic_width: Some(32),
24 features: "+m,+a".into(),
25 llvm_abiname: LlvmAbi::Ilp32,
26 panic_strategy: PanicStrategy::Abort,
27 relocation_model: RelocModel::Static,
28 emit_debug_gdb_scripts: false,
29 eh_frame_header: false,
30 ..Default::default()
31 },
32 }
33}