rustc_target/callconv/
sparc64.rs

1use arrayvec::ArrayVec;
2use rustc_abi::{
3    Align, BackendRepr, FieldsShape, Float, HasDataLayout, Primitive, Reg, Size, TyAbiInterface,
4    TyAndLayout, Variants,
5};
6
7use crate::callconv::{ArgAbi, ArgAttribute, CastTarget, FnAbi, Uniform};
8use crate::spec::{HasTargetSpec, Os};
9
10// NOTE: GCC and Clang/LLVM have disagreements that the ABI doesn't resolve, we match the
11// Clang/LLVM behavior in these cases.
12
13#[derive(#[automatically_derived]
impl ::core::marker::Copy for DoubleWord { }Copy, #[automatically_derived]
impl ::core::clone::Clone for DoubleWord {
    #[inline]
    fn clone(&self) -> DoubleWord {
        let _: ::core::clone::AssertParamIsClone<[Word; 2]>;
        *self
    }
}Clone)]
14enum DoubleWord {
15    F64,
16    F128Start,
17    F128End,
18    Words([Word; 2]),
19}
20
21#[derive(#[automatically_derived]
impl ::core::marker::Copy for Word { }Copy, #[automatically_derived]
impl ::core::clone::Clone for Word {
    #[inline]
    fn clone(&self) -> Word { *self }
}Clone)]
22enum Word {
23    F32,
24    Integer,
25}
26
27fn classify<'a, Ty, C>(
28    cx: &C,
29    arg_layout: &TyAndLayout<'a, Ty>,
30    offset: Size,
31    double_words: &mut [DoubleWord; 4],
32) where
33    Ty: TyAbiInterface<'a, C> + Copy,
34    C: HasDataLayout,
35{
36    // If this function does not update the `double_words` array, the value will be passed via
37    // integer registers. The array is initialized with `DoubleWord::Words([Word::Integer; 2])`.
38
39    match arg_layout.backend_repr {
40        BackendRepr::Scalar(scalar) => match scalar.primitive() {
41            Primitive::Float(float) => {
42                if offset.is_aligned(Ord::min(*float.align(cx), Align::EIGHT)) {
43                    let index = offset.bytes_usize() / 8;
44                    match float {
45                        Float::F128 => {
46                            double_words[index] = DoubleWord::F128Start;
47                            double_words[index + 1] = DoubleWord::F128End;
48                        }
49                        Float::F64 => {
50                            double_words[index] = DoubleWord::F64;
51                        }
52                        Float::F32 => match &mut double_words[index] {
53                            DoubleWord::Words(words) => {
54                                words[(offset.bytes_usize() % 8) / 4] = Word::F32;
55                            }
56                            _ => ::core::panicking::panic("internal error: entered unreachable code")unreachable!(),
57                        },
58                        Float::F16 => {
59                            // Match LLVM by passing `f16` in integer registers.
60                        }
61                    }
62                } else {
63                    /* pass unaligned floats in integer registers */
64                }
65            }
66            Primitive::Int(_, _) | Primitive::Pointer(_) => { /* pass in integer registers */ }
67        },
68        BackendRepr::SimdVector { .. } => {}
69        BackendRepr::SimdScalableVector { .. } => {}
70        BackendRepr::ScalarPair(..) | BackendRepr::Memory { .. } => match arg_layout.fields {
71            FieldsShape::Primitive => {
72                {
    ::core::panicking::panic_fmt(format_args!("internal error: entered unreachable code: {0}",
            format_args!("aggregates can\'t have `FieldsShape::Primitive`")));
}unreachable!("aggregates can't have `FieldsShape::Primitive`")
73            }
74            FieldsShape::Union(_) => {
75                if !arg_layout.is_zst() {
76                    if arg_layout.is_transparent() {
77                        let non_1zst_elem = arg_layout.non_1zst_field(cx).expect("not exactly one non-1-ZST field in non-ZST repr(transparent) union").1;
78                        classify(cx, &non_1zst_elem, offset, double_words);
79                    }
80                }
81            }
82            FieldsShape::Array { .. } => {}
83            FieldsShape::Arbitrary { .. } => match arg_layout.variants {
84                Variants::Multiple { .. } => {}
85                Variants::Single { .. } | Variants::Empty => {
86                    // Match Clang by ignoring whether a struct is packed and just considering
87                    // whether individual fields are aligned. GCC currently uses only integer
88                    // registers when passing packed structs.
89                    for i in arg_layout.fields.index_by_increasing_offset() {
90                        classify(
91                            cx,
92                            &arg_layout.field(cx, i),
93                            offset + arg_layout.fields.offset(i),
94                            double_words,
95                        );
96                    }
97                }
98            },
99        },
100    }
101}
102
103fn classify_arg<'a, Ty, C>(
104    cx: &C,
105    arg: &mut ArgAbi<'a, Ty>,
106    in_registers_max: Size,
107    total_double_word_count: &mut usize,
108) where
109    Ty: TyAbiInterface<'a, C> + Copy,
110    C: HasDataLayout,
111{
112    // 64-bit SPARC allocates argument stack space in 64-bit chunks (double words), some of which
113    // are promoted to registers based on their position on the stack.
114
115    // Keep track of the total number of double words used by arguments so far. This allows padding
116    // arguments to be inserted where necessary to ensure that 16-aligned arguments are passed in an
117    // aligned set of registers.
118
119    let pad = !total_double_word_count.is_multiple_of(2) && arg.layout.align.abi.bytes() == 16;
120    // The number of double words used by this argument.
121    let double_word_count = arg.layout.size.bytes_usize().div_ceil(8);
122    // The number of double words before this argument, including any padding.
123    let start_double_word_count = *total_double_word_count + usize::from(pad);
124
125    if arg.layout.pass_indirectly_in_non_rustic_abis(cx) {
126        arg.make_indirect();
127        *total_double_word_count += 1;
128        return;
129    }
130
131    if !arg.layout.is_aggregate() {
132        arg.extend_integer_width_to(64);
133        *total_double_word_count = start_double_word_count + double_word_count;
134        return;
135    }
136
137    let total = arg.layout.size;
138    if total > in_registers_max {
139        arg.make_indirect();
140        *total_double_word_count += 1;
141        return;
142    }
143
144    *total_double_word_count = start_double_word_count + double_word_count;
145
146    const ARGUMENT_REGISTERS: usize = 8;
147
148    let mut double_words = [DoubleWord::Words([Word::Integer; 2]); ARGUMENT_REGISTERS / 2];
149    classify(cx, &arg.layout, Size::ZERO, &mut double_words);
150
151    let mut regs = ArrayVec::new();
152    let mut attrs = ArgAttribute::empty();
153
154    for (index, double_word) in double_words.into_iter().enumerate() {
155        if arg.layout.size.bytes_usize() <= index * 8 {
156            break;
157        }
158        match double_word {
159            // `f128` must be aligned to be assigned a float register.
160            DoubleWord::F128Start if (start_double_word_count + index).is_multiple_of(2) => {
161                regs.push(Reg::f128());
162            }
163            DoubleWord::F128Start => {
164                // Clang currently handles this case nonsensically, always returning a packed
165                // `struct { long double x; }` in an aligned quad floating-point register even when
166                // the `long double` isn't aligned on the stack, which also makes all future
167                // arguments get passed in the wrong registers. This passes the `f128` in integer
168                // registers when it is unaligned, same as with `f32` and `f64`.
169                regs.push(Reg::i64());
170                regs.push(Reg::i64());
171            }
172            DoubleWord::F128End => {} // Already handled by `F128Start`
173            DoubleWord::F64 => regs.push(Reg::f64()),
174            DoubleWord::Words([Word::Integer, Word::Integer]) => regs.push(Reg::i64()),
175            DoubleWord::Words(words) => {
176                attrs |= ArgAttribute::InReg;
177                for word in words {
178                    match word {
179                        Word::F32 => regs.push(Reg::f32()),
180                        Word::Integer => regs.push(Reg::i32()),
181                    }
182                }
183            }
184        }
185    }
186
187    let cast_target = match regs.as_slice() {
188        // Just a single register is needed for this value.
189        [reg] => CastTarget::from(*reg),
190        _ => CastTarget::prefixed(regs, Uniform::new(Reg::i8(), Size::ZERO)),
191    };
192
193    arg.cast_to_and_pad_i32(cast_target.with_attrs(attrs.into()), pad);
194}
195
196pub(crate) fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
197where
198    Ty: TyAbiInterface<'a, C> + Copy,
199    C: HasDataLayout + HasTargetSpec,
200{
201    if !fn_abi.ret.is_ignore() && fn_abi.ret.layout.is_sized() {
202        // A return value of 32 bytes or smaller is passed via registers.
203        classify_arg(cx, &mut fn_abi.ret, Size::from_bytes(32), &mut 0);
204    }
205
206    // sparc64-unknown-linux-{gnu,musl,uclibc} doesn't ignore ZSTs.
207    let passes_zsts = #[allow(non_exhaustive_omitted_patterns)] match cx.target_spec().os {
    Os::Linux => true,
    _ => false,
}matches!(cx.target_spec().os, Os::Linux);
208
209    let mut double_word_count = 0;
210    for arg in fn_abi.args.iter_mut() {
211        if !arg.layout.is_sized() {
212            continue;
213        }
214        if arg.is_ignore() {
215            if passes_zsts && arg.layout.is_zst() {
216                arg.make_indirect_from_ignore();
217                double_word_count += 1;
218            }
219            continue;
220        }
221        // An argument of 16 bytes or smaller is passed via registers.
222        classify_arg(cx, arg, Size::from_bytes(16), &mut double_word_count);
223    }
224}
rustc_target/callconv/sparc64.rs

rustc_target/callconv/
sparc64.rs
