rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs

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1use crate::spec::{
2    LinkSelfContainedDefault, LinkerFlavor, MergeFunctions, PanicStrategy, Target, TargetMetadata,
3    TargetOptions,
4};
5
6pub(crate) fn target() -> Target {
7    Target {
8        arch: "nvptx64".into(),
9        data_layout: "e-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64".into(),
10        llvm_target: "nvptx64-nvidia-cuda".into(),
11        metadata: TargetMetadata {
12            description: Some("--emit=asm generates PTX code that runs on NVIDIA GPUs".into()),
13            tier: Some(2),
14            host_tools: Some(false),
15            std: Some(false),
16        },
17        pointer_width: 64,
18
19        options: TargetOptions {
20            os: "cuda".into(),
21            vendor: "nvidia".into(),
22            linker_flavor: LinkerFlavor::Ptx,
23            // The linker can be installed from `crates.io`.
24            linker: Some("rust-ptx-linker".into()),
25
26            // With `ptx-linker` approach, it can be later overridden via link flags.
27            cpu: "sm_30".into(),
28
29            // FIXME: create tests for the atomics.
30            max_atomic_width: Some(64),
31
32            // Unwinding on CUDA is neither feasible nor useful.
33            panic_strategy: PanicStrategy::Abort,
34
35            // Needed to use `dylib` and `bin` crate types and the linker.
36            dynamic_linking: true,
37
38            // Avoid using dylib because it contain metadata not supported
39            // by LLVM NVPTX backend.
40            only_cdylib: true,
41
42            // Let the `ptx-linker` to handle LLVM lowering into MC / assembly.
43            obj_is_bitcode: true,
44
45            // Convenient and predicable naming scheme.
46            dll_prefix: "".into(),
47            dll_suffix: ".ptx".into(),
48            exe_suffix: ".ptx".into(),
49
50            // Disable MergeFunctions LLVM optimisation pass because it can
51            // produce kernel functions that call other kernel functions.
52            // This behavior is not supported by PTX ISA.
53            merge_functions: MergeFunctions::Disabled,
54
55            // The LLVM backend does not support stack canaries for this target
56            supports_stack_protector: false,
57
58            // Support using `self-contained` linkers like the llvm-bitcode-linker
59            link_self_contained: LinkSelfContainedDefault::True,
60
61            ..Default::default()
62        },
63    }
64}
rustc_target/spec/targets/nvptx64_nvidia_cuda.rs

rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs
