Module core::arch::aarch64[][src]

🔬 This is a nightly-only experimental API. (stdsimd #27731)
This is supported on AArch64 only.

Platform-specific intrinsics for the aarch64 platform.

See the module documentation for more details.

Structs

APSRExperimental

Application Program Status Register

SYExperimental

Full system is the required shareability domain, reads and writes are the required access types

float32x2_tExperimental

ARM-specific 64-bit wide vector of two packed f32.

float32x4_tExperimental

ARM-specific 128-bit wide vector of four packed f32.

float64x1_tExperimental

ARM-specific 64-bit wide vector of one packed f64.

float64x2_tExperimental

ARM-specific 128-bit wide vector of two packed f64.

int8x8_tExperimental

ARM-specific 64-bit wide vector of eight packed i8.

int8x8x2_tExperimental

ARM-specific type containing two int8x8_t vectors.

int8x8x3_tExperimental

ARM-specific type containing three int8x8_t vectors.

int8x8x4_tExperimental

ARM-specific type containing four int8x8_t vectors.

int8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed i8.

int8x16x2_tExperimental

ARM-specific type containing two int8x16_t vectors.

int8x16x3_tExperimental

ARM-specific type containing three int8x16_t vectors.

int8x16x4_tExperimental

ARM-specific type containing four int8x16_t vectors.

int16x4_tExperimental

ARM-specific 64-bit wide vector of four packed i16.

int16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed i16.

int32x2_tExperimental

ARM-specific 64-bit wide vector of two packed i32.

int32x4_tExperimental

ARM-specific 128-bit wide vector of four packed i32.

int64x1_tExperimental

ARM-specific 64-bit wide vector of one packed i64.

int64x2_tExperimental

ARM-specific 128-bit wide vector of two packed i64.

poly8x8_tExperimental

ARM-specific 64-bit wide polynomial vector of eight packed p8.

poly8x8x2_tExperimental

ARM-specific type containing two poly8x8_t vectors.

poly8x8x3_tExperimental

ARM-specific type containing three poly8x8_t vectors.

poly8x8x4_tExperimental

ARM-specific type containing four poly8x8_t vectors.

poly8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed p8.

poly8x16x2_tExperimental

ARM-specific type containing two poly8x16_t vectors.

poly8x16x3_tExperimental

ARM-specific type containing three poly8x16_t vectors.

poly8x16x4_tExperimental

ARM-specific type containing four poly8x16_t vectors.

poly16x4_tExperimental

ARM-specific 64-bit wide vector of four packed p16.

poly16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed p16.

poly64x1_tExperimental

ARM-specific 64-bit wide vector of one packed p64.

poly64x2_tExperimental

ARM-specific 128-bit wide vector of two packed p64.

uint8x8_tExperimental

ARM-specific 64-bit wide vector of eight packed u8.

uint8x8x2_tExperimental

ARM-specific type containing two uint8x8_t vectors.

uint8x8x3_tExperimental

ARM-specific type containing three uint8x8_t vectors.

uint8x8x4_tExperimental

ARM-specific type containing four uint8x8_t vectors.

uint8x16_tExperimental

ARM-specific 128-bit wide vector of sixteen packed u8.

uint8x16x2_tExperimental

ARM-specific type containing two uint8x16_t vectors.

uint8x16x3_tExperimental

ARM-specific type containing three uint8x16_t vectors.

uint8x16x4_tExperimental

ARM-specific type containing four uint8x16_t vectors.

uint16x4_tExperimental

ARM-specific 64-bit wide vector of four packed u16.

uint16x8_tExperimental

ARM-specific 128-bit wide vector of eight packed u16.

uint32x2_tExperimental

ARM-specific 64-bit wide vector of two packed u32.

uint32x4_tExperimental

ARM-specific 128-bit wide vector of four packed u32.

uint64x1_tExperimental

ARM-specific 64-bit wide vector of one packed u64.

uint64x2_tExperimental

ARM-specific 128-bit wide vector of two packed u64.

Constants

_PREFETCH_LOCALITY0Experimental

See prefetch.

_PREFETCH_LOCALITY1Experimental

See prefetch.

_PREFETCH_LOCALITY2Experimental

See prefetch.

_PREFETCH_LOCALITY3Experimental

See prefetch.

_PREFETCH_READExperimental

See prefetch.

_PREFETCH_WRITEExperimental

See prefetch.

_TMFAILURE_CNCLExperimental

Transaction executed a TCANCEL instruction

_TMFAILURE_DBGExperimental

Transaction aborted due to a debug trap.

_TMFAILURE_ERRExperimental

Transaction aborted because a non-permissible operation was attempted

_TMFAILURE_IMPExperimental

Fallback error type for any other reason

_TMFAILURE_INTExperimental

Transaction failed from interrupt

_TMFAILURE_MEMExperimental

Transaction aborted because a conflict occurred

_TMFAILURE_NESTExperimental

Transaction aborted due to transactional nesting level was exceeded

_TMFAILURE_REASONExperimental

Extraction mask for failure reason

_TMFAILURE_RTRYExperimental

Transaction retry is possible.

_TMFAILURE_SIZEExperimental

Transaction aborted due to read or write set limit was exceeded

_TMFAILURE_TRIVIALExperimental

Indicates a TRIVIAL version of TM is available

_TMSTART_SUCCESSExperimental

Transaction successfully started.

Functions

__breakpointExperimental

Inserts a breakpoint instruction.

__crc32cdExperimentalcrc

CRC32-C single round checksum for quad words (64 bits).

__crc32dExperimentalcrc

CRC32 single round checksum for quad words (64 bits).

__dmbExperimental

Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.

__dsbExperimental

Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.

__isbExperimental

Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.

__nopExperimental

Generates an unspecified no-op instruction.

__rsrExperimental

Reads a 32-bit system register

__rsrpExperimental

Reads a system register containing an address

__tcancelExperimentaltme

Cancels the current transaction and discards all state modifications that were performed transactionally.

__tcommitExperimentaltme

Commits the current transaction. For a nested transaction, the only effect is that the transactional nesting depth is decreased. For an outer transaction, the state modifications performed transactionally are committed to the architectural state.

__tstartExperimentaltme

Starts a new transaction. When the transaction starts successfully the return value is 0. If the transaction fails, all state modifications are discarded and a cause of the failure is encoded in the return value.

__ttestExperimentaltme

Tests if executing inside a transaction. If no transaction is currently executing, the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.

__wsrExperimental

Writes a 32-bit system register

__wsrpExperimental

Writes a system register containing an address

_cls_u32Experimental

Counts the leading most significant bits set.

_cls_u64Experimental

Counts the leading most significant bits set.

_clz_u64Experimental

Count Leading Zeros.

_prefetchExperimental

Fetch the cache line that contains address p using the given rw and locality.

_rbit_u64Experimental

Reverse the bit order.

_rev_u16Experimental

Reverse the order of the bytes.

_rev_u32Experimental

Reverse the order of the bytes.

_rev_u64Experimental

Reverse the order of the bytes.

brkExperimental

Generates the trap instruction BRK 1

vabs_s8Experimentalneon

Absolute value (wrapping).

vabs_s16Experimentalneon

Absolute value (wrapping).

vabs_s32Experimentalneon

Absolute value (wrapping).

vabs_s64Experimentalneon

Absolute Value (wrapping).

vabsd_s64Experimentalneon

Absolute Value (wrapping).

vabsq_s8Experimentalneon

Absolute value (wrapping).

vabsq_s16Experimentalneon

Absolute value (wrapping).

vabsq_s32Experimentalneon

Absolute value (wrapping).

vabsq_s64Experimentalneon

Absolute Value (wrapping).

vadd_f32Experimentalneon

Vector add.

vadd_f64Experimentalneon

Vector add.

vadd_s8Experimentalneon

Vector add.

vadd_s16Experimentalneon

Vector add.

vadd_s32Experimentalneon

Vector add.

vadd_s64Experimentalneon

Vector add.

vadd_u8Experimentalneon

Vector add.

vadd_u16Experimentalneon

Vector add.

vadd_u32Experimentalneon

Vector add.

vadd_u64Experimentalneon

Vector add.

vaddd_s64Experimentalneon

Vector add.

vaddd_u64Experimentalneon

Vector add.

vaddhn_high_s16Experimentalneon

Add returning High Narrow (high half).

vaddhn_high_s32Experimentalneon

Add returning High Narrow (high half).

vaddhn_high_s64Experimentalneon

Add returning High Narrow (high half).

vaddhn_high_u16Experimentalneon

Add returning High Narrow (high half).

vaddhn_high_u32Experimentalneon

Add returning High Narrow (high half).

vaddhn_high_u64Experimentalneon

Add returning High Narrow (high half).

vaddhn_s16Experimentalneon

Add returning High Narrow.

vaddhn_s32Experimentalneon

Add returning High Narrow.

vaddhn_s64Experimentalneon

Add returning High Narrow.

vaddhn_u16Experimentalneon

Add returning High Narrow.

vaddhn_u32Experimentalneon

Add returning High Narrow.

vaddhn_u64Experimentalneon

Add returning High Narrow.

vaddl_high_s8Experimentalneon

Signed Add Long (vector, high half).

vaddl_high_s16Experimentalneon

Signed Add Long (vector, high half).

vaddl_high_s32Experimentalneon

Signed Add Long (vector, high half).

vaddl_high_u8Experimentalneon

Unsigned Add Long (vector, high half).

vaddl_high_u16Experimentalneon

Unsigned Add Long (vector, high half).

vaddl_high_u32Experimentalneon

Unsigned Add Long (vector, high half).

vaddl_s8Experimentalneon

Signed Add Long (vector).

vaddl_s16Experimentalneon

Signed Add Long (vector).

vaddl_s32Experimentalneon

Signed Add Long (vector).

vaddl_u8Experimentalneon

Unsigned Add Long (vector).

vaddl_u16Experimentalneon

Unsigned Add Long (vector).

vaddl_u32Experimentalneon

Unsigned Add Long (vector).

vaddq_f32Experimentalneon

Vector add.

vaddq_f64Experimentalneon

Vector add.

vaddq_s8Experimentalneon

Vector add.

vaddq_s16Experimentalneon

Vector add.

vaddq_s32Experimentalneon

Vector add.

vaddq_s64Experimentalneon

Vector add.

vaddq_u8Experimentalneon

Vector add.

vaddq_u16Experimentalneon

Vector add.

vaddq_u32Experimentalneon

Vector add.

vaddq_u64Experimentalneon

Vector add.

vaddv_s8Experimentalneon

Add across vector

vaddv_s16Experimentalneon

Add across vector

vaddv_s32Experimentalneon

Add across vector

vaddv_u8Experimentalneon

Add across vector

vaddv_u16Experimentalneon

Add across vector

vaddv_u32Experimentalneon

Add across vector

vaddvq_s8Experimentalneon

Add across vector

vaddvq_s16Experimentalneon

Add across vector

vaddvq_s32Experimentalneon

Add across vector

vaddvq_s64Experimentalneon

Add across vector

vaddvq_u8Experimentalneon

Add across vector

vaddvq_u16Experimentalneon

Add across vector

vaddvq_u32Experimentalneon

Add across vector

vaddvq_u64Experimentalneon

Add across vector

vaddw_high_s8Experimentalneon

Signed Add Wide (high half).

vaddw_high_s16Experimentalneon

Signed Add Wide (high half).

vaddw_high_s32Experimentalneon

Signed Add Wide (high half).

vaddw_high_u8Experimentalneon

Unsigned Add Wide (high half).

vaddw_high_u16Experimentalneon

Unsigned Add Wide (high half).

vaddw_high_u32Experimentalneon

Unsigned Add Wide (high half).

vaddw_s8Experimentalneon

Signed Add Wide.

vaddw_s16Experimentalneon

Signed Add Wide.

vaddw_s32Experimentalneon

Signed Add Wide.

vaddw_u8Experimentalneon

Unsigned Add Wide.

vaddw_u16Experimentalneon

Unsigned Add Wide.

vaddw_u32Experimentalneon

Unsigned Add Wide.

vand_s8Experimentalneon

Vector bitwise and

vand_s16Experimentalneon

Vector bitwise and

vand_s32Experimentalneon

Vector bitwise and

vand_s64Experimentalneon

Vector bitwise and

vand_u8Experimentalneon

Vector bitwise and

vand_u16Experimentalneon

Vector bitwise and

vand_u32Experimentalneon

Vector bitwise and

vand_u64Experimentalneon

Vector bitwise and

vandq_s8Experimentalneon

Vector bitwise and

vandq_s16Experimentalneon

Vector bitwise and

vandq_s32Experimentalneon

Vector bitwise and

vandq_s64Experimentalneon

Vector bitwise and

vandq_u8Experimentalneon

Vector bitwise and

vandq_u16Experimentalneon

Vector bitwise and

vandq_u32Experimentalneon

Vector bitwise and

vandq_u64Experimentalneon

Vector bitwise and

vceq_f32Experimentalneon

Floating-point compare equal

vceq_f64Experimentalneon

Floating-point compare equal

vceq_p64Experimentalneon

Compare bitwise Equal (vector)

vceq_s8Experimentalneon

Compare bitwise Equal (vector)

vceq_s16Experimentalneon

Compare bitwise Equal (vector)

vceq_s32Experimentalneon

Compare bitwise Equal (vector)

vceq_s64Experimentalneon

Compare bitwise Equal (vector)

vceq_u8Experimentalneon

Compare bitwise Equal (vector)

vceq_u16Experimentalneon

Compare bitwise Equal (vector)

vceq_u32Experimentalneon

Compare bitwise Equal (vector)

vceq_u64Experimentalneon

Compare bitwise Equal (vector)

vceqq_f32Experimentalneon

Floating-point compare equal

vceqq_f64Experimentalneon

Floating-point compare equal

vceqq_p64Experimentalneon

Compare bitwise Equal (vector)

vceqq_s8Experimentalneon

Compare bitwise Equal (vector)

vceqq_s16Experimentalneon

Compare bitwise Equal (vector)

vceqq_s32Experimentalneon

Compare bitwise Equal (vector)

vceqq_s64Experimentalneon

Compare bitwise Equal (vector)

vceqq_u8Experimentalneon

Compare bitwise Equal (vector)

vceqq_u16Experimentalneon

Compare bitwise Equal (vector)

vceqq_u32Experimentalneon

Compare bitwise Equal (vector)

vceqq_u64Experimentalneon

Compare bitwise Equal (vector)

vcge_f32Experimentalneon

Floating-point compare greater than or equal

vcge_f64Experimentalneon

Floating-point compare greater than or equal

vcge_s8Experimentalneon

Compare signed greater than or equal

vcge_s16Experimentalneon

Compare signed greater than or equal

vcge_s32Experimentalneon

Compare signed greater than or equal

vcge_s64Experimentalneon

Compare signed greater than or equal

vcge_u8Experimentalneon

Compare unsigned greater than or equal

vcge_u16Experimentalneon

Compare unsigned greater than or equal

vcge_u32Experimentalneon

Compare unsigned greater than or equal

vcge_u64Experimentalneon

Compare unsigned greater than or equal

vcgeq_f32Experimentalneon

Floating-point compare greater than or equal

vcgeq_f64Experimentalneon

Floating-point compare greater than or equal

vcgeq_s8Experimentalneon

Compare signed greater than or equal

vcgeq_s16Experimentalneon

Compare signed greater than or equal

vcgeq_s32Experimentalneon

Compare signed greater than or equal

vcgeq_s64Experimentalneon

Compare signed greater than or equal

vcgeq_u8Experimentalneon

Compare unsigned greater than or equal

vcgeq_u16Experimentalneon

Compare unsigned greater than or equal

vcgeq_u32Experimentalneon

Compare unsigned greater than or equal

vcgeq_u64Experimentalneon

Compare unsigned greater than or equal

vcgt_f32Experimentalneon

Floating-point compare greater than

vcgt_f64Experimentalneon

Floating-point compare greater than

vcgt_s8Experimentalneon

Compare signed greater than

vcgt_s16Experimentalneon

Compare signed greater than

vcgt_s32Experimentalneon

Compare signed greater than

vcgt_s64Experimentalneon

Compare signed greater than

vcgt_u8Experimentalneon

Compare unsigned highe

vcgt_u16Experimentalneon

Compare unsigned highe

vcgt_u32Experimentalneon

Compare unsigned highe

vcgt_u64Experimentalneon

Compare unsigned highe

vcgtq_f32Experimentalneon

Floating-point compare greater than

vcgtq_f64Experimentalneon

Floating-point compare greater than

vcgtq_s8Experimentalneon

Compare signed greater than

vcgtq_s16Experimentalneon

Compare signed greater than

vcgtq_s32Experimentalneon

Compare signed greater than

vcgtq_s64Experimentalneon

Compare signed greater than

vcgtq_u8Experimentalneon

Compare unsigned highe

vcgtq_u16Experimentalneon

Compare unsigned highe

vcgtq_u32Experimentalneon

Compare unsigned highe

vcgtq_u64Experimentalneon

Compare unsigned highe

vcle_f32Experimentalneon

Floating-point compare less than or equal

vcle_f64Experimentalneon

Floating-point compare less than or equal

vcle_s8Experimentalneon

Compare signed less than or equal

vcle_s16Experimentalneon

Compare signed less than or equal

vcle_s32Experimentalneon

Compare signed less than or equal

vcle_s64Experimentalneon

Compare signed less than or equal

vcle_u8Experimentalneon

Compare unsigned less than or equal

vcle_u16Experimentalneon

Compare unsigned less than or equal

vcle_u32Experimentalneon

Compare unsigned less than or equal

vcle_u64Experimentalneon

Compare unsigned less than or equal

vcleq_f32Experimentalneon

Floating-point compare less than or equal

vcleq_f64Experimentalneon

Floating-point compare less than or equal

vcleq_s8Experimentalneon

Compare signed less than or equal

vcleq_s16Experimentalneon

Compare signed less than or equal

vcleq_s32Experimentalneon

Compare signed less than or equal

vcleq_s64Experimentalneon

Compare signed less than or equal

vcleq_u8Experimentalneon

Compare unsigned less than or equal

vcleq_u16Experimentalneon

Compare unsigned less than or equal

vcleq_u32Experimentalneon

Compare unsigned less than or equal

vcleq_u64Experimentalneon

Compare unsigned less than or equal

vclt_f32Experimentalneon

Floating-point compare less than

vclt_f64Experimentalneon

Floating-point compare less than

vclt_s8Experimentalneon

Compare signed less than

vclt_s16Experimentalneon

Compare signed less than

vclt_s32Experimentalneon

Compare signed less than

vclt_s64Experimentalneon

Compare signed less than

vclt_u8Experimentalneon

Compare unsigned less than

vclt_u16Experimentalneon

Compare unsigned less than

vclt_u32Experimentalneon

Compare unsigned less than

vclt_u64Experimentalneon

Compare unsigned less than

vcltq_f32Experimentalneon

Floating-point compare less than

vcltq_f64Experimentalneon

Floating-point compare less than

vcltq_s8Experimentalneon

Compare signed less than

vcltq_s16Experimentalneon

Compare signed less than

vcltq_s32Experimentalneon

Compare signed less than

vcltq_s64Experimentalneon

Compare signed less than

vcltq_u8Experimentalneon

Compare unsigned less than

vcltq_u16Experimentalneon

Compare unsigned less than

vcltq_u32Experimentalneon

Compare unsigned less than

vcltq_u64Experimentalneon

Compare unsigned less than

vcnt_p8Experimentalneon

Population count per byte.

vcnt_s8Experimentalneon

Population count per byte.

vcnt_u8Experimentalneon

Population count per byte.

vcntq_p8Experimentalneon

Population count per byte.

vcntq_s8Experimentalneon

Population count per byte.

vcntq_u8Experimentalneon

Population count per byte.

vcombine_f32Experimentalneon

Vector combine

vcombine_f64Experimentalneon

Vector combine

vcombine_p8Experimentalneon

Vector combine

vcombine_p16Experimentalneon

Vector combine

vcombine_p64Experimentalneon

Vector combine

vcombine_s8Experimentalneon

Vector combine

vcombine_s16Experimentalneon

Vector combine

vcombine_s32Experimentalneon

Vector combine

vcombine_s64Experimentalneon

Vector combine

vcombine_u8Experimentalneon

Vector combine

vcombine_u16Experimentalneon

Vector combine

vcombine_u32Experimentalneon

Vector combine

vcombine_u64Experimentalneon

Vector combine

vcvtq_s32_f32Experimentalneon
vcvtq_u32_f32Experimentalneon

Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector)

vdupq_n_s8Experimentalneon

Duplicate vector element to vector or scalar

vdupq_n_u8Experimentalneon

Duplicate vector element to vector or scalar

veor_s8Experimentalneon

Vector bitwise exclusive or (vector)

veor_s16Experimentalneon

Vector bitwise exclusive or (vector)

veor_s32Experimentalneon

Vector bitwise exclusive or (vector)

veor_s64Experimentalneon

Vector bitwise exclusive or (vector)

veor_u8Experimentalneon

Vector bitwise exclusive or (vector)

veor_u16Experimentalneon

Vector bitwise exclusive or (vector)

veor_u32Experimentalneon

Vector bitwise exclusive or (vector)

veor_u64Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s8Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s16Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s32Experimentalneon

Vector bitwise exclusive or (vector)

veorq_s64Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u8Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u16Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u32Experimentalneon

Vector bitwise exclusive or (vector)

veorq_u64Experimentalneon

Vector bitwise exclusive or (vector)

vextq_s8Experimentalneon

Extract vector from pair of vectors

vextq_u8Experimentalneon

Extract vector from pair of vectors

vget_lane_u8Experimentalneon

Move vector element to general-purpose register

vget_lane_u64Experimentalneon

Move vector element to general-purpose register

vgetq_lane_s32Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u16Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u32Experimentalneon

Move vector element to general-purpose register

vgetq_lane_u64Experimentalneon

Move vector element to general-purpose register

vhadd_s8Experimentalneon

Halving add

vhadd_s16Experimentalneon

Halving add

vhadd_s32Experimentalneon

Halving add

vhadd_u8Experimentalneon

Halving add

vhadd_u16Experimentalneon

Halving add

vhadd_u32Experimentalneon

Halving add

vhaddq_s8Experimentalneon

Halving add

vhaddq_s16Experimentalneon

Halving add

vhaddq_s32Experimentalneon

Halving add

vhaddq_u8Experimentalneon

Halving add

vhaddq_u16Experimentalneon

Halving add

vhaddq_u32Experimentalneon

Halving add

vhsub_s8Experimentalneon

Signed halving subtract

vhsub_s16Experimentalneon

Signed halving subtract

vhsub_s32Experimentalneon

Signed halving subtract

vhsub_u8Experimentalneon

Signed halving subtract

vhsub_u16Experimentalneon

Signed halving subtract

vhsub_u32Experimentalneon

Signed halving subtract

vhsubq_s8Experimentalneon

Signed halving subtract

vhsubq_s16Experimentalneon

Signed halving subtract

vhsubq_s32Experimentalneon

Signed halving subtract

vhsubq_u8Experimentalneon

Signed halving subtract

vhsubq_u16Experimentalneon

Signed halving subtract

vhsubq_u32Experimentalneon

Signed halving subtract

vld1_dup_f32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_p8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_p16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_s8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_s16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_s32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_s64Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_u8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_u16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_u32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_dup_u64Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1_f32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_f64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_lane_f32Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_p8Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_p16Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_s8Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_s16Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_s32Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_s64Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_u8Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_u16Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_u32Experimentalneon

Load one single-element structure to one lane of one register.

vld1_lane_u64Experimentalneon

Load one single-element structure to one lane of one register.

vld1_p8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_p16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_s8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_s16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_s32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_s64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_u8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_u16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_u32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1_u64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_dup_f32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_p8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_p16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_s8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_s16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_s32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_s64Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_u8Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_u16Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_u32Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_dup_u64Experimentalneon

Load one single-element structure and Replicate to all lanes (of one register).

vld1q_f32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_f64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_lane_f32Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_p8Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_p16Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_s8Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_s16Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_s32Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_s64Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_u8Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_u16Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_u32Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_lane_u64Experimentalneon

Load one single-element structure to one lane of one register.

vld1q_p8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_p16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u8Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u16Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u32Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u64Experimentalneon

Load multiple single-element structures to one, two, three, or four registers.

vmax_f32Experimentalneon

Maximum (vector)

vmax_f64Experimentalneon

Maximum (vector)

vmax_s8Experimentalneon

Maximum (vector)

vmax_s16Experimentalneon

Maximum (vector)

vmax_s32Experimentalneon

Maximum (vector)

vmax_u8Experimentalneon

Maximum (vector)

vmax_u16Experimentalneon

Maximum (vector)

vmax_u32Experimentalneon

Maximum (vector)

vmaxq_f32Experimentalneon

Maximum (vector)

vmaxq_f64Experimentalneon

Maximum (vector)

vmaxq_s8Experimentalneon

Maximum (vector)

vmaxq_s16Experimentalneon

Maximum (vector)

vmaxq_s32Experimentalneon

Maximum (vector)

vmaxq_u8Experimentalneon

Maximum (vector)

vmaxq_u16Experimentalneon

Maximum (vector)

vmaxq_u32Experimentalneon

Maximum (vector)

vmaxv_f32Experimentalneon

Horizontal vector max.

vmaxv_s8Experimentalneon

Horizontal vector max.

vmaxv_s16Experimentalneon

Horizontal vector max.

vmaxv_s32Experimentalneon

Horizontal vector max.

vmaxv_u8Experimentalneon

Horizontal vector max.

vmaxv_u16Experimentalneon

Horizontal vector max.

vmaxv_u32Experimentalneon

Horizontal vector max.

vmaxvq_f32Experimentalneon

Horizontal vector max.

vmaxvq_f64Experimentalneon

Horizontal vector max.

vmaxvq_s8Experimentalneon

Horizontal vector max.

vmaxvq_s16Experimentalneon

Horizontal vector max.

vmaxvq_s32Experimentalneon

Horizontal vector max.

vmaxvq_u8Experimentalneon

Horizontal vector max.

vmaxvq_u16Experimentalneon

Horizontal vector max.

vmaxvq_u32Experimentalneon

Horizontal vector max.

vmin_f32Experimentalneon

Minimum (vector)

vmin_f64Experimentalneon

Minimum (vector)

vmin_s8Experimentalneon

Minimum (vector)

vmin_s16Experimentalneon

Minimum (vector)

vmin_s32Experimentalneon

Minimum (vector)

vmin_u8Experimentalneon

Minimum (vector)

vmin_u16Experimentalneon

Minimum (vector)

vmin_u32Experimentalneon

Minimum (vector)

vminq_f32Experimentalneon

Minimum (vector)

vminq_f64Experimentalneon

Minimum (vector)

vminq_s8Experimentalneon

Minimum (vector)

vminq_s16Experimentalneon

Minimum (vector)

vminq_s32Experimentalneon

Minimum (vector)

vminq_u8Experimentalneon

Minimum (vector)

vminq_u16Experimentalneon

Minimum (vector)

vminq_u32Experimentalneon

Minimum (vector)

vminv_f32Experimentalneon

Horizontal vector min.

vminv_s8Experimentalneon

Horizontal vector min.

vminv_s16Experimentalneon

Horizontal vector min.

vminv_s32Experimentalneon

Horizontal vector min.

vminv_u8Experimentalneon

Horizontal vector min.

vminv_u16Experimentalneon

Horizontal vector min.

vminv_u32Experimentalneon

Horizontal vector min.

vminvq_f32Experimentalneon

Horizontal vector min.

vminvq_f64Experimentalneon

Horizontal vector min.

vminvq_s8Experimentalneon

Horizontal vector min.

vminvq_s16Experimentalneon

Horizontal vector min.

vminvq_s32Experimentalneon

Horizontal vector min.

vminvq_u8Experimentalneon

Horizontal vector min.

vminvq_u16Experimentalneon

Horizontal vector min.

vminvq_u32Experimentalneon

Horizontal vector min.

vmovl_s8Experimentalneon

Vector long move.

vmovl_s16Experimentalneon

Vector long move.

vmovl_s32Experimentalneon

Vector long move.

vmovl_u8Experimentalneon

Vector long move.

vmovl_u16Experimentalneon

Vector long move.

vmovl_u32Experimentalneon

Vector long move.

vmovn_s16Experimentalneon

Vector narrow integer.

vmovn_s32Experimentalneon

Vector narrow integer.

vmovn_s64Experimentalneon

Vector narrow integer.

vmovn_u16Experimentalneon

Vector narrow integer.

vmovn_u32Experimentalneon

Vector narrow integer.

vmovn_u64Experimentalneon

Vector narrow integer.

vmovq_n_u8Experimentalneon

Duplicate vector element to vector or scalar

vmul_f32Experimentalneon

Multiply

vmul_f64Experimentalneon

Multiply

vmul_s8Experimentalneon

Multiply

vmul_s16Experimentalneon

Multiply

vmul_s32Experimentalneon

Multiply

vmul_u8Experimentalneon

Multiply

vmul_u16Experimentalneon

Multiply

vmul_u32Experimentalneon

Multiply

vmull_p64Experimentalneon

Polynomial multiply long

vmulq_f32Experimentalneon

Multiply

vmulq_f64Experimentalneon

Multiply

vmulq_s8Experimentalneon

Multiply

vmulq_s16Experimentalneon

Multiply

vmulq_s32Experimentalneon

Multiply

vmulq_u8Experimentalneon

Multiply

vmulq_u16Experimentalneon

Multiply

vmulq_u32Experimentalneon

Multiply

vmvn_p8Experimentalneon

Vector bitwise not.

vmvn_s8Experimentalneon

Vector bitwise not.

vmvn_s16Experimentalneon

Vector bitwise not.

vmvn_s32Experimentalneon

Vector bitwise not.

vmvn_u8Experimentalneon

Vector bitwise not.

vmvn_u16Experimentalneon

Vector bitwise not.

vmvn_u32Experimentalneon

Vector bitwise not.

vmvnq_p8Experimentalneon

Vector bitwise not.

vmvnq_s8Experimentalneon

Vector bitwise not.

vmvnq_s16Experimentalneon

Vector bitwise not.

vmvnq_s32Experimentalneon

Vector bitwise not.

vmvnq_u8Experimentalneon

Vector bitwise not.

vmvnq_u16Experimentalneon

Vector bitwise not.

vmvnq_u32Experimentalneon

Vector bitwise not.

vorr_s8Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s16Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s32Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_s64Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u8Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u16Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u32Experimentalneon

Vector bitwise or (immediate, inclusive)

vorr_u64Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s8Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s16Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s32Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_s64Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u8Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u16Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u32Experimentalneon

Vector bitwise or (immediate, inclusive)

vorrq_u64Experimentalneon

Vector bitwise or (immediate, inclusive)

vpadal_s8Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadal_s16Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadal_s32Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadal_u8Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadal_u16Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadal_u32Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadalq_s8Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadalq_s16Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadalq_s32Experimentalneon

Signed Add and Accumulate Long Pairwise.

vpadalq_u8Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadalq_u16Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadalq_u32Experimentalneon

Unsigned Add and Accumulate Long Pairwise.

vpadd_s8Experimentalneon

Add pairwise.

vpadd_s16Experimentalneon

Add pairwise.

vpadd_s32Experimentalneon

Add pairwise.

vpadd_u8Experimentalneon

Add pairwise.

vpadd_u16Experimentalneon

Add pairwise.

vpadd_u32Experimentalneon

Add pairwise.

vpaddd_s64Experimentalneon

Add pairwise

vpaddd_u64Experimentalneon

Add pairwise

vpaddl_s8Experimentalneon

Signed Add Long Pairwise.

vpaddl_s16Experimentalneon

Signed Add Long Pairwise.

vpaddl_s32Experimentalneon

Signed Add Long Pairwise.

vpaddl_u8Experimentalneon

Unsigned Add Long Pairwise.

vpaddl_u16Experimentalneon

Unsigned Add Long Pairwise.

vpaddl_u32Experimentalneon

Unsigned Add Long Pairwise.

vpaddlq_s8Experimentalneon

Signed Add Long Pairwise.

vpaddlq_s16Experimentalneon

Signed Add Long Pairwise.

vpaddlq_s32Experimentalneon

Signed Add Long Pairwise.

vpaddlq_u8Experimentalneon

Unsigned Add Long Pairwise.

vpaddlq_u16Experimentalneon

Unsigned Add Long Pairwise.

vpaddlq_u32Experimentalneon

Unsigned Add Long Pairwise.

vpaddq_s8Experimentalneon

Add pairwise

vpaddq_s16Experimentalneon

Add pairwise

vpaddq_s32Experimentalneon

Add pairwise

vpaddq_u8Experimentalneon

Add pairwise

vpaddq_u16Experimentalneon

Add pairwise

vpaddq_u32Experimentalneon

Add pairwise

vpmax_f32Experimentalneon

Folding maximum of adjacent pairs

vpmax_s8Experimentalneon

Folding maximum of adjacent pairs

vpmax_s16Experimentalneon

Folding maximum of adjacent pairs

vpmax_s32Experimentalneon

Folding maximum of adjacent pairs

vpmax_u8Experimentalneon

Folding maximum of adjacent pairs

vpmax_u16Experimentalneon

Folding maximum of adjacent pairs

vpmax_u32Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_f32Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_f64Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s8Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s16Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_s32Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u8Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u16Experimentalneon

Folding maximum of adjacent pairs

vpmaxq_u32Experimentalneon

Folding maximum of adjacent pairs

vpmin_f32Experimentalneon

Folding minimum of adjacent pairs

vpmin_s8Experimentalneon

Folding minimum of adjacent pairs

vpmin_s16Experimentalneon

Folding minimum of adjacent pairs

vpmin_s32Experimentalneon

Folding minimum of adjacent pairs

vpmin_u8Experimentalneon

Folding minimum of adjacent pairs

vpmin_u16Experimentalneon

Folding minimum of adjacent pairs

vpmin_u32Experimentalneon

Folding minimum of adjacent pairs

vpminq_f32Experimentalneon

Folding minimum of adjacent pairs

vpminq_f64Experimentalneon

Folding minimum of adjacent pairs

vpminq_s8Experimentalneon

Folding minimum of adjacent pairs

vpminq_s16Experimentalneon

Folding minimum of adjacent pairs

vpminq_s32Experimentalneon

Folding minimum of adjacent pairs

vpminq_u8Experimentalneon

Folding minimum of adjacent pairs

vpminq_u16Experimentalneon

Folding minimum of adjacent pairs

vpminq_u32Experimentalneon

Folding minimum of adjacent pairs

vqadd_s8Experimentalneon

Saturating add

vqadd_s16Experimentalneon

Saturating add

vqadd_s32Experimentalneon

Saturating add

vqadd_u8Experimentalneon

Saturating add

vqadd_u16Experimentalneon

Saturating add

vqadd_u32Experimentalneon

Saturating add

vqaddq_s8Experimentalneon

Saturating add

vqaddq_s16Experimentalneon

Saturating add

vqaddq_s32Experimentalneon

Saturating add

vqaddq_u8Experimentalneon

Saturating add

vqaddq_u16Experimentalneon

Saturating add

vqaddq_u32Experimentalneon

Saturating add

vqmovn_u64Experimentalneon

Unsigned saturating extract narrow.

vqsub_s8Experimentalneon

Saturating subtract

vqsub_s16Experimentalneon

Saturating subtract

vqsub_s32Experimentalneon

Saturating subtract

vqsub_u8Experimentalneon

Saturating subtract

vqsub_u16Experimentalneon

Saturating subtract

vqsub_u32Experimentalneon

Saturating subtract

vqsubq_s8Experimentalneon

Saturating subtract

vqsubq_s16Experimentalneon

Saturating subtract

vqsubq_s32Experimentalneon

Saturating subtract

vqsubq_u8Experimentalneon

Saturating subtract

vqsubq_u16Experimentalneon

Saturating subtract

vqsubq_u32Experimentalneon

Saturating subtract

vqtbl1_p8Experimentalneon

Table look-up

vqtbl1_s8Experimentalneon

Table look-up

vqtbl1_u8Experimentalneon

Table look-up

vqtbl1q_p8Experimentalneon

Table look-up

vqtbl1q_s8Experimentalneon

Table look-up

vqtbl1q_u8Experimentalneon

Table look-up

vqtbl2_p8Experimentalneon

Table look-up

vqtbl2_s8Experimentalneon

Table look-up

vqtbl2_u8Experimentalneon

Table look-up

vqtbl2q_p8Experimentalneon

Table look-up

vqtbl2q_s8Experimentalneon

Table look-up

vqtbl2q_u8Experimentalneon

Table look-up

vqtbl3_p8Experimentalneon

Table look-up

vqtbl3_s8Experimentalneon

Table look-up

vqtbl3_u8Experimentalneon

Table look-up

vqtbl3q_p8Experimentalneon

Table look-up

vqtbl3q_s8Experimentalneon

Table look-up

vqtbl3q_u8Experimentalneon

Table look-up

vqtbl4_p8Experimentalneon

Table look-up

vqtbl4_s8Experimentalneon

Table look-up

vqtbl4_u8Experimentalneon

Table look-up

vqtbl4q_p8Experimentalneon

Table look-up

vqtbl4q_s8Experimentalneon

Table look-up

vqtbl4q_u8Experimentalneon

Table look-up

vqtbx1_p8Experimentalneon

Extended table look-up

vqtbx1_s8Experimentalneon

Extended table look-up

vqtbx1_u8Experimentalneon

Extended table look-up

vqtbx1q_p8Experimentalneon

Extended table look-up

vqtbx1q_s8Experimentalneon

Extended table look-up

vqtbx1q_u8Experimentalneon

Extended table look-up

vqtbx2_p8Experimentalneon

Extended table look-up

vqtbx2_s8Experimentalneon

Extended table look-up

vqtbx2_u8Experimentalneon

Extended table look-up

vqtbx2q_p8Experimentalneon

Extended table look-up

vqtbx2q_s8Experimentalneon

Extended table look-up

vqtbx2q_u8Experimentalneon

Extended table look-up

vqtbx3_p8Experimentalneon

Extended table look-up

vqtbx3_s8Experimentalneon

Extended table look-up

vqtbx3_u8Experimentalneon

Extended table look-up

vqtbx3q_p8Experimentalneon

Extended table look-up

vqtbx3q_s8Experimentalneon

Extended table look-up

vqtbx3q_u8Experimentalneon

Extended table look-up

vqtbx4_p8Experimentalneon

Extended table look-up

vqtbx4_s8Experimentalneon

Extended table look-up

vqtbx4_u8Experimentalneon

Extended table look-up

vqtbx4q_p8Experimentalneon

Extended table look-up

vqtbx4q_s8Experimentalneon

Extended table look-up

vqtbx4q_u8Experimentalneon

Extended table look-up

vraddhn_high_s16Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_high_s32Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_high_s64Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_high_u16Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_high_u32Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_high_u64Experimentalneon

Rounding Add returning High Narrow (high half).

vraddhn_s16Experimentalneon

Rounding Add returning High Narrow.

vraddhn_s32Experimentalneon

Rounding Add returning High Narrow.

vraddhn_s64Experimentalneon

Rounding Add returning High Narrow.

vraddhn_u16Experimentalneon

Rounding Add returning High Narrow.

vraddhn_u32Experimentalneon

Rounding Add returning High Narrow.

vraddhn_u64Experimentalneon

Rounding Add returning High Narrow.

vreinterpret_u64_u32Experimentalneon

Vector reinterpret cast operation

vreinterpretq_s8_u8Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u8_s8Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u16_u8Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u32_u8Experimentalneon

Vector reinterpret cast operation

vreinterpretq_u64_u8Experimentalneon

Vector reinterpret cast operation

vrev16_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev16_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev16_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev16q_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev16q_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev16q_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev32_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev32_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev32_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev32_u16Experimentalneon

Reversing vector elements (swap endianness)

vrev32q_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev32q_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev32q_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev32q_u16Experimentalneon

Reversing vector elements (swap endianness)

vrev64_f32Experimentalneon

Reversing vector elements (swap endianness)

vrev64_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev64_p16Experimentalneon

Reversing vector elements (swap endianness)

vrev64_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev64_s16Experimentalneon

Reversing vector elements (swap endianness)

vrev64_s32Experimentalneon

Reversing vector elements (swap endianness)

vrev64_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev64_u16Experimentalneon

Reversing vector elements (swap endianness)

vrev64_u32Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_f32Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_p8Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_p16Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_s8Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_s16Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_s32Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_u8Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_u16Experimentalneon

Reversing vector elements (swap endianness)

vrev64q_u32Experimentalneon

Reversing vector elements (swap endianness)

vrhadd_s8Experimentalneon

Rounding halving add

vrhadd_s16Experimentalneon

Rounding halving add

vrhadd_s32Experimentalneon

Rounding halving add

vrhadd_u8Experimentalneon

Rounding halving add

vrhadd_u16Experimentalneon

Rounding halving add

vrhadd_u32Experimentalneon

Rounding halving add

vrhaddq_s8Experimentalneon

Rounding halving add

vrhaddq_s16Experimentalneon

Rounding halving add

vrhaddq_s32Experimentalneon

Rounding halving add

vrhaddq_u8Experimentalneon

Rounding halving add

vrhaddq_u16Experimentalneon

Rounding halving add

vrhaddq_u32Experimentalneon

Rounding halving add

vrsqrte_f32Experimentalneon

Reciprocal square-root estimate.

vshlq_n_u8Experimentalneon

Shift right

vshrq_n_u8Experimentalneon

Unsigned shift right

vsli_n_p8Experimentalneon

Shift Left and Insert (immediate)

vsli_n_p16Experimentalneon

Shift Left and Insert (immediate)

vsli_n_s8Experimentalneon

Shift Left and Insert (immediate)

vsli_n_s16Experimentalneon

Shift Left and Insert (immediate)

vsli_n_s32Experimentalneon

Shift Left and Insert (immediate)

vsli_n_s64Experimentalneon

Shift Left and Insert (immediate)

vsli_n_u8Experimentalneon

Shift Left and Insert (immediate)

vsli_n_u16Experimentalneon

Shift Left and Insert (immediate)

vsli_n_u32Experimentalneon

Shift Left and Insert (immediate)

vsli_n_u64Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_p8Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_p16Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_s8Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_s16Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_s32Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_s64Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_u8Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_u16Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_u32Experimentalneon

Shift Left and Insert (immediate)

vsliq_n_u64Experimentalneon

Shift Left and Insert (immediate)

vsqadd_u8Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqadd_u16Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqadd_u32Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqadd_u64Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqaddq_u8Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqaddq_u16Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqaddq_u32Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsqaddq_u64Experimentalneon

Unsigned saturating Accumulate of Signed value.

vsri_n_p8Experimentalneon

Shift Right and Insert (immediate)

vsri_n_p16Experimentalneon

Shift Right and Insert (immediate)

vsri_n_s8Experimentalneon

Shift Right and Insert (immediate)

vsri_n_s16Experimentalneon

Shift Right and Insert (immediate)

vsri_n_s32Experimentalneon

Shift Right and Insert (immediate)

vsri_n_s64Experimentalneon

Shift Right and Insert (immediate)

vsri_n_u8Experimentalneon

Shift Right and Insert (immediate)

vsri_n_u16Experimentalneon

Shift Right and Insert (immediate)

vsri_n_u32Experimentalneon

Shift Right and Insert (immediate)

vsri_n_u64Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_p8Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_p16Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_s8Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_s16Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_s32Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_s64Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_u8Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_u16Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_u32Experimentalneon

Shift Right and Insert (immediate)

vsriq_n_u64Experimentalneon

Shift Right and Insert (immediate)

vsub_f32Experimentalneon

Subtract

vsub_f64Experimentalneon

Subtract

vsub_s8Experimentalneon

Subtract

vsub_s16Experimentalneon

Subtract

vsub_s32Experimentalneon

Subtract

vsub_s64Experimentalneon

Subtract

vsub_u8Experimentalneon

Subtract

vsub_u16Experimentalneon

Subtract

vsub_u32Experimentalneon

Subtract

vsub_u64Experimentalneon

Subtract

vsubq_f32Experimentalneon

Subtract

vsubq_f64Experimentalneon

Subtract

vsubq_s8Experimentalneon

Subtract

vsubq_s16Experimentalneon

Subtract

vsubq_s32Experimentalneon

Subtract

vsubq_s64Experimentalneon

Subtract

vsubq_u8Experimentalneon

Subtract

vsubq_u16Experimentalneon

Subtract

vsubq_u32Experimentalneon

Subtract

vsubq_u64Experimentalneon

Subtract

vtbl1_p8Experimentalneon

Table look-up

vtbl1_s8Experimentalneon

Table look-up

vtbl1_u8Experimentalneon

Table look-up

vtbl2_p8Experimentalneon

Table look-up

vtbl2_s8Experimentalneon

Table look-up

vtbl2_u8Experimentalneon

Table look-up

vtbl3_p8Experimentalneon

Table look-up

vtbl3_s8Experimentalneon

Table look-up

vtbl3_u8Experimentalneon

Table look-up

vtbl4_p8Experimentalneon

Table look-up

vtbl4_s8Experimentalneon

Table look-up

vtbl4_u8Experimentalneon

Table look-up

vtbx1_p8Experimentalneon

Extended table look-up

vtbx1_s8Experimentalneon

Extended table look-up

vtbx1_u8Experimentalneon

Extended table look-up

vtbx2_p8Experimentalneon

Extended table look-up

vtbx2_s8Experimentalneon

Extended table look-up

vtbx2_u8Experimentalneon

Extended table look-up

vtbx3_p8Experimentalneon

Extended table look-up

vtbx3_s8Experimentalneon

Extended table look-up

vtbx3_u8Experimentalneon

Extended table look-up

vtbx4_p8Experimentalneon

Extended table look-up

vtbx4_s8Experimentalneon

Extended table look-up

vtbx4_u8Experimentalneon

Extended table look-up

vuqadd_s8Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqadd_s16Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqadd_s32Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqadd_s64Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqaddq_s8Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqaddq_s16Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqaddq_s32Experimentalneon

Signed saturating Accumulate of Unsigned value.

vuqaddq_s64Experimentalneon

Signed saturating Accumulate of Unsigned value.