Available on AArch64 only.
Expand description
Platform-specific intrinsics for the aarch64
platform.
See the module documentation for more details.
Structs
APSRExperimental
Application Program Status Register
SYExperimental
Full system is the required shareability domain, reads and writes are the
required access types
float32x2_tExperimental
ARM-specific 64-bit wide vector of two packed
f32
.float32x2x2_tExperimental
ARM-specific type containing two
float32x2_t
vectors.float32x2x3_tExperimental
ARM-specific type containing three
float32x2_t
vectors.float32x2x4_tExperimental
ARM-specific type containing four
float32x2_t
vectors.float32x4_tExperimental
ARM-specific 128-bit wide vector of four packed
f32
.float32x4x2_tExperimental
ARM-specific type containing two
float32x4_t
vectors.float32x4x3_tExperimental
ARM-specific type containing three
float32x4_t
vectors.float32x4x4_tExperimental
ARM-specific type containing four
float32x4_t
vectors.int8x8_tExperimental
ARM-specific 64-bit wide vector of eight packed
i8
.int8x8x2_tExperimental
ARM-specific type containing two
int8x8_t
vectors.int8x8x3_tExperimental
ARM-specific type containing three
int8x8_t
vectors.int8x8x4_tExperimental
ARM-specific type containing four
int8x8_t
vectors.int8x16_tExperimental
ARM-specific 128-bit wide vector of sixteen packed
i8
.int8x16x2_tExperimental
ARM-specific type containing two
int8x16_t
vectors.int8x16x3_tExperimental
ARM-specific type containing three
int8x16_t
vectors.int8x16x4_tExperimental
ARM-specific type containing four
int8x16_t
vectors.int16x4_tExperimental
ARM-specific 64-bit wide vector of four packed
i16
.int16x4x2_tExperimental
ARM-specific type containing two
int16x4_t
vectors.int16x4x3_tExperimental
ARM-specific type containing three
int16x4_t
vectors.int16x4x4_tExperimental
ARM-specific type containing four
int16x4_t
vectors.int16x8_tExperimental
ARM-specific 128-bit wide vector of eight packed
i16
.int16x8x2_tExperimental
ARM-specific type containing two
int16x8_t
vectors.int16x8x3_tExperimental
ARM-specific type containing three
int16x8_t
vectors.int16x8x4_tExperimental
ARM-specific type containing four
int16x8_t
vectors.int32x2_tExperimental
ARM-specific 64-bit wide vector of two packed
i32
.int32x2x2_tExperimental
ARM-specific type containing two
int32x2_t
vectors.int32x2x3_tExperimental
ARM-specific type containing three
int32x2_t
vectors.int32x2x4_tExperimental
ARM-specific type containing four
int32x2_t
vectors.int32x4_tExperimental
ARM-specific 128-bit wide vector of four packed
i32
.int32x4x2_tExperimental
ARM-specific type containing two
int32x4_t
vectors.int32x4x3_tExperimental
ARM-specific type containing three
int32x4_t
vectors.int32x4x4_tExperimental
ARM-specific type containing four
int32x4_t
vectors.int64x1_tExperimental
ARM-specific 64-bit wide vector of one packed
i64
.int64x1x2_tExperimental
ARM-specific type containing four
int64x1_t
vectors.int64x1x3_tExperimental
ARM-specific type containing four
int64x1_t
vectors.int64x1x4_tExperimental
ARM-specific type containing four
int64x1_t
vectors.int64x2_tExperimental
ARM-specific 128-bit wide vector of two packed
i64
.int64x2x2_tExperimental
ARM-specific type containing four
int64x2_t
vectors.int64x2x3_tExperimental
ARM-specific type containing four
int64x2_t
vectors.int64x2x4_tExperimental
ARM-specific type containing four
int64x2_t
vectors.poly8x8_tExperimental
ARM-specific 64-bit wide polynomial vector of eight packed
p8
.poly8x8x2_tExperimental
ARM-specific type containing two
poly8x8_t
vectors.poly8x8x3_tExperimental
ARM-specific type containing three
poly8x8_t
vectors.poly8x8x4_tExperimental
ARM-specific type containing four
poly8x8_t
vectors.poly8x16_tExperimental
ARM-specific 128-bit wide vector of sixteen packed
p8
.poly8x16x2_tExperimental
ARM-specific type containing two
poly8x16_t
vectors.poly8x16x3_tExperimental
ARM-specific type containing three
poly8x16_t
vectors.poly8x16x4_tExperimental
ARM-specific type containing four
poly8x16_t
vectors.poly16x4_tExperimental
ARM-specific 64-bit wide vector of four packed
p16
.poly16x4x2_tExperimental
ARM-specific type containing two
poly16x4_t
vectors.poly16x4x3_tExperimental
ARM-specific type containing three
poly16x4_t
vectors.poly16x4x4_tExperimental
ARM-specific type containing four
poly16x4_t
vectors.poly16x8_tExperimental
ARM-specific 128-bit wide vector of eight packed
p16
.poly16x8x2_tExperimental
ARM-specific type containing two
poly16x8_t
vectors.poly16x8x3_tExperimental
ARM-specific type containing three
poly16x8_t
vectors.poly16x8x4_tExperimental
ARM-specific type containing four
poly16x8_t
vectors.poly64x1_tExperimental
ARM-specific 64-bit wide vector of one packed
p64
.poly64x1x2_tExperimental
ARM-specific type containing four
poly64x1_t
vectors.poly64x1x3_tExperimental
ARM-specific type containing four
poly64x1_t
vectors.poly64x1x4_tExperimental
ARM-specific type containing four
poly64x1_t
vectors.poly64x2_tExperimental
ARM-specific 128-bit wide vector of two packed
p64
.poly64x2x2_tExperimental
ARM-specific type containing four
poly64x2_t
vectors.poly64x2x3_tExperimental
ARM-specific type containing four
poly64x2_t
vectors.poly64x2x4_tExperimental
ARM-specific type containing four
poly64x2_t
vectors.uint8x8_tExperimental
ARM-specific 64-bit wide vector of eight packed
u8
.uint8x8x2_tExperimental
ARM-specific type containing two
uint8x8_t
vectors.uint8x8x3_tExperimental
ARM-specific type containing three
uint8x8_t
vectors.uint8x8x4_tExperimental
ARM-specific type containing four
uint8x8_t
vectors.uint8x16_tExperimental
ARM-specific 128-bit wide vector of sixteen packed
u8
.uint8x16x2_tExperimental
ARM-specific type containing two
uint8x16_t
vectors.uint8x16x3_tExperimental
ARM-specific type containing three
uint8x16_t
vectors.uint8x16x4_tExperimental
ARM-specific type containing four
uint8x16_t
vectors.uint16x4_tExperimental
ARM-specific 64-bit wide vector of four packed
u16
.uint16x4x2_tExperimental
ARM-specific type containing two
uint16x4_t
vectors.uint16x4x3_tExperimental
ARM-specific type containing three
uint16x4_t
vectors.uint16x4x4_tExperimental
ARM-specific type containing four
uint16x4_t
vectors.uint16x8_tExperimental
ARM-specific 128-bit wide vector of eight packed
u16
.uint16x8x2_tExperimental
ARM-specific type containing two
uint16x8_t
vectors.uint16x8x3_tExperimental
ARM-specific type containing three
uint16x8_t
vectors.uint16x8x4_tExperimental
ARM-specific type containing four
uint16x8_t
vectors.uint32x2_tExperimental
ARM-specific 64-bit wide vector of two packed
u32
.uint32x2x2_tExperimental
ARM-specific type containing two
uint32x2_t
vectors.uint32x2x3_tExperimental
ARM-specific type containing three
uint32x2_t
vectors.uint32x2x4_tExperimental
ARM-specific type containing four
uint32x2_t
vectors.uint32x4_tExperimental
ARM-specific 128-bit wide vector of four packed
u32
.uint32x4x2_tExperimental
ARM-specific type containing two
uint32x4_t
vectors.uint32x4x3_tExperimental
ARM-specific type containing three
uint32x4_t
vectors.uint32x4x4_tExperimental
ARM-specific type containing four
uint32x4_t
vectors.uint64x1_tExperimental
ARM-specific 64-bit wide vector of one packed
u64
.uint64x1x2_tExperimental
ARM-specific type containing four
uint64x1_t
vectors.uint64x1x3_tExperimental
ARM-specific type containing four
uint64x1_t
vectors.uint64x1x4_tExperimental
ARM-specific type containing four
uint64x1_t
vectors.uint64x2_tExperimental
ARM-specific 128-bit wide vector of two packed
u64
.uint64x2x2_tExperimental
ARM-specific type containing four
uint64x2_t
vectors.uint64x2x3_tExperimental
ARM-specific type containing four
uint64x2_t
vectors.uint64x2x4_tExperimental
ARM-specific type containing four
uint64x2_t
vectors.ARM-specific 64-bit wide vector of one packed
f64
.ARM-specific type containing two
float64x1_t
vectors.ARM-specific type containing three
float64x1_t
vectors.ARM-specific type containing four
float64x1_t
vectors.ARM-specific 128-bit wide vector of two packed
f64
.ARM-specific type containing two
float64x2_t
vectors.ARM-specific type containing three
float64x2_t
vectors.ARM-specific type containing four
float64x2_t
vectors.Constants
_PREFETCH_LOCALITY0Experimental
See
prefetch
._PREFETCH_LOCALITY1Experimental
See
prefetch
._PREFETCH_LOCALITY2Experimental
See
prefetch
._PREFETCH_LOCALITY3Experimental
See
prefetch
._PREFETCH_READExperimental
See
prefetch
._PREFETCH_WRITEExperimental
See
prefetch
._TMFAILURE_CNCLExperimental
Transaction executed a TCANCEL instruction
_TMFAILURE_DBGExperimental
Transaction aborted due to a debug trap.
_TMFAILURE_ERRExperimental
Transaction aborted because a non-permissible operation was attempted
_TMFAILURE_IMPExperimental
Fallback error type for any other reason
_TMFAILURE_INTExperimental
Transaction failed from interrupt
_TMFAILURE_MEMExperimental
Transaction aborted because a conflict occurred
_TMFAILURE_NESTExperimental
Transaction aborted due to transactional nesting level was exceeded
_TMFAILURE_REASONExperimental
Extraction mask for failure reason
_TMFAILURE_RTRYExperimental
Transaction retry is possible.
_TMFAILURE_SIZEExperimental
Transaction aborted due to read or write set limit was exceeded
_TMFAILURE_TRIVIALExperimental
Indicates a TRIVIAL version of TM is available
_TMSTART_SUCCESSExperimental
Transaction successfully started.
Functions
__breakpoint⚠Experimental
Inserts a breakpoint instruction.
CRC32 single round checksum for bytes (8 bits).
CRC32-C single round checksum for bytes (8 bits).
CRC32-C single round checksum for quad words (64 bits).
CRC32-C single round checksum for half words (16 bits).
CRC32-C single round checksum for words (32 bits).
CRC32 single round checksum for quad words (64 bits).
CRC32 single round checksum for half words (16 bits).
CRC32 single round checksum for words (32 bits).
__dmb⚠Experimental
Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.
__dsb⚠Experimental
Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.
__isb⚠Experimental
Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15
instruction.
__nop⚠Experimental
Generates an unspecified no-op instruction.
__rsr⚠Experimental
Reads a 32-bit system register
__rsrp⚠Experimental
Reads a system register containing an address
__sev⚠Experimental
Generates a SEV (send a global event) hint instruction.
__sevl⚠Experimental
Generates a send a local event hint instruction.
Cancels the current transaction and discards all state modifications that were performed transactionally.
Commits the current transaction. For a nested transaction, the only effect is that the
transactional nesting depth is decreased. For an outer transaction, the state modifications
performed transactionally are committed to the architectural state.
Starts a new transaction. When the transaction starts successfully the return value is 0.
If the transaction fails, all state modifications are discarded and a cause of the failure
is encoded in the return value.
Tests if executing inside a transaction. If no transaction is currently executing,
the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.
__wfe⚠Experimental
Generates a WFE (wait for event) hint instruction, or nothing.
__wfi⚠Experimental
Generates a WFI (wait for interrupt) hint instruction, or nothing.
__wsr⚠Experimental
Writes a 32-bit system register
__wsrp⚠Experimental
Writes a system register containing an address
__yield⚠Experimental
Generates a YIELD hint instruction.
_cls_u32⚠Experimental
Counts the leading most significant bits set.
_cls_u64⚠Experimental
Counts the leading most significant bits set.
_clz_u64⚠Experimental
Count Leading Zeros.
_prefetch⚠Experimental
Fetch the cache line that contains address
p
using the given RW
and LOCALITY
._rbit_u64⚠Experimental
Reverse the bit order.
_rev_u64⚠Experimental
Reverse the order of the bytes.
brk⚠Experimental
Generates the trap instruction
BRK 1
Signed Absolute difference and Accumulate Long
Signed Absolute difference and Accumulate Long
Signed Absolute difference and Accumulate Long
Unsigned Absolute difference and Accumulate Long
Unsigned Absolute difference and Accumulate Long
Unsigned Absolute difference and Accumulate Long
Absolute difference between the arguments of Floating
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Signed Absolute difference Long
Signed Absolute difference Long
Signed Absolute difference Long
Unsigned Absolute difference Long
Unsigned Absolute difference Long
Unsigned Absolute difference Long
Absolute difference between the arguments of Floating
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Absolute difference between the arguments
Floating-point absolute value
Absolute value (wrapping).
Absolute value (wrapping).
Absolute value (wrapping).
Floating-point absolute value
Absolute value (wrapping).
Absolute value (wrapping).
Absolute value (wrapping).
Vector add.
Bitwise exclusive OR
Bitwise exclusive OR
Bitwise exclusive OR
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Add returning High Narrow (high half).
Add returning High Narrow (high half).
Add returning High Narrow (high half).
Add returning High Narrow (high half).
Add returning High Narrow (high half).
Add returning High Narrow (high half).
Add returning High Narrow.
Add returning High Narrow.
Add returning High Narrow.
Add returning High Narrow.
Add returning High Narrow.
Add returning High Narrow.
Signed Add Long (vector, high half).
Signed Add Long (vector, high half).
Signed Add Long (vector, high half).
Unsigned Add Long (vector, high half).
Unsigned Add Long (vector, high half).
Unsigned Add Long (vector, high half).
Signed Add Long (vector).
Signed Add Long (vector).
Signed Add Long (vector).
Unsigned Add Long (vector).
Unsigned Add Long (vector).
Unsigned Add Long (vector).
Vector add.
Bitwise exclusive OR
Bitwise exclusive OR
Bitwise exclusive OR
Bitwise exclusive OR
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Vector add.
Signed Add Wide (high half).
Signed Add Wide (high half).
Signed Add Wide (high half).
Unsigned Add Wide (high half).
Unsigned Add Wide (high half).
Unsigned Add Wide (high half).
Signed Add Wide.
Signed Add Wide.
Signed Add Wide.
Unsigned Add Wide.
Unsigned Add Wide.
Unsigned Add Wide.
AES single round decryption.
AES single round encryption.
AES inverse mix columns.
AES mix columns.
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Vector bitwise and
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Bit clear and exclusive OR
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Vector bitwise bit clear
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register
to the corresponding bit from the first source SIMD&FP register when the original
destination bit was 1, otherwise from the second source SIMD&FP register.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select.
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Bitwise Select. (128-bit)
Floating-point complex add
Floating-point complex add
Floating-point complex add
Floating-point complex add
Floating-point complex add
Floating-point complex add
Floating-point absolute compare greater than or equal
Floating-point absolute compare greater than or equal
Floating-point absolute compare greater than
Floating-point absolute compare greater than
Floating-point absolute compare less than or equal
Floating-point absolute compare less than or equal
Floating-point absolute compare less than
Floating-point absolute compare less than
Floating-point compare equal
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Floating-point compare equal
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Compare bitwise Equal (vector)
Floating-point compare greater than or equal
Compare signed greater than or equal
Compare signed greater than or equal
Compare signed greater than or equal
Compare unsigned greater than or equal
Compare unsigned greater than or equal
Compare unsigned greater than or equal
Floating-point compare greater than or equal
Compare signed greater than or equal
Compare signed greater than or equal
Compare signed greater than or equal
Compare unsigned greater than or equal
Compare unsigned greater than or equal
Compare unsigned greater than or equal
Floating-point compare greater than
Compare signed greater than
Compare signed greater than
Compare signed greater than
Compare unsigned highe
Compare unsigned highe
Compare unsigned highe
Floating-point compare greater than
Compare signed greater than
Compare signed greater than
Compare signed greater than
Compare unsigned highe
Compare unsigned highe
Compare unsigned highe
Floating-point compare less than or equal
Compare signed less than or equal
Compare signed less than or equal
Compare signed less than or equal
Compare unsigned less than or equal
Compare unsigned less than or equal
Compare unsigned less than or equal
Floating-point compare less than or equal
Compare signed less than or equal
Compare signed less than or equal
Compare signed less than or equal
Compare unsigned less than or equal
Compare unsigned less than or equal
Compare unsigned less than or equal
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Count leading sign bits
Floating-point compare less than
Compare signed less than
Compare signed less than
Compare signed less than
Compare unsigned less than
Compare unsigned less than
Compare unsigned less than
Floating-point compare less than
Compare signed less than
Compare signed less than
Compare signed less than
Compare unsigned less than
Compare unsigned less than
Compare unsigned less than
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Count leading zero bits
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Floating-point complex multiply accumulate
Population count per byte.
Population count per byte.
Population count per byte.
Population count per byte.
Population count per byte.
Population count per byte.
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Fixed-point convert to floating-point
Fixed-point convert to floating-point
Floating-point convert to signed fixed-point, rounding toward zero
Floating-point convert to unsigned fixed-point, rounding toward zero
Fixed-point convert to floating-point
Fixed-point convert to floating-point
Floating-point convert to signed fixed-point, rounding toward zero
Floating-point convert to unsigned fixed-point, rounding toward zero
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Dot product arithmetic
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Set all vector lanes to the same value
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Three-way exclusive OR
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Vector bitwise exclusive or (vector)
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Extract vector from pair of vectors
Floating-point fused Multiply-Add to accumulator(vector)
Floating-point fused Multiply-Add to accumulator(vector)
Floating-point fused Multiply-Add to accumulator(vector)
Floating-point fused Multiply-Add to accumulator(vector)
Floating-point fused multiply-subtract from accumulator
Floating-point fused Multiply-subtract to accumulator(vector)
Floating-point fused multiply-subtract from accumulator
Floating-point fused Multiply-subtract to accumulator(vector)
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Move vector element to general-purpose register
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Halving add
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Signed halving subtract
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure and Replicate to all lanes (of one register).
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load one single-element structure to one lane of one register.
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load multiple single-element structures to one, two, three, or four registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load single 2-element structure and replicate to all lanes of two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load multiple 2-element structures to two registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load single 3-element structure and replicate to all lanes of three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load multiple 3-element structures to three registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load single 4-element structure and replicate to all lanes of four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load multiple 4-element structures to four registers
Load SIMD&FP register (immediate offset)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Floating-point Maximum Number (vector)
Floating-point Maximum Number (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Maximum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Floating-point Minimum Number (vector)
Floating-point Minimum Number (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Minimum (vector)
Floating-point multiply-add to accumulator
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Vector widening multiply accumulate with scalar
Signed multiply-add long
Signed multiply-add long
Signed multiply-add long
Unsigned multiply-add long
Unsigned multiply-add long
Unsigned multiply-add long
Floating-point multiply-add to accumulator
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Vector multiply accumulate with scalar
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Multiply-add to accumulator
Floating-point multiply-subtract from accumulator
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Vector widening multiply subtract with scalar
Signed multiply-subtract long
Signed multiply-subtract long
Signed multiply-subtract long
Unsigned multiply-subtract long
Unsigned multiply-subtract long
Unsigned multiply-subtract long
Floating-point multiply-subtract from accumulator
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Vector multiply subtract with scalar
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
Multiply-subtract from accumulator
8-bit integer matrix multiply-accumulate
8-bit integer matrix multiply-accumulate
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Vector long move.
Vector long move.
Vector long move.
Vector long move.
Vector long move.
Vector long move.
Vector narrow integer.
Vector narrow integer.
Vector narrow integer.
Vector narrow integer.
Vector narrow integer.
Vector narrow integer.
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Duplicate vector element to vector or scalar
Multiply
Floating-point multiply
Multiply
Multiply
Multiply
Multiply
Floating-point multiply
Multiply
Multiply
Multiply
Multiply
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Polynomial multiply
Multiply
Multiply
Multiply
Multiply
Multiply
Multiply
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply by scalar
Vector long multiply with scalar
Vector long multiply with scalar
Vector long multiply with scalar
Vector long multiply with scalar
Polynomial multiply long
Signed multiply long
Signed multiply long
Signed multiply long
Unsigned multiply long
Unsigned multiply long
Unsigned multiply long
Multiply
Floating-point multiply
Multiply
Multiply
Multiply
Multiply
Floating-point multiply
Multiply
Multiply
Multiply
Multiply
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Vector multiply by scalar
Polynomial multiply
Multiply
Multiply
Multiply
Multiply
Multiply
Multiply
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Vector bitwise not.
Negate
Negate
Negate
Negate
Negate
Negate
Negate
Negate
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise inclusive OR NOT
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Vector bitwise or (immediate, inclusive)
Signed Add and Accumulate Long Pairwise.
Signed Add and Accumulate Long Pairwise.
Signed Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Signed Add and Accumulate Long Pairwise.
Signed Add and Accumulate Long Pairwise.
Signed Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Unsigned Add and Accumulate Long Pairwise.
Floating-point add pairwise
Add pairwise.
Add pairwise.
Add pairwise.
Add pairwise.
Add pairwise.
Add pairwise.
Signed Add Long Pairwise.
Signed Add Long Pairwise.
Signed Add Long Pairwise.
Unsigned Add Long Pairwise.
Unsigned Add Long Pairwise.
Unsigned Add Long Pairwise.
Signed Add Long Pairwise.
Signed Add Long Pairwise.
Signed Add Long Pairwise.
Unsigned Add Long Pairwise.
Unsigned Add Long Pairwise.
Unsigned Add Long Pairwise.
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding maximum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Folding minimum of adjacent pairs
Singned saturating Absolute value
Singned saturating Absolute value
Singned saturating Absolute value
Singned saturating Absolute value
Singned saturating Absolute value
Singned saturating Absolute value
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Saturating add
Vector widening saturating doubling multiply accumulate with scalar
Vector widening saturating doubling multiply accumulate with scalar
Vector widening saturating doubling multiply accumulate with scalar
Vector widening saturating doubling multiply accumulate with scalar
Signed saturating doubling multiply-add long
Signed saturating doubling multiply-add long
Vector widening saturating doubling multiply subtract with scalar
Vector widening saturating doubling multiply subtract with scalar
Vector widening saturating doubling multiply subtract with scalar
Vector widening saturating doubling multiply subtract with scalar
Signed saturating doubling multiply-subtract long
Signed saturating doubling multiply-subtract long
Vector saturating doubling multiply high by scalar
Vector saturating doubling multiply high by scalar
Vector saturating doubling multiply high with scalar
Vector saturating doubling multiply high with scalar
Signed saturating doubling multiply returning high half
Signed saturating doubling multiply returning high half
Vector saturating doubling multiply high by scalar
Vector saturating doubling multiply high by scalar
Vector saturating doubling multiply high with scalar
Vector saturating doubling multiply high with scalar
Signed saturating doubling multiply returning high half
Signed saturating doubling multiply returning high half
Vector saturating doubling long multiply by scalar
Vector saturating doubling long multiply by scalar
Vector saturating doubling long multiply with scalar
Vector saturating doubling long multiply with scalar
Signed saturating doubling multiply long
Signed saturating doubling multiply long
Signed saturating extract narrow
Signed saturating extract narrow
Signed saturating extract narrow
Unsigned saturating extract narrow
Unsigned saturating extract narrow
Unsigned saturating extract narrow
Signed saturating extract unsigned narrow
Signed saturating extract unsigned narrow
Signed saturating extract unsigned narrow
Signed saturating negate
Signed saturating negate
Signed saturating negate
Signed saturating negate
Signed saturating negate
Signed saturating negate
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector saturating rounding doubling multiply high with scalar
Vector saturating rounding doubling multiply high with scalar
Signed saturating rounding doubling multiply returning high half
Signed saturating rounding doubling multiply returning high half
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector rounding saturating doubling multiply high by scalar
Vector saturating rounding doubling multiply high with scalar
Vector saturating rounding doubling multiply high with scalar
Signed saturating rounding doubling multiply returning high half
Signed saturating rounding doubling multiply returning high half
Signed saturating rounding shift left
Signed saturating rounding shift left
Signed saturating rounding shift left
Signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Signed saturating rounding shift left
Signed saturating rounding shift left
Signed saturating rounding shift left
Signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Unsigned signed saturating rounding shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Signed saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Unsigned saturating shift left
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Saturating subtract
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow (high half).
Rounding Add returning High Narrow.
Rounding Add returning High Narrow.
Rounding Add returning High Narrow.
Rounding Add returning High Narrow.
Rounding Add returning High Narrow.
Rounding Add returning High Narrow.
Rotate and exclusive OR
Reciprocal estimate.
Unsigned reciprocal estimate
Reciprocal estimate.
Unsigned reciprocal estimate
Floating-point reciprocal step
Floating-point reciprocal step
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Vector reinterpret cast operation
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Reversing vector elements (swap endianness)
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Rounding halving add
Floating-point round to 32-bit integer, using current rounding mode
Floating-point round to 32-bit integer, using current rounding mode
Floating-point round to 32-bit integer toward zero
Floating-point round to 32-bit integer toward zero
Floating-point round to 64-bit integer, using current rounding mode
Floating-point round to 64-bit integer, using current rounding mode
Floating-point round to 64-bit integer toward zero
Floating-point round to 64-bit integer toward zero
Floating-point round to integral, to nearest with ties to even
Floating-point round to integral, to nearest with ties to even
Signed rounding shift left
Signed rounding shift left
Signed rounding shift left
Signed rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Signed rounding shift left
Signed rounding shift left
Signed rounding shift left
Signed rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Unsigned rounding shift left
Signed rounding shift right
Signed rounding shift right
Signed rounding shift right
Signed rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Rounding shift right narrow
Rounding shift right narrow
Rounding shift right narrow
Signed rounding shift right
Signed rounding shift right
Signed rounding shift right
Signed rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Unsigned rounding shift right
Reciprocal square-root estimate.
Unsigned reciprocal square root estimate
Reciprocal square-root estimate.
Unsigned reciprocal square root estimate
Floating-point reciprocal square root step
Floating-point reciprocal square root step
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Signed rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Unsigned rounding shift right and accumulate
Rounding subtract returning high narrow
Rounding subtract returning high narrow
Rounding subtract returning high narrow
Rounding subtract returning high narrow
Rounding subtract returning high narrow
Rounding subtract returning high narrow
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
Insert vector element from another vector element
SHA1 hash update accelerator, choose.
SHA1 fixed rotate.
SHA1 hash update accelerator, majority.
SHA1 hash update accelerator, parity.
SHA1 schedule update accelerator, first part.
SHA1 schedule update accelerator, second part.
SHA256 hash update accelerator, upper part.
SHA256 hash update accelerator.
SHA256 schedule update accelerator, first part.
SHA256 schedule update accelerator, second part.
SHA512 hash update part 2
SHA512 hash update part 1
SHA512 schedule update 0
SHA512 schedule update 1
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Signed Shift left
Signed Shift left
Signed Shift left
Signed Shift left
Unsigned Shift left
Unsigned Shift left
Unsigned Shift left
Unsigned Shift left
Signed shift left long
Signed shift left long
Signed shift left long
Signed shift left long
Signed shift left long
Signed shift left long
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Shift left
Signed Shift left
Signed Shift left
Signed Shift left
Signed Shift left
Unsigned Shift left
Unsigned Shift left
Unsigned Shift left
Unsigned Shift left
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right narrow
Shift right narrow
Shift right narrow
Shift right narrow
Shift right narrow
Shift right narrow
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
Shift right
SM3PARTW1
SM3PARTW2
SM3SS1
SM3TT1A
SM3TT1B
SM3TT2A
SM3TT2B
SM4 key
SM4 encode
Signed shift right and accumulate
Signed shift right and accumulate
Signed shift right and accumulate
Signed shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Signed shift right and accumulate
Signed shift right and accumulate
Signed shift right and accumulate
Signed shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Unsigned shift right and accumulate
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures from one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple single-element structures to one, two, three, or four registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 2-element structures from two registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 3-element structures from three registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store multiple 4-element structures from four registers
Store SIMD&FP register (immediate offset)
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Subtract returning high narrow
Signed Subtract Long
Signed Subtract Long
Signed Subtract Long
Unsigned Subtract Long
Unsigned Subtract Long
Unsigned Subtract Long
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Subtract
Signed Subtract Wide
Signed Subtract Wide
Signed Subtract Wide
Unsigned Subtract Wide
Unsigned Subtract Wide
Unsigned Subtract Wide
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Transpose elements
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Signed compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Unsigned compare bitwise Test bits nonzero
Unsigned and signed 8-bit integer matrix multiply-accumulate
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Unzip vectors
Exclusive OR and rotate
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
Zip vectors
vabal_high_s8⚠
neon
Signed Absolute difference and Accumulate Long
vabal_high_s16⚠
neon
Signed Absolute difference and Accumulate Long
vabal_high_s32⚠
neon
Signed Absolute difference and Accumulate Long
vabal_high_u8⚠
neon
Unsigned Absolute difference and Accumulate Long
vabal_high_u16⚠
neon
Unsigned Absolute difference and Accumulate Long
vabal_high_u32⚠
neon
Unsigned Absolute difference and Accumulate Long
vabd_f64⚠
neon
Absolute difference between the arguments of Floating
vabdd_f64⚠
neon
Floating-point absolute difference
vabdl_high_s8⚠
neon
Signed Absolute difference Long
vabdl_high_s16⚠
neon
Signed Absolute difference Long
vabdl_high_s32⚠
neon
Signed Absolute difference Long
vabdl_high_u8⚠
neon
Unsigned Absolute difference Long
vabdl_high_u16⚠
neon
Unsigned Absolute difference Long
vabdl_high_u32⚠
neon
Unsigned Absolute difference Long
vabdq_f64⚠
neon
Absolute difference between the arguments of Floating
vabds_f32⚠
neon
Floating-point absolute difference
vabs_f64⚠
neon
Floating-point absolute value
vabs_s64⚠
neon
Absolute Value (wrapping).
vabsd_s64⚠
neon
Absolute Value (wrapping).
vabsq_f64⚠
neon
Floating-point absolute value
vabsq_s64⚠
neon
Absolute Value (wrapping).
vadd_f64⚠
neon
Vector add.
vadd_s64⚠
neon
Vector add.
vadd_u64⚠
neon
Vector add.
vaddd_s64⚠
neon
Vector add.
vaddd_u64⚠
neon
Vector add.
vaddlv_s8⚠
neon
Signed Add Long across Vector
vaddlv_s16⚠
neon
Signed Add Long across Vector
vaddlv_s32⚠
neon
Signed Add Long across Vector
vaddlv_u8⚠
neon
Unsigned Add Long across Vector
vaddlv_u16⚠
neon
Unsigned Add Long across Vector
vaddlv_u32⚠
neon
Unsigned Add Long across Vector
vaddlvq_s8⚠
neon
Signed Add Long across Vector
vaddlvq_s16⚠
neon
Signed Add Long across Vector
vaddlvq_s32⚠
neon
Signed Add Long across Vector
vaddlvq_u8⚠
neon
Unsigned Add Long across Vector
vaddlvq_u16⚠
neon
Unsigned Add Long across Vector
vaddlvq_u32⚠
neon
Unsigned Add Long across Vector
vaddq_f64⚠
neon
Vector add.
vaddv_f32⚠
neon
Floating-point add across vector
vaddv_s8⚠
neon
Add across vector
vaddv_s16⚠
neon
Add across vector
vaddv_s32⚠
neon
Add across vector
vaddv_u8⚠
neon
Add across vector
vaddv_u16⚠
neon
Add across vector
vaddv_u32⚠
neon
Add across vector
vaddvq_f32⚠
neon
Floating-point add across vector
vaddvq_f64⚠
neon
Floating-point add across vector
vaddvq_s8⚠
neon
Add across vector
vaddvq_s16⚠
neon
Add across vector
vaddvq_s32⚠
neon
Add across vector
vaddvq_s64⚠
neon
Add across vector
vaddvq_u8⚠
neon
Add across vector
vaddvq_u16⚠
neon
Add across vector
vaddvq_u32⚠
neon
Add across vector
vaddvq_u64⚠
neon
Add across vector
vbsl_f64⚠
neon
Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register
to the corresponding bit from the first source SIMD&FP register when the original
destination bit was 1, otherwise from the second source SIMD&FP register.
vbsl_p64⚠
neon
Bitwise Select.
vbslq_f64⚠
neon
Bitwise Select. (128-bit)
vbslq_p64⚠
neon
Bitwise Select. (128-bit)
vcage_f64⚠
neon
Floating-point absolute compare greater than or equal
vcaged_f64⚠
neon
Floating-point absolute compare greater than or equal
vcageq_f64⚠
neon
Floating-point absolute compare greater than or equal
vcages_f32⚠
neon
Floating-point absolute compare greater than or equal
vcagt_f64⚠
neon
Floating-point absolute compare greater than
vcagtd_f64⚠
neon
Floating-point absolute compare greater than
vcagtq_f64⚠
neon
Floating-point absolute compare greater than
vcagts_f32⚠
neon
Floating-point absolute compare greater than
vcale_f64⚠
neon
Floating-point absolute compare less than or equal
vcaled_f64⚠
neon
Floating-point absolute compare less than or equal
vcaleq_f64⚠
neon
Floating-point absolute compare less than or equal
vcales_f32⚠
neon
Floating-point absolute compare less than or equal
vcalt_f64⚠
neon
Floating-point absolute compare less than
vcaltd_f64⚠
neon
Floating-point absolute compare less than
vcaltq_f64⚠
neon
Floating-point absolute compare less than
vcalts_f32⚠
neon
Floating-point absolute compare less than
vceq_f64⚠
neon
Floating-point compare equal
vceq_p64⚠
neon
Compare bitwise Equal (vector)
vceq_s64⚠
neon
Compare bitwise Equal (vector)
vceq_u64⚠
neon
Compare bitwise Equal (vector)
vceqd_f64⚠
neon
Floating-point compare equal
vceqd_s64⚠
neon
Compare bitwise equal
vceqd_u64⚠
neon
Compare bitwise equal
vceqq_f64⚠
neon
Floating-point compare equal
vceqq_p64⚠
neon
Compare bitwise Equal (vector)
vceqq_s64⚠
neon
Compare bitwise Equal (vector)
vceqq_u64⚠
neon
Compare bitwise Equal (vector)
vceqs_f32⚠
neon
Floating-point compare equal
vceqz_f32⚠
neon
Floating-point compare bitwise equal to zero
vceqz_f64⚠
neon
Floating-point compare bitwise equal to zero
vceqz_p8⚠
neon
Signed compare bitwise equal to zero
vceqz_p64⚠
neon
Signed compare bitwise equal to zero
vceqz_s8⚠
neon
Signed compare bitwise equal to zero
vceqz_s16⚠
neon
Signed compare bitwise equal to zero
vceqz_s32⚠
neon
Signed compare bitwise equal to zero
vceqz_s64⚠
neon
Signed compare bitwise equal to zero
vceqz_u8⚠
neon
Unsigned compare bitwise equal to zero
vceqz_u16⚠
neon
Unsigned compare bitwise equal to zero
vceqz_u32⚠
neon
Unsigned compare bitwise equal to zero
vceqz_u64⚠
neon
Unsigned compare bitwise equal to zero
vceqzd_f64⚠
neon
Floating-point compare bitwise equal to zero
vceqzd_s64⚠
neon
Compare bitwise equal to zero
vceqzd_u64⚠
neon
Compare bitwise equal to zero
vceqzq_f32⚠
neon
Floating-point compare bitwise equal to zero
vceqzq_f64⚠
neon
Floating-point compare bitwise equal to zero
vceqzq_p8⚠
neon
Signed compare bitwise equal to zero
vceqzq_p64⚠
neon
Signed compare bitwise equal to zero
vceqzq_s8⚠
neon
Signed compare bitwise equal to zero
vceqzq_s16⚠
neon
Signed compare bitwise equal to zero
vceqzq_s32⚠
neon
Signed compare bitwise equal to zero
vceqzq_s64⚠
neon
Signed compare bitwise equal to zero
vceqzq_u8⚠
neon
Unsigned compare bitwise equal to zero
vceqzq_u16⚠
neon
Unsigned compare bitwise equal to zero