rustc_hir_typeck/
inline_asm.rs

1use rustc_abi::FieldIdx;
2use rustc_ast::InlineAsmTemplatePiece;
3use rustc_data_structures::fx::FxIndexSet;
4use rustc_hir::def_id::DefId;
5use rustc_hir::{self as hir, LangItem};
6use rustc_middle::bug;
7use rustc_middle::ty::{self, Article, FloatTy, IntTy, Ty, TyCtxt, TypeVisitableExt, UintTy};
8use rustc_session::lint;
9use rustc_span::def_id::LocalDefId;
10use rustc_span::{ErrorGuaranteed, Span, Symbol, sym};
11use rustc_target::asm::{
12    InlineAsmReg, InlineAsmRegClass, InlineAsmRegOrRegClass, InlineAsmType, ModifierInfo,
13};
14use rustc_trait_selection::infer::InferCtxtExt;
15
16use crate::FnCtxt;
17use crate::errors::RegisterTypeUnstable;
18
19pub(crate) struct InlineAsmCtxt<'a, 'tcx> {
20    target_features: &'tcx FxIndexSet<Symbol>,
21    fcx: &'a FnCtxt<'a, 'tcx>,
22}
23
24enum NonAsmTypeReason<'tcx> {
25    UnevaluatedSIMDArrayLength(DefId, ty::Const<'tcx>),
26    Invalid(Ty<'tcx>),
27    InvalidElement(DefId, Ty<'tcx>),
28    NotSizedPtr(Ty<'tcx>),
29    EmptySIMDArray(Ty<'tcx>),
30    Tainted(ErrorGuaranteed),
31}
32
33impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> {
34    pub(crate) fn new(fcx: &'a FnCtxt<'a, 'tcx>, def_id: LocalDefId) -> Self {
35        InlineAsmCtxt { target_features: fcx.tcx.asm_target_features(def_id), fcx }
36    }
37
38    fn tcx(&self) -> TyCtxt<'tcx> {
39        self.fcx.tcx
40    }
41
42    fn expr_ty(&self, expr: &hir::Expr<'tcx>) -> Ty<'tcx> {
43        let ty = self.fcx.typeck_results.borrow().expr_ty_adjusted(expr);
44        let ty = self.fcx.try_structurally_resolve_type(expr.span, ty);
45        if ty.has_non_region_infer() {
46            Ty::new_misc_error(self.tcx())
47        } else {
48            self.tcx().erase_and_anonymize_regions(ty)
49        }
50    }
51
52    // FIXME(compiler-errors): This could use `<$ty as Pointee>::Metadata == ()`
53    fn is_thin_ptr_ty(&self, span: Span, ty: Ty<'tcx>) -> bool {
54        // Type still may have region variables, but `Sized` does not depend
55        // on those, so just erase them before querying.
56        if self.fcx.type_is_sized_modulo_regions(self.fcx.param_env, ty) {
57            return true;
58        }
59        if let ty::Foreign(..) = self.fcx.try_structurally_resolve_type(span, ty).kind() {
60            return true;
61        }
62        false
63    }
64
65    fn get_asm_ty(
66        &self,
67        span: Span,
68        ty: Ty<'tcx>,
69    ) -> Result<InlineAsmType, NonAsmTypeReason<'tcx>> {
70        let asm_ty_isize = match self.tcx().sess.target.pointer_width {
71            16 => InlineAsmType::I16,
72            32 => InlineAsmType::I32,
73            64 => InlineAsmType::I64,
74            width => bug!("unsupported pointer width: {width}"),
75        };
76
77        match *ty.kind() {
78            ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => Ok(InlineAsmType::I8),
79            ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => Ok(InlineAsmType::I16),
80            ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => Ok(InlineAsmType::I32),
81            ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => Ok(InlineAsmType::I64),
82            ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => Ok(InlineAsmType::I128),
83            ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => Ok(asm_ty_isize),
84            ty::Float(FloatTy::F16) => Ok(InlineAsmType::F16),
85            ty::Float(FloatTy::F32) => Ok(InlineAsmType::F32),
86            ty::Float(FloatTy::F64) => Ok(InlineAsmType::F64),
87            ty::Float(FloatTy::F128) => Ok(InlineAsmType::F128),
88            ty::FnPtr(..) => Ok(asm_ty_isize),
89            ty::RawPtr(elem_ty, _) => {
90                if self.is_thin_ptr_ty(span, elem_ty) {
91                    Ok(asm_ty_isize)
92                } else {
93                    Err(NonAsmTypeReason::NotSizedPtr(ty))
94                }
95            }
96            ty::Adt(adt, args) if adt.repr().simd() => {
97                if !adt.is_struct() {
98                    let guar = self.fcx.dcx().span_delayed_bug(
99                        span,
100                        format!("repr(simd) should only be used on structs, got {}", adt.descr()),
101                    );
102                    return Err(NonAsmTypeReason::Tainted(guar));
103                }
104
105                let fields = &adt.non_enum_variant().fields;
106                if fields.is_empty() {
107                    return Err(NonAsmTypeReason::EmptySIMDArray(ty));
108                }
109                let field = &fields[FieldIdx::ZERO];
110                let elem_ty = field.ty(self.tcx(), args);
111
112                let (size, ty) = match *elem_ty.kind() {
113                    ty::Array(ty, len) => {
114                        // FIXME: `try_structurally_resolve_const` doesn't eval consts
115                        // in the old solver.
116                        let len = if self.fcx.next_trait_solver() {
117                            self.fcx.try_structurally_resolve_const(span, len)
118                        } else {
119                            self.fcx.tcx.normalize_erasing_regions(
120                                self.fcx.typing_env(self.fcx.param_env),
121                                len,
122                            )
123                        };
124                        if let Some(len) = len.try_to_target_usize(self.tcx()) {
125                            (len, ty)
126                        } else {
127                            return Err(NonAsmTypeReason::UnevaluatedSIMDArrayLength(
128                                field.did, len,
129                            ));
130                        }
131                    }
132                    _ => (fields.len() as u64, elem_ty),
133                };
134
135                match ty.kind() {
136                    ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => Ok(InlineAsmType::VecI8(size)),
137                    ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => Ok(InlineAsmType::VecI16(size)),
138                    ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => Ok(InlineAsmType::VecI32(size)),
139                    ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => Ok(InlineAsmType::VecI64(size)),
140                    ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => {
141                        Ok(InlineAsmType::VecI128(size))
142                    }
143                    ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => {
144                        Ok(match self.tcx().sess.target.pointer_width {
145                            16 => InlineAsmType::VecI16(size),
146                            32 => InlineAsmType::VecI32(size),
147                            64 => InlineAsmType::VecI64(size),
148                            width => bug!("unsupported pointer width: {width}"),
149                        })
150                    }
151                    ty::Float(FloatTy::F16) => Ok(InlineAsmType::VecF16(size)),
152                    ty::Float(FloatTy::F32) => Ok(InlineAsmType::VecF32(size)),
153                    ty::Float(FloatTy::F64) => Ok(InlineAsmType::VecF64(size)),
154                    ty::Float(FloatTy::F128) => Ok(InlineAsmType::VecF128(size)),
155                    _ => Err(NonAsmTypeReason::InvalidElement(field.did, ty)),
156                }
157            }
158            ty::Infer(_) => bug!("unexpected infer ty in asm operand"),
159            _ => Err(NonAsmTypeReason::Invalid(ty)),
160        }
161    }
162
163    fn check_asm_operand_type(
164        &self,
165        idx: usize,
166        reg: InlineAsmRegOrRegClass,
167        expr: &'tcx hir::Expr<'tcx>,
168        template: &[InlineAsmTemplatePiece],
169        is_input: bool,
170        tied_input: Option<(&'tcx hir::Expr<'tcx>, Option<InlineAsmType>)>,
171    ) -> Option<InlineAsmType> {
172        let ty = self.expr_ty(expr);
173        if ty.has_non_region_infer() {
174            bug!("inference variable in asm operand ty: {:?} {:?}", expr, ty);
175        }
176
177        let asm_ty = match *ty.kind() {
178            // `!` is allowed for input but not for output (issue #87802)
179            ty::Never if is_input => return None,
180            _ if ty.references_error() => return None,
181            ty::Adt(adt, args) if self.tcx().is_lang_item(adt.did(), LangItem::MaybeUninit) => {
182                let fields = &adt.non_enum_variant().fields;
183                let ty = fields[FieldIdx::ONE].ty(self.tcx(), args);
184                // FIXME: Are we just trying to map to the `T` in `MaybeUninit<T>`?
185                // If so, just get it from the args.
186                let ty::Adt(ty, args) = ty.kind() else {
187                    unreachable!("expected first field of `MaybeUninit` to be an ADT")
188                };
189                assert!(
190                    ty.is_manually_drop(),
191                    "expected first field of `MaybeUninit` to be `ManuallyDrop`"
192                );
193                let fields = &ty.non_enum_variant().fields;
194                let ty = fields[FieldIdx::ZERO].ty(self.tcx(), args);
195                self.get_asm_ty(expr.span, ty)
196            }
197            _ => self.get_asm_ty(expr.span, ty),
198        };
199        let asm_ty = match asm_ty {
200            Ok(asm_ty) => asm_ty,
201            Err(reason) => {
202                match reason {
203                    NonAsmTypeReason::UnevaluatedSIMDArrayLength(did, len) => {
204                        let msg = format!("cannot evaluate SIMD vector length `{len}`");
205                        self.fcx
206                            .dcx()
207                            .struct_span_err(self.tcx().def_span(did), msg)
208                            .with_span_note(
209                                expr.span,
210                                "SIMD vector length needs to be known statically for use in `asm!`",
211                            )
212                            .emit();
213                    }
214                    NonAsmTypeReason::Invalid(ty) => {
215                        let msg = format!("cannot use value of type `{ty}` for inline assembly");
216                        self.fcx.dcx().struct_span_err(expr.span, msg).with_note(
217                            "only integers, floats, SIMD vectors, pointers and function pointers \
218                            can be used as arguments for inline assembly",
219                        ).emit();
220                    }
221                    NonAsmTypeReason::NotSizedPtr(ty) => {
222                        let msg = format!(
223                            "cannot use value of unsized pointer type `{ty}` for inline assembly"
224                        );
225                        self.fcx
226                            .dcx()
227                            .struct_span_err(expr.span, msg)
228                            .with_note("only sized pointers can be used in inline assembly")
229                            .emit();
230                    }
231                    NonAsmTypeReason::InvalidElement(did, ty) => {
232                        let msg = format!(
233                            "cannot use SIMD vector with element type `{ty}` for inline assembly"
234                        );
235                        self.fcx.dcx()
236                        .struct_span_err(self.tcx().def_span(did), msg).with_span_note(
237                            expr.span,
238                            "only integers, floats, SIMD vectors, pointers and function pointers \
239                            can be used as arguments for inline assembly",
240                        ).emit();
241                    }
242                    NonAsmTypeReason::EmptySIMDArray(ty) => {
243                        let msg = format!("use of empty SIMD vector `{ty}`");
244                        self.fcx.dcx().struct_span_err(expr.span, msg).emit();
245                    }
246                    NonAsmTypeReason::Tainted(_error_guard) => {
247                        // An error has already been reported.
248                    }
249                }
250                return None;
251            }
252        };
253
254        // Check that the type implements Copy. The only case where this can
255        // possibly fail is for SIMD types which don't #[derive(Copy)].
256        if !self.fcx.type_is_copy_modulo_regions(self.fcx.param_env, ty) {
257            let msg = "arguments for inline assembly must be copyable";
258            self.fcx
259                .dcx()
260                .struct_span_err(expr.span, msg)
261                .with_note(format!("`{ty}` does not implement the Copy trait"))
262                .emit();
263        }
264
265        // Ideally we wouldn't need to do this, but LLVM's register allocator
266        // really doesn't like it when tied operands have different types.
267        //
268        // This is purely an LLVM limitation, but we have to live with it since
269        // there is no way to hide this with implicit conversions.
270        //
271        // For the purposes of this check we only look at the `InlineAsmType`,
272        // which means that pointers and integers are treated as identical (modulo
273        // size).
274        if let Some((in_expr, Some(in_asm_ty))) = tied_input {
275            if in_asm_ty != asm_ty {
276                let msg = "incompatible types for asm inout argument";
277                let in_expr_ty = self.expr_ty(in_expr);
278                self.fcx
279                    .dcx()
280                    .struct_span_err(vec![in_expr.span, expr.span], msg)
281                    .with_span_label(in_expr.span, format!("type `{in_expr_ty}`"))
282                    .with_span_label(expr.span, format!("type `{ty}`"))
283                    .with_note(
284                        "asm inout arguments must have the same type, \
285                        unless they are both pointers or integers of the same size",
286                    )
287                    .emit();
288            }
289
290            // All of the later checks have already been done on the input, so
291            // let's not emit errors and warnings twice.
292            return Some(asm_ty);
293        }
294
295        // Check the type against the list of types supported by the selected
296        // register class.
297        let asm_arch = self.tcx().sess.asm_arch.unwrap();
298        let allow_experimental_reg = self.tcx().features().asm_experimental_reg();
299        let reg_class = reg.reg_class();
300        let supported_tys = reg_class.supported_types(asm_arch, allow_experimental_reg);
301        let Some((_, feature)) = supported_tys.iter().find(|&&(t, _)| t == asm_ty) else {
302            let mut err = if !allow_experimental_reg
303                && reg_class.supported_types(asm_arch, true).iter().any(|&(t, _)| t == asm_ty)
304            {
305                self.tcx().sess.create_feature_err(
306                    RegisterTypeUnstable { span: expr.span, ty },
307                    sym::asm_experimental_reg,
308                )
309            } else {
310                let msg = format!("type `{ty}` cannot be used with this register class");
311                let mut err = self.fcx.dcx().struct_span_err(expr.span, msg);
312                let supported_tys: Vec<_> =
313                    supported_tys.iter().map(|(t, _)| t.to_string()).collect();
314                err.note(format!(
315                    "register class `{}` supports these types: {}",
316                    reg_class.name(),
317                    supported_tys.join(", "),
318                ));
319                err
320            };
321            if let Some(suggest) = reg_class.suggest_class(asm_arch, asm_ty) {
322                err.help(format!("consider using the `{}` register class instead", suggest.name()));
323            }
324            err.emit();
325            return Some(asm_ty);
326        };
327
328        // Check whether the selected type requires a target feature. Note that
329        // this is different from the feature check we did earlier. While the
330        // previous check checked that this register class is usable at all
331        // with the currently enabled features, some types may only be usable
332        // with a register class when a certain feature is enabled. We check
333        // this here since it depends on the results of typeck.
334        //
335        // Also note that this check isn't run when the operand type is never
336        // (!). In that case we still need the earlier check to verify that the
337        // register class is usable at all.
338        if let Some(feature) = feature {
339            if !self.target_features.contains(feature) {
340                let msg = format!("`{feature}` target feature is not enabled");
341                self.fcx
342                    .dcx()
343                    .struct_span_err(expr.span, msg)
344                    .with_note(format!(
345                        "this is required to use type `{}` with register class `{}`",
346                        ty,
347                        reg_class.name(),
348                    ))
349                    .emit();
350                return Some(asm_ty);
351            }
352        }
353
354        // Check whether a modifier is suggested for using this type.
355        if let Some(ModifierInfo {
356            modifier: suggested_modifier,
357            result: suggested_result,
358            size: suggested_size,
359        }) = reg_class.suggest_modifier(asm_arch, asm_ty)
360        {
361            // Search for any use of this operand without a modifier and emit
362            // the suggestion for them.
363            let mut spans = vec![];
364            for piece in template {
365                if let &InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span } = piece
366                {
367                    if operand_idx == idx && modifier.is_none() {
368                        spans.push(span);
369                    }
370                }
371            }
372            if !spans.is_empty() {
373                let ModifierInfo {
374                    modifier: default_modifier,
375                    result: default_result,
376                    size: default_size,
377                } = reg_class.default_modifier(asm_arch).unwrap();
378                self.tcx().node_span_lint(
379                    lint::builtin::ASM_SUB_REGISTER,
380                    expr.hir_id,
381                    spans,
382                    |lint| {
383                        lint.primary_message("formatting may not be suitable for sub-register argument");
384                        lint.span_label(expr.span, "for this argument");
385                        lint.help(format!(
386                            "use `{{{idx}:{suggested_modifier}}}` to have the register formatted as `{suggested_result}` (for {suggested_size}-bit values)",
387                        ));
388                        lint.help(format!(
389                            "or use `{{{idx}:{default_modifier}}}` to keep the default formatting of `{default_result}` (for {default_size}-bit values)",
390                        ));
391                    },
392                );
393            }
394        }
395
396        Some(asm_ty)
397    }
398
399    pub(crate) fn check_asm(&self, asm: &hir::InlineAsm<'tcx>) {
400        let Some(asm_arch) = self.tcx().sess.asm_arch else {
401            self.fcx.dcx().delayed_bug("target architecture does not support asm");
402            return;
403        };
404        let allow_experimental_reg = self.tcx().features().asm_experimental_reg();
405        for (idx, &(op, op_sp)) in asm.operands.iter().enumerate() {
406            // Validate register classes against currently enabled target
407            // features. We check that at least one type is available for
408            // the enabled features.
409            //
410            // We ignore target feature requirements for clobbers: if the
411            // feature is disabled then the compiler doesn't care what we
412            // do with the registers.
413            //
414            // Note that this is only possible for explicit register
415            // operands, which cannot be used in the asm string.
416            if let Some(reg) = op.reg() {
417                // Some explicit registers cannot be used depending on the
418                // target. Reject those here.
419                if let InlineAsmRegOrRegClass::Reg(reg) = reg {
420                    if let InlineAsmReg::Err = reg {
421                        // `validate` will panic on `Err`, as an error must
422                        // already have been reported.
423                        continue;
424                    }
425                    if let Err(msg) = reg.validate(
426                        asm_arch,
427                        self.tcx().sess.relocation_model(),
428                        self.target_features,
429                        &self.tcx().sess.target,
430                        op.is_clobber(),
431                    ) {
432                        let msg = format!("cannot use register `{}`: {}", reg.name(), msg);
433                        self.fcx.dcx().span_err(op_sp, msg);
434                        continue;
435                    }
436                }
437
438                if !op.is_clobber() {
439                    let mut missing_required_features = vec![];
440                    let reg_class = reg.reg_class();
441                    if let InlineAsmRegClass::Err = reg_class {
442                        continue;
443                    }
444                    for &(_, feature) in reg_class.supported_types(asm_arch, allow_experimental_reg)
445                    {
446                        match feature {
447                            Some(feature) => {
448                                if self.target_features.contains(&feature) {
449                                    missing_required_features.clear();
450                                    break;
451                                } else {
452                                    missing_required_features.push(feature);
453                                }
454                            }
455                            None => {
456                                missing_required_features.clear();
457                                break;
458                            }
459                        }
460                    }
461
462                    // We are sorting primitive strs here and can use unstable sort here
463                    missing_required_features.sort_unstable();
464                    missing_required_features.dedup();
465                    match &missing_required_features[..] {
466                        [] => {}
467                        [feature] => {
468                            let msg = format!(
469                                "register class `{}` requires the `{}` target feature",
470                                reg_class.name(),
471                                feature
472                            );
473                            self.fcx.dcx().span_err(op_sp, msg);
474                            // register isn't enabled, don't do more checks
475                            continue;
476                        }
477                        features => {
478                            let msg = format!(
479                                "register class `{}` requires at least one of the following target features: {}",
480                                reg_class.name(),
481                                features
482                                    .iter()
483                                    .map(|f| f.as_str())
484                                    .intersperse(", ")
485                                    .collect::<String>(),
486                            );
487                            self.fcx.dcx().span_err(op_sp, msg);
488                            // register isn't enabled, don't do more checks
489                            continue;
490                        }
491                    }
492                }
493            }
494
495            match op {
496                hir::InlineAsmOperand::In { reg, expr } => {
497                    self.check_asm_operand_type(idx, reg, expr, asm.template, true, None);
498                }
499                hir::InlineAsmOperand::Out { reg, late: _, expr } => {
500                    if let Some(expr) = expr {
501                        self.check_asm_operand_type(idx, reg, expr, asm.template, false, None);
502                    }
503                }
504                hir::InlineAsmOperand::InOut { reg, late: _, expr } => {
505                    self.check_asm_operand_type(idx, reg, expr, asm.template, false, None);
506                }
507                hir::InlineAsmOperand::SplitInOut { reg, late: _, in_expr, out_expr } => {
508                    let in_ty =
509                        self.check_asm_operand_type(idx, reg, in_expr, asm.template, true, None);
510                    if let Some(out_expr) = out_expr {
511                        self.check_asm_operand_type(
512                            idx,
513                            reg,
514                            out_expr,
515                            asm.template,
516                            false,
517                            Some((in_expr, in_ty)),
518                        );
519                    }
520                }
521                hir::InlineAsmOperand::Const { anon_const } => {
522                    let ty = self.expr_ty(self.tcx().hir_body(anon_const.body).value);
523                    match ty.kind() {
524                        ty::Error(_) => {}
525                        _ if ty.is_integral() => {}
526                        _ => {
527                            self.fcx
528                                .dcx()
529                                .struct_span_err(op_sp, "invalid type for `const` operand")
530                                .with_span_label(
531                                    self.tcx().def_span(anon_const.def_id),
532                                    format!("is {} `{}`", ty.kind().article(), ty),
533                                )
534                                .with_help("`const` operands must be of an integer type")
535                                .emit();
536                        }
537                    }
538                }
539                // Typeck has checked that SymFn refers to a function.
540                hir::InlineAsmOperand::SymFn { expr } => {
541                    let ty = self.expr_ty(expr);
542                    match ty.kind() {
543                        ty::FnDef(..) => {}
544                        ty::Error(_) => {}
545                        _ => {
546                            self.fcx
547                                .dcx()
548                                .struct_span_err(op_sp, "invalid `sym` operand")
549                                .with_span_label(
550                                    expr.span,
551                                    format!("is {} `{}`", ty.kind().article(), ty),
552                                )
553                                .with_help(
554                                    "`sym` operands must refer to either a function or a static",
555                                )
556                                .emit();
557                        }
558                    }
559                }
560                // AST lowering guarantees that SymStatic points to a static.
561                hir::InlineAsmOperand::SymStatic { .. } => {}
562                // No special checking is needed for labels.
563                hir::InlineAsmOperand::Label { .. } => {}
564            }
565        }
566    }
567}
rustc_hir_typeck/inline_asm.rs

rustc_hir_typeck/
inline_asm.rs
