Module arm 

🔬This is a nightly-only experimental API. (stdarch_arm_neon_intrinsics #111800)

Available on ARM only.

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Structs

SYExperimental(AArch64 or ARM or ARM64EC) and neither AArch64 nor ARM64EC nor mclass nor v7

Full system is the required shareability domain, reads and writes are the required access types

float16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of four packed f16.

float16x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two float16x4_t vectors.

float16x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three float16x4_t vectors.

float16x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four float16x4_t vectors.

float16x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of eight packed f16.

float16x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two float16x8_t vectors.

float16x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three float16x8_t vectors.

float16x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four float16x8_t vectors.

float32x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of two packed f32.

float32x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two float32x2_t vectors.

float32x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three float32x2_t vectors.

float32x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four float32x2_t vectors.

float32x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of four packed f32.

float32x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two float32x4_t vectors.

float32x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three float32x4_t vectors.

float32x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four float32x4_t vectors.

int8x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of eight packed i8.

int8x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int8x8_t vectors.

int8x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int8x8_t vectors.

int8x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int8x8_t vectors.

int8x16_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of sixteen packed i8.

int8x16x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int8x16_t vectors.

int8x16x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int8x16_t vectors.

int8x16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int8x16_t vectors.

int16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of four packed i16.

int16x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int16x4_t vectors.

int16x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int16x4_t vectors.

int16x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int16x4_t vectors.

int16x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of eight packed i16.

int16x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int16x8_t vectors.

int16x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int16x8_t vectors.

int16x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int16x8_t vectors.

int32x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of two packed i32.

int32x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int32x2_t vectors.

int32x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int32x2_t vectors.

int32x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int32x2_t vectors.

int32x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of four packed i32.

int32x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int32x4_t vectors.

int32x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int32x4_t vectors.

int32x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int32x4_t vectors.

int64x1_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of one packed i64.

int64x1x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int64x1_t vectors.

int64x1x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int64x1_t vectors.

int64x1x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int64x1_t vectors.

int64x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of two packed i64.

int64x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two int64x2_t vectors.

int64x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three int64x2_t vectors.

int64x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four int64x2_t vectors.

poly8x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide polynomial vector of eight packed p8.

poly8x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly8x8_t vectors.

poly8x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly8x8_t vectors.

poly8x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly8x8_t vectors.

poly8x16_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of sixteen packed p8.

poly8x16x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly8x16_t vectors.

poly8x16x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly8x16_t vectors.

poly8x16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly8x16_t vectors.

poly16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of four packed p16.

poly16x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly16x4_t vectors.

poly16x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly16x4_t vectors.

poly16x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly16x4_t vectors.

poly16x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of eight packed p16.

poly16x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly16x8_t vectors.

poly16x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly16x8_t vectors.

poly16x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly16x8_t vectors.

poly64x1_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of one packed p64.

poly64x1x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly64x1_t vectors.

poly64x1x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly64x1_t vectors.

poly64x1x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly64x1_t vectors.

poly64x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of two packed p64.

poly64x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two poly64x2_t vectors.

poly64x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three poly64x2_t vectors.

poly64x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four poly64x2_t vectors.

uint8x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of eight packed u8.

uint8x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint8x8_t vectors.

uint8x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint8x8_t vectors.

uint8x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint8x8_t vectors.

uint8x16_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of sixteen packed u8.

uint8x16x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint8x16_t vectors.

uint8x16x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint8x16_t vectors.

uint8x16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint8x16_t vectors.

uint16x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of four packed u16.

uint16x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint16x4_t vectors.

uint16x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint16x4_t vectors.

uint16x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint16x4_t vectors.

uint16x8_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of eight packed u16.

uint16x8x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint16x8_t vectors.

uint16x8x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint16x8_t vectors.

uint16x8x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint16x8_t vectors.

uint32x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of two packed u32.

uint32x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint32x2_t vectors.

uint32x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint32x2_t vectors.

uint32x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint32x2_t vectors.

uint32x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of four packed u32.

uint32x4x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint32x4_t vectors.

uint32x4x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint32x4_t vectors.

uint32x4x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint32x4_t vectors.

uint64x1_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 64-bit wide vector of one packed u64.

uint64x1x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint64x1_t vectors.

uint64x1x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint64x1_t vectors.

uint64x1x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint64x1_t vectors.

uint64x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific 128-bit wide vector of two packed u64.

uint64x2x2_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing two uint64x2_t vectors.

uint64x2x3_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing three uint64x2_t vectors.

uint64x2x4_tExperimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Arm-specific type containing four uint64x2_t vectors.

Functions

__crc32bExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32 single round checksum for bytes (8 bits). Arm’s documentation

__crc32cbExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32-C single round checksum for bytes (8 bits). Arm’s documentation

__crc32chExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32-C single round checksum for bytes (16 bits). Arm’s documentation

__crc32cwExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32-C single round checksum for bytes (32 bits). Arm’s documentation

__crc32hExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32 single round checksum for bytes (16 bits). Arm’s documentation

__crc32wExperimentalcrc and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

CRC32 single round checksum for bytes (32 bits). Arm’s documentation

__dmb^⚠ExperimentalAArch64 or ARM or ARM64EC

Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.

__dsb^⚠ExperimentalAArch64 or ARM or ARM64EC

Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.

__isb^⚠ExperimentalAArch64 or ARM or ARM64EC

Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.

__nop^⚠ExperimentalAArch64 or ARM or ARM64EC

Generates an unspecified no-op instruction.

__qadd^⚠ExperimentalARM

Signed saturating addition

__qadd8^⚠ExperimentalARM

Saturating four 8-bit integer additions

__qadd16^⚠ExperimentalARM

Saturating two 16-bit integer additions

__qasx^⚠ExperimentalARM

Returns the 16-bit signed saturated equivalent of

__qdbl^⚠ExperimentalARM

Insert a QADD instruction

__qsax^⚠ExperimentalARM

Returns the 16-bit signed saturated equivalent of

__qsub^⚠ExperimentalARM

Signed saturating subtraction

__qsub8^⚠ExperimentalARM

Saturating two 8-bit integer subtraction

__qsub16^⚠ExperimentalARM

Saturating two 16-bit integer subtraction

__sadd8^⚠ExperimentalARM

Returns the 8-bit signed saturated equivalent of

__sadd16^⚠ExperimentalARM

Returns the 16-bit signed saturated equivalent of

__sasx^⚠ExperimentalARM

Returns the 16-bit signed equivalent of

__sel^⚠ExperimentalARM

Select bytes from each operand according to APSR GE flags

__sev^⚠Experimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v6)

Generates a SEV (send a global event) hint instruction.

__sevl^⚠Experimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v8)

Generates a send a local event hint instruction.

__shadd8^⚠ExperimentalARM

Signed halving parallel byte-wise addition.

__shadd16^⚠ExperimentalARM

Signed halving parallel halfword-wise addition.

__shsub8^⚠ExperimentalARM

Signed halving parallel byte-wise subtraction.

__shsub16^⚠ExperimentalARM

Signed halving parallel halfword-wise subtraction.

__smlabb^⚠ExperimentalARM

Insert a SMLABB instruction

__smlabt^⚠ExperimentalARM

Insert a SMLABT instruction

__smlad^⚠ExperimentalARM

Dual 16-bit Signed Multiply with Addition of products and 32-bit accumulation.

__smlatb^⚠ExperimentalARM

Insert a SMLATB instruction

__smlatt^⚠ExperimentalARM

Insert a SMLATT instruction

__smlawb^⚠ExperimentalARM

Insert a SMLAWB instruction

__smlawt^⚠ExperimentalARM

Insert a SMLAWT instruction

__smlsd^⚠ExperimentalARM

Dual 16-bit Signed Multiply with Subtraction of products and 32-bit accumulation and overflow detection.

__smuad^⚠ExperimentalARM

Signed Dual Multiply Add.

__smuadx^⚠ExperimentalARM

Signed Dual Multiply Add Reversed.

__smulbb^⚠ExperimentalARM

Insert a SMULBB instruction

__smulbt^⚠ExperimentalARM

Insert a SMULTB instruction

__smultb^⚠ExperimentalARM

Insert a SMULTB instruction

__smultt^⚠ExperimentalARM

Insert a SMULTT instruction

__smulwb^⚠ExperimentalARM

Insert a SMULWB instruction

__smulwt^⚠ExperimentalARM

Insert a SMULWT instruction

__smusd^⚠ExperimentalARM

Signed Dual Multiply Subtract.

__smusdx^⚠ExperimentalARM

Signed Dual Multiply Subtract Reversed.

__ssat^⚠ExperimentalARM

Saturates a 32-bit signed integer to a signed integer with a given bit width.

__ssub8^⚠ExperimentalARM

Inserts a SSUB8 instruction.

__usad8^⚠ExperimentalARM

Sum of 8-bit absolute differences.

__usada8^⚠ExperimentalARM

Sum of 8-bit absolute differences and constant.

__usat^⚠ExperimentalARM

Saturates a 32-bit signed integer to an unsigned integer with a given bit width.

__usub8^⚠ExperimentalARM

Inserts a USUB8 instruction.

__wfe^⚠Experimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v6)

Generates a WFE (wait for event) hint instruction, or nothing.

__wfi^⚠Experimental(AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v6)

Generates a WFI (wait for interrupt) hint instruction, or nothing.

__yield^⚠Experimental(AArch64 or ARM or ARM64EC) and (AArch64, or ARM64EC, or v6t2, or v6k and non-thumb-mode, or mclass and v6)

Generates a YIELD hint instruction.

vaba_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vaba_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vaba_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vaba_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vaba_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vaba_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (64-bit) Arm’s documentation

vabal_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference and Accumulate Long Arm’s documentation

vabal_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference and Accumulate Long Arm’s documentation

vabal_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference and Accumulate Long Arm’s documentation

vabal_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference and Accumulate Long Arm’s documentation

vabal_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference and Accumulate Long Arm’s documentation

vabal_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference and Accumulate Long Arm’s documentation

vabaq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabaq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabaq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabaq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabaq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabaq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference and accumulate (128-bit) Arm’s documentation

vabd_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Absolute difference between the arguments of Floating Arm’s documentation

vabd_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments of Floating Arm’s documentation

vabd_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabd_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabd_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference Long Arm’s documentation

vabdl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference Long Arm’s documentation

vabdl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Absolute difference Long Arm’s documentation

vabdl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference Long Arm’s documentation

vabdl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference Long Arm’s documentation

vabdl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Absolute difference Long Arm’s documentation

vabdq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Absolute difference between the arguments of Floating Arm’s documentation

vabdq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments of Floating Arm’s documentation

vabdq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabdq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute difference between the arguments Arm’s documentation

vabs_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute value Arm’s documentation

vabs_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute value Arm’s documentation

vabs_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vabs_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vabs_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vabsh_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute value Arm’s documentation

vabsq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute value Arm’s documentation

vabsq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute value Arm’s documentation

vabsq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vabsq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vabsq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Absolute value (wrapping). Arm’s documentation

vadd_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Add (vector). Arm’s documentation

vadd_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vadd_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vadd_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vadd_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vadd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddh_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Add Arm’s documentation

vaddhn_high_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_high_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_high_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_high_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_high_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_high_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow (high half). Arm’s documentation

vaddhn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddhn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddhn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddhn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddhn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddhn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add returning High Narrow. Arm’s documentation

vaddl_high_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_high_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_high_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_high_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_high_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_high_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add Long (vector, high half). Arm’s documentation

vaddl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Long (vector). Arm’s documentation

vaddq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Add (vector). Arm’s documentation

vaddq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vaddq_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vaddq_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vaddq_p128Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise exclusive OR Arm’s documentation

vaddq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector add. Arm’s documentation

vaddw_high_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_high_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_high_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_high_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_high_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_high_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide (high half). Arm’s documentation

vaddw_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaddw_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaddw_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaddw_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaddw_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaddw_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add Wide Arm’s documentation

vaesdq_u8ExperimentalLittle-endian and aes and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

AES single round encryption. Arm’s documentation

vaeseq_u8ExperimentalLittle-endian and aes and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

AES single round encryption. Arm’s documentation

vaesimcq_u8ExperimentalLittle-endian and aes and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

AES inverse mix columns. Arm’s documentation

vaesmcq_u8ExperimentalLittle-endian and aes and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

AES mix columns. Arm’s documentation

vand_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vand_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vandq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise and Arm’s documentation

vbic_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbic_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbicq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise bit clear. Arm’s documentation

vbsl_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Bitwise Select. Arm’s documentation

vbsl_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbsl_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Bitwise Select. Arm’s documentation

vbslq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vbslq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Bitwise Select. Arm’s documentation

vcage_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare greater than or equal Arm’s documentation

vcage_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare greater than or equal Arm’s documentation

vcageq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare greater than or equal Arm’s documentation

vcageq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare greater than or equal Arm’s documentation

vcagt_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare greater than Arm’s documentation

vcagt_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare greater than Arm’s documentation

vcagtq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare greater than Arm’s documentation

vcagtq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare greater than Arm’s documentation

vcale_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare less than or equal Arm’s documentation

vcale_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare less than or equal Arm’s documentation

vcaleq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare less than or equal Arm’s documentation

vcaleq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare less than or equal Arm’s documentation

vcalt_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare less than Arm’s documentation

vcalt_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare less than Arm’s documentation

vcaltq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point absolute compare less than Arm’s documentation

vcaltq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point absolute compare less than Arm’s documentation

vceq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare equal Arm’s documentation

vceq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare equal Arm’s documentation

vceq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare equal Arm’s documentation

vceqq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare equal Arm’s documentation

vceqq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vceqq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare bitwise Equal (vector) Arm’s documentation

vcge_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than or equal Arm’s documentation

vcge_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare greater than or equal Arm’s documentation

vcge_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcge_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcge_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcge_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcge_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcge_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcgeq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than or equal Arm’s documentation

vcgeq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare greater than or equal Arm’s documentation

vcgeq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcgeq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcgeq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than or equal Arm’s documentation

vcgeq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcgeq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcgeq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than or equal Arm’s documentation

vcgez_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than or equal to zero Arm’s documentation

vcgezq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than or equal to zero Arm’s documentation

vcgt_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than Arm’s documentation

vcgt_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare greater than Arm’s documentation

vcgt_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgt_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgt_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgt_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgt_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgt_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgtq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than Arm’s documentation

vcgtq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare greater than Arm’s documentation

vcgtq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgtq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgtq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed greater than Arm’s documentation

vcgtq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgtq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgtq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned greater than Arm’s documentation

vcgtz_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than zero Arm’s documentation

vcgtzq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare greater than zero Arm’s documentation

vcle_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than or equal Arm’s documentation

vcle_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare less than or equal Arm’s documentation

vcle_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcle_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcle_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcle_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vcle_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vcle_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vcleq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than or equal Arm’s documentation

vcleq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare less than or equal Arm’s documentation

vcleq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcleq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcleq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than or equal Arm’s documentation

vcleq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vcleq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vcleq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than or equal Arm’s documentation

vclez_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than or equal to zero Arm’s documentation

vclezq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than or equal to zero Arm’s documentation

vcls_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vcls_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vcls_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vcls_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vcls_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vcls_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclsq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading sign bits Arm’s documentation

vclt_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than Arm’s documentation

vclt_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare less than Arm’s documentation

vclt_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vclt_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vclt_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vclt_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vclt_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vclt_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vcltq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than Arm’s documentation

vcltq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point compare less than Arm’s documentation

vcltq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vcltq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vcltq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare signed less than Arm’s documentation

vcltq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vcltq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vcltq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Compare unsigned less than Arm’s documentation

vcltz_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than Arm’s documentation

vcltzq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point compare less than Arm’s documentation

vclz_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclz_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclz_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclz_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclz_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclz_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vclzq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Count leading zero bits Arm’s documentation

vcnt_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcnt_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcnt_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcntq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcntq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcntq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Population count per byte. Arm’s documentation

vcombine_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_p64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcombine_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Join two smaller vectors into a single larger vector Arm’s documentation

vcreate_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Insert vector element from another vector element Arm’s documentation

vcreate_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_p64Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcreate_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vcvt_f16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to lower precision narrow Arm’s documentation

vcvt_f16_s16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvt_f16_u16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvt_f32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to higher precision long Arm’s documentation

vcvt_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Fixed-point convert to floating-point Arm’s documentation

vcvt_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Fixed-point convert to floating-point Arm’s documentation

vcvt_n_f16_s16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvt_n_f16_u16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvt_n_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Fixed-point convert to floating-point Arm’s documentation

vcvt_n_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Fixed-point convert to floating-point Arm’s documentation

vcvt_n_s16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to signed fixed-point Arm’s documentation

vcvt_n_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Floating-point convert to fixed-point, rounding toward zero Arm’s documentation

vcvt_n_u16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vcvt_n_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Floating-point convert to fixed-point, rounding toward zero Arm’s documentation

vcvt_s16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to signed fixed-point, rounding toward zero Arm’s documentation

vcvt_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point convert to signed fixed-point, rounding toward zero Arm’s documentation

vcvt_u16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vcvt_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vcvtq_f16_s16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvtq_f16_u16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvtq_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Fixed-point convert to floating-point Arm’s documentation

vcvtq_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Fixed-point convert to floating-point Arm’s documentation

vcvtq_n_f16_s16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvtq_n_f16_u16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to floating-point Arm’s documentation

vcvtq_n_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Fixed-point convert to floating-point Arm’s documentation

vcvtq_n_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Fixed-point convert to floating-point Arm’s documentation

vcvtq_n_s16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to signed fixed-point Arm’s documentation

vcvtq_n_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Floating-point convert to fixed-point, rounding toward zero Arm’s documentation

vcvtq_n_u16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Fixed-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vcvtq_n_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Floating-point convert to fixed-point, rounding toward zero Arm’s documentation

vcvtq_s16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to signed fixed-point, rounding toward zero Arm’s documentation

vcvtq_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point convert to signed fixed-point, rounding toward zero Arm’s documentation

vcvtq_u16_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vcvtq_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point convert to unsigned fixed-point, rounding toward zero Arm’s documentation

vdot_lane_s32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdot_lane_u32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdot_laneq_s32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdot_laneq_u32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdot_s32ExperimentalLittle-endian and dotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (vector) Arm’s documentation

vdot_u32ExperimentalLittle-endian and dotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (vector) Arm’s documentation

vdotq_lane_s32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdotq_lane_u32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdotq_laneq_s32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdotq_laneq_u32Experimentaldotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (indexed) Arm’s documentation

vdotq_s32ExperimentalLittle-endian and dotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (vector) Arm’s documentation

vdotq_u32ExperimentalLittle-endian and dotprod and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product arithmetic (vector) Arm’s documentation

vdup_lane_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Set all vector lanes to the same value Arm’s documentation

vdup_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_lane_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_laneq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdup_n_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Create a new vector with all lanes set to a value Arm’s documentation

vdup_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdup_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_lane_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_lane_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_laneq_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Set all vector lanes to the same value Arm’s documentation

vdupq_n_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Create a new vector with all lanes set to a value Arm’s documentation

vdupq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vdupq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

veor_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veor_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

veorq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise exclusive or (vector) Arm’s documentation

vext_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Extract vector from pair of vectors Arm’s documentation

vext_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vext_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Extract vector from pair of vectors Arm’s documentation

vextq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vextq_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Extract vector from pair of vectors Arm’s documentation

vfma_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point fused Multiply-Add to accumulator (vector) Arm’s documentation

vfma_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-Add to accumulator(vector) Arm’s documentation

vfma_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-Add to accumulator(vector) Arm’s documentation

vfmaq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point fused Multiply-Add to accumulator (vector) Arm’s documentation

vfmaq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-Add to accumulator(vector) Arm’s documentation

vfmaq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-Add to accumulator(vector) Arm’s documentation

vfms_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point fused multiply-subtract from accumulator Arm’s documentation

vfms_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused multiply-subtract from accumulator Arm’s documentation

vfms_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-subtract to accumulator(vector) Arm’s documentation

vfmsq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point fused multiply-subtract from accumulator Arm’s documentation

vfmsq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused multiply-subtract from accumulator Arm’s documentation

vfmsq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point fused Multiply-subtract to accumulator(vector) Arm’s documentation

vget_high_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate vector element to vector Arm’s documentation

vget_high_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_p64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_high_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_lane_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate vector element to scalar Arm’s documentation

vget_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_lane_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vget_low_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate vector element to vector Arm’s documentation

vget_low_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_p64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vget_low_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vgetq_lane_f16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate vector element to scalar Arm’s documentation

vgetq_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_p64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vgetq_lane_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Move vector element to general-purpose register Arm’s documentation

vhadd_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhadd_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhadd_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhadd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhadd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhadd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhaddq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Halving add Arm’s documentation

vhsub_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsub_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsub_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsub_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsub_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsub_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vhsubq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed halving subtract Arm’s documentation

vld1_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load one single-element structure and replicate to all lanes of one register Arm’s documentation

vld1_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_dup_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1_f16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_f16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_f16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_f32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_f32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_f32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load one single-element structure to one lane of one register Arm’s documentation

vld1_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_lane_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1_p8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p64_x2^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p64_x3^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_p64_x4^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_s64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1_u64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load one single-element structure and replicate to all lanes of one register Arm’s documentation

vld1q_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_dup_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure and Replicate to all lanes (of one register). Arm’s documentation

vld1q_f16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_f16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_f16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_f32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_f32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_f32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Load one single-element structure to one lane of one register Arm’s documentation

vld1q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_lane_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load one single-element structure to one lane of one register. Arm’s documentation

vld1q_p8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p64_x2^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p64_x3^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_p64_x4^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_s64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld1q_u64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple single-element structures to one, two, three, or four registers Arm’s documentation

vld2_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_dup_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 2-element structure and replicate to all lanes of two registers Arm’s documentation

vld2q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld2q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 2-element structures to two registers Arm’s documentation

vld3_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 3-element structure and replicate to all lanes of two registers Arm’s documentation

vld3_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_dup_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 3-element structure and replicate to all lanes of two registers Arm’s documentation

vld3_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 3-element structures to two registers Arm’s documentation

vld3_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to two registers Arm’s documentation

vld3_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to two registers Arm’s documentation

vld3_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to two registers Arm’s documentation

vld3_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_dup_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 3-element structure and replicate to all lanes of two registers Arm’s documentation

vld3q_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 3-element structure and replicate to all lanes of three registers Arm’s documentation

vld3q_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 3-element structure and replicate to all lanes of two registers Arm’s documentation

vld3q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 3-element structures to two registers Arm’s documentation

vld3q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to two registers Arm’s documentation

vld3q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to two registers Arm’s documentation

vld3q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld3q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 3-element structures to three registers Arm’s documentation

vld4_dup_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 4-element structure and replicate to all lanes of two registers Arm’s documentation

vld4_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_dup_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 4-element structure and replicate to all lanes of two registers Arm’s documentation

vld4_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 4-element structures to two registers Arm’s documentation

vld4_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_dup_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 4-element structure and replicate to all lanes of two registers Arm’s documentation

vld4q_dup_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_dup_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load single 4-element structure and replicate to all lanes of four registers Arm’s documentation

vld4q_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load single 4-element structure and replicate to all lanes of two registers Arm’s documentation

vld4q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_f16^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Load multiple 4-element structures to two registers Arm’s documentation

vld4q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vld4q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Load multiple 4-element structures to four registers Arm’s documentation

vldrq_p128^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store SIMD&FP register (immediate offset) Arm’s documentation

vmax_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Maximum (vector) Arm’s documentation

vmax_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmax_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxnm_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Maximum Number (vector) Arm’s documentation

vmaxnm_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point Maximum Number (vector) Arm’s documentation

vmaxnmq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Maximum Number (vector) Arm’s documentation

vmaxnmq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point Maximum Number (vector) Arm’s documentation

vmaxq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Maximum (vector) Arm’s documentation

vmaxq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmaxq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Maximum (vector) Arm’s documentation

vmin_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Minimum (vector) Arm’s documentation

vmin_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmin_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminnm_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Minimum Number (vector) Arm’s documentation

vminnm_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point Minimum Number (vector) Arm’s documentation

vminnmq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point Minimum Number (vector) Arm’s documentation

vminnmq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point Minimum Number (vector) Arm’s documentation

vminq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Minimum (vector) Arm’s documentation

vminq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vminq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Minimum (vector) Arm’s documentation

vmla_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply-add to accumulator Arm’s documentation

vmla_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmla_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmla_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmla_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmla_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmla_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmla_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlal_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply accumulate with scalar Arm’s documentation

vmlal_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-add long Arm’s documentation

vmlal_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-add long Arm’s documentation

vmlal_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-add long Arm’s documentation

vmlal_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-add long Arm’s documentation

vmlal_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-add long Arm’s documentation

vmlal_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-add long Arm’s documentation

vmlaq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply-add to accumulator Arm’s documentation

vmlaq_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply accumulate with scalar Arm’s documentation

vmlaq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlaq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlaq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlaq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlaq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmlaq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-add to accumulator Arm’s documentation

vmls_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply-subtract from accumulator Arm’s documentation

vmls_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmls_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmls_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmls_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmls_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmls_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmls_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsl_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening multiply subtract with scalar Arm’s documentation

vmlsl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-subtract long Arm’s documentation

vmlsl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-subtract long Arm’s documentation

vmlsl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply-subtract long Arm’s documentation

vmlsl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-subtract long Arm’s documentation

vmlsl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-subtract long Arm’s documentation

vmlsl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply-subtract long Arm’s documentation

vmlsq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply-subtract from accumulator Arm’s documentation

vmlsq_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply subtract with scalar Arm’s documentation

vmlsq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmlsq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply-subtract from accumulator Arm’s documentation

vmmlaq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

8-bit integer matrix multiply-accumulate Arm’s documentation

vmmlaq_u32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

8-bit integer matrix multiply-accumulate Arm’s documentation

vmov_n_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate element to vector Arm’s documentation

vmov_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmov_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long move. Arm’s documentation

vmovn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector narrow integer. Arm’s documentation

vmovq_n_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Duplicate element to vector Arm’s documentation

vmovq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmovq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Duplicate vector element to vector or scalar Arm’s documentation

vmul_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Multiply Arm’s documentation

vmul_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_lane_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Multiply Arm’s documentation

vmul_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply Arm’s documentation

vmul_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply Arm’s documentation

vmul_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_n_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector multiply by scalar Arm’s documentation

vmul_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmul_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmul_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmul_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmul_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmul_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Polynomial multiply Arm’s documentation

vmul_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmul_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmull_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply by scalar Arm’s documentation

vmull_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply with scalar Arm’s documentation

vmull_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply with scalar Arm’s documentation

vmull_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply with scalar Arm’s documentation

vmull_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector long multiply with scalar Arm’s documentation

vmull_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Polynomial multiply long Arm’s documentation

vmull_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply long Arm’s documentation

vmull_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply long Arm’s documentation

vmull_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed multiply long Arm’s documentation

vmull_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply long Arm’s documentation

vmull_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply long Arm’s documentation

vmull_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned multiply long Arm’s documentation

vmulq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Multiply Arm’s documentation

vmulq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_lane_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Multiply Arm’s documentation

vmulq_lane_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply Arm’s documentation

vmulq_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_lane_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_lane_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_laneq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point multiply Arm’s documentation

vmulq_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_laneq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_laneq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_n_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector multiply by scalar Arm’s documentation

vmulq_n_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmulq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmulq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmulq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmulq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector multiply by scalar Arm’s documentation

vmulq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Polynomial multiply Arm’s documentation

vmulq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmulq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Multiply Arm’s documentation

vmvn_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vmvnq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise not. Arm’s documentation

vneg_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Negate Arm’s documentation

vneg_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vneg_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vneg_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vneg_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vnegq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Negate Arm’s documentation

vnegq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vnegq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vnegq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vnegq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Negate Arm’s documentation

vorn_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vornq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise inclusive OR NOT Arm’s documentation

vorr_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorr_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vorrq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector bitwise or (immediate, inclusive) Arm’s documentation

vpadal_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadal_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadal_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadal_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadal_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadal_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadalq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpadd_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point add pairwise Arm’s documentation

vpadd_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point add pairwise Arm’s documentation

vpadd_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpadd_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpadd_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpadd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpadd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpadd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Add pairwise. Arm’s documentation

vpaddl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpaddl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpaddl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpaddlq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Add and Accumulate Long Pairwise. Arm’s documentation

vpmax_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmax_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding maximum of adjacent pairs Arm’s documentation

vpmin_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vpmin_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Folding minimum of adjacent pairs Arm’s documentation

vqabs_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqabs_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqabs_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqabsq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqabsq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqabsq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating Absolute value Arm’s documentation

vqadd_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqadd_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqaddq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating add Arm’s documentation

vqdmlal_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply accumulate with scalar Arm’s documentation

vqdmlal_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply accumulate with scalar Arm’s documentation

vqdmlal_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply accumulate with scalar Arm’s documentation

vqdmlal_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply accumulate with scalar Arm’s documentation

vqdmlal_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply-add long Arm’s documentation

vqdmlal_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply-add long Arm’s documentation

vqdmlsl_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply subtract with scalar Arm’s documentation

vqdmlsl_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply subtract with scalar Arm’s documentation

vqdmlsl_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply subtract with scalar Arm’s documentation

vqdmlsl_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector widening saturating doubling multiply subtract with scalar Arm’s documentation

vqdmlsl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply-subtract long Arm’s documentation

vqdmlsl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply-subtract long Arm’s documentation

vqdmulh_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high by scalar Arm’s documentation

vqdmulh_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high by scalar Arm’s documentation

vqdmulh_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high with scalar Arm’s documentation

vqdmulh_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high with scalar Arm’s documentation

vqdmulh_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply returning high half Arm’s documentation

vqdmulh_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply returning high half Arm’s documentation

vqdmulhq_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high by scalar Arm’s documentation

vqdmulhq_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high by scalar Arm’s documentation

vqdmulhq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high with scalar Arm’s documentation

vqdmulhq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling multiply high with scalar Arm’s documentation

vqdmulhq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply returning high half Arm’s documentation

vqdmulhq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply returning high half Arm’s documentation

vqdmull_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling long multiply by scalar Arm’s documentation

vqdmull_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling long multiply by scalar Arm’s documentation

vqdmull_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling long multiply with scalar Arm’s documentation

vqdmull_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating doubling long multiply with scalar Arm’s documentation

vqdmull_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply long Arm’s documentation

vqdmull_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating doubling multiply long Arm’s documentation

vqmovn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract narrow Arm’s documentation

vqmovn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract narrow Arm’s documentation

vqmovn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract narrow Arm’s documentation

vqmovn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating extract narrow Arm’s documentation

vqmovn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating extract narrow Arm’s documentation

vqmovn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating extract narrow Arm’s documentation

vqmovun_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract unsigned narrow Arm’s documentation

vqmovun_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract unsigned narrow Arm’s documentation

vqmovun_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating extract unsigned narrow Arm’s documentation

vqneg_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqneg_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqneg_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqnegq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqnegq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqnegq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating negate Arm’s documentation

vqrdmulh_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulh_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulh_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulh_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulh_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating rounding doubling multiply high with scalar Arm’s documentation

vqrdmulh_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating rounding doubling multiply high with scalar Arm’s documentation

vqrdmulh_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding doubling multiply returning high half Arm’s documentation

vqrdmulh_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding doubling multiply returning high half Arm’s documentation

vqrdmulhq_lane_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulhq_lane_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulhq_laneq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulhq_laneq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector rounding saturating doubling multiply high by scalar Arm’s documentation

vqrdmulhq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating rounding doubling multiply high with scalar Arm’s documentation

vqrdmulhq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector saturating rounding doubling multiply high with scalar Arm’s documentation

vqrdmulhq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding doubling multiply returning high half Arm’s documentation

vqrdmulhq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding doubling multiply returning high half Arm’s documentation

vqrshl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshl_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshl_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshlq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshlq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshlq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshlq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating rounding shift left Arm’s documentation

vqrshlq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshlq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshlq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshlq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned signed saturating rounding shift left Arm’s documentation

vqrshrn_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right narrow Arm’s documentation

vqrshrn_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right narrow Arm’s documentation

vqrshrn_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right narrow Arm’s documentation

vqrshrn_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned signed saturating rounded shift right narrow Arm’s documentation

vqrshrn_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned signed saturating rounded shift right narrow Arm’s documentation

vqrshrn_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned signed saturating rounded shift right narrow Arm’s documentation

vqrshrun_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right unsigned narrow Arm’s documentation

vqrshrun_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right unsigned narrow Arm’s documentation

vqrshrun_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating rounded shift right unsigned narrow Arm’s documentation

vqshl_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshl_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed saturating shift left Arm’s documentation

vqshlq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned saturating shift left Arm’s documentation

vqshlu_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshlu_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshlu_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshlu_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshluq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshluq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshluq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshluq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift left unsigned Arm’s documentation

vqshrn_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right narrow Arm’s documentation

vqshrn_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right narrow Arm’s documentation

vqshrn_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right narrow Arm’s documentation

vqshrn_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned saturating shift right narrow Arm’s documentation

vqshrn_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned saturating shift right narrow Arm’s documentation

vqshrn_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Unsigned saturating shift right narrow Arm’s documentation

vqshrun_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right unsigned narrow Arm’s documentation

vqshrun_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right unsigned narrow Arm’s documentation

vqshrun_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Signed saturating shift right unsigned narrow Arm’s documentation

vqsub_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsub_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vqsubq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Saturating subtract Arm’s documentation

vraddhn_high_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_high_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_high_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_high_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_high_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_high_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow (high half). Arm’s documentation

vraddhn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vraddhn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vraddhn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vraddhn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vraddhn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vraddhn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding Add returning High Narrow. Arm’s documentation

vrecpe_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reciprocal estimate. Arm’s documentation

vrecpe_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reciprocal estimate. Arm’s documentation

vrecpe_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned reciprocal estimate Arm’s documentation

vrecpeq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reciprocal estimate. Arm’s documentation

vrecpeq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reciprocal estimate. Arm’s documentation

vrecpeq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned reciprocal estimate Arm’s documentation

vrecps_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point reciprocal step Arm’s documentation

vrecps_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point reciprocal step Arm’s documentation

vrecpsq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point reciprocal step Arm’s documentation

vrecpsq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point reciprocal step Arm’s documentation

vreinterpret_f16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_f32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_p64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_s64_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpret_u64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_p128Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_p128Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_f32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_p64Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_p128_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_s64_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u8_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u16_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_p64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u32_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_f16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_p128Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vreinterpretq_u64_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Vector reinterpret cast operation Arm’s documentation

vrev16_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev16_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev16_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev16q_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev16q_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev16q_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev32q_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reverse elements in 64-bit doublewords Arm’s documentation

vrev64_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reverse elements in 64-bit doublewords Arm’s documentation

vrev64q_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrev64q_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reversing vector elements (swap endianness) Arm’s documentation

vrhadd_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhadd_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhadd_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhadd_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhadd_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhadd_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrhaddq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding halving add Arm’s documentation

vrndn_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point round to integral, to nearest with ties to even Arm’s documentation

vrndn_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point round to integral, to nearest with ties to even Arm’s documentation

vrndnq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point round to integral, to nearest with ties to even Arm’s documentation

vrndnq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point round to integral, to nearest with ties to even Arm’s documentation

vrshl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshl_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshl_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshlq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshlq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshlq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshlq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift left Arm’s documentation

vrshlq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshlq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshlq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshlq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift left Arm’s documentation

vrshr_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshr_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshr_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshr_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshr_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshr_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshr_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshr_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshrn_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Rounding shift right narrow Arm’s documentation

vrshrn_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Rounding shift right narrow Arm’s documentation

vrshrn_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Rounding shift right narrow Arm’s documentation

vrshrn_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding shift right narrow Arm’s documentation

vrshrn_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding shift right narrow Arm’s documentation

vrshrn_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding shift right narrow Arm’s documentation

vrshrq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshrq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshrq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshrq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right Arm’s documentation

vrshrq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshrq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshrq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrshrq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right Arm’s documentation

vrsqrte_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reciprocal square-root estimate. Arm’s documentation

vrsqrte_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reciprocal square-root estimate. Arm’s documentation

vrsqrte_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned reciprocal square root estimate Arm’s documentation

vrsqrteq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Reciprocal square-root estimate. Arm’s documentation

vrsqrteq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Reciprocal square-root estimate. Arm’s documentation

vrsqrteq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned reciprocal square root estimate Arm’s documentation

vrsqrts_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point reciprocal square root step Arm’s documentation

vrsqrts_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point reciprocal square root step Arm’s documentation

vrsqrtsq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Floating-point reciprocal square root step Arm’s documentation

vrsqrtsq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Floating-point reciprocal square root step Arm’s documentation

vrsra_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsra_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsra_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsra_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsra_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsra_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsra_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsra_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsraq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsraq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsraq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsraq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed rounding shift right and accumulate Arm’s documentation

vrsraq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsraq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsraq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsraq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned rounding shift right and accumulate Arm’s documentation

vrsubhn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vrsubhn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vrsubhn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vrsubhn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vrsubhn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vrsubhn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Rounding subtract returning high narrow Arm’s documentation

vset_lane_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Insert vector element from another vector element Arm’s documentation

vset_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_p64Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vset_lane_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Insert vector element from another vector element Arm’s documentation

vsetq_lane_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_p64ExperimentalLittle-endian and aes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_s64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsetq_lane_u64ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Insert vector element from another vector element Arm’s documentation

vsha1cq_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 hash update accelerator, choose. Arm’s documentation

vsha1h_u32Experimentalsha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 fixed rotate. Arm’s documentation

vsha1mq_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 hash update accelerator, majority Arm’s documentation

vsha1pq_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 hash update accelerator, parity Arm’s documentation

vsha1su0q_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 schedule update accelerator, first part. Arm’s documentation

vsha1su1q_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 schedule update accelerator, second part. Arm’s documentation

vsha256h2q_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 schedule update accelerator, upper part. Arm’s documentation

vsha256hq_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA1 schedule update accelerator, first part. Arm’s documentation

vsha256su0q_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA256 schedule update accelerator, first part. Arm’s documentation

vsha256su1q_u32ExperimentalLittle-endian and sha2 and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

SHA256 schedule update accelerator, second part. Arm’s documentation

vshl_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshl_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshl_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshll_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshll_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshll_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshll_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshll_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshll_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift left long Arm’s documentation

vshlq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift left Arm’s documentation

vshlq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshlq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshlq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshlq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Shift left Arm’s documentation

vshlq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshlq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshlq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshlq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Shift left Arm’s documentation

vshr_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshr_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrn_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrn_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrn_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrn_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrn_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrn_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right narrow Arm’s documentation

vshrq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vshrq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Shift right Arm’s documentation

vsra_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsra_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsra_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsra_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsra_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsra_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsra_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsra_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsraq_n_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsraq_n_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsraq_n_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsraq_n_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed shift right and accumulate Arm’s documentation

vsraq_n_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsraq_n_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsraq_n_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vsraq_n_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned shift right and accumulate Arm’s documentation

vst1_f16_x2^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_f16_x3^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_f16_x4^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_f32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_f32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_f32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_lane_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_p8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p64_x2^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p64_x3^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_p64_x4^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_s8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_s64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1_u8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1_u64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f16_x2^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f16_x3^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f16_x4^⚠Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_f32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_lane_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_p8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p64_x2^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p64_x3^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_p64_x4^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_s8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_s64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple single-element structures from one, two, three, or four registers Arm’s documentation

vst1q_u8_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u8_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u8_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u16_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u16_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u16_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u32_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u32_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u32_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u64_x2^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u64_x3^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst1q_u64_x4^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple single-element structures to one, two, three, or four registers Arm’s documentation

vst2_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 2-element structures from two registers Arm’s documentation

vst2_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst2q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 2-element structures from two registers Arm’s documentation

vst3_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 3-element structures from three registers Arm’s documentation

vst3_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst3q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 3-element structures from three registers Arm’s documentation

vst4_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 4-element structures from four registers Arm’s documentation

vst4_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_p64^⚠Experimentalaes and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_s64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4_u64^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_f16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM and non-ARM64EC

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_f32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_lane_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_p8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_p16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_s8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_s16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_s32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_u8^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_u16^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vst4q_u32^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store multiple 4-element structures from four registers Arm’s documentation

vstrq_p128^⚠Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Store SIMD&FP register (immediate offset) Arm’s documentation

vsub_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Subtract Arm’s documentation

vsub_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsub_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubhn_high_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_high_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_high_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_high_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_high_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_high_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubhn_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract returning high narrow Arm’s documentation

vsubl_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Long Arm’s documentation

vsubl_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Long Arm’s documentation

vsubl_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Long Arm’s documentation

vsubl_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Long Arm’s documentation

vsubl_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Long Arm’s documentation

vsubl_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Long Arm’s documentation

vsubq_f16Experimentalfp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Subtract Arm’s documentation

vsubq_f32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_s64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubq_u64Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Subtract Arm’s documentation

vsubw_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Wide Arm’s documentation

vsubw_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Wide Arm’s documentation

vsubw_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed Subtract Wide Arm’s documentation

vsubw_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Wide Arm’s documentation

vsubw_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Wide Arm’s documentation

vsubw_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned Subtract Wide Arm’s documentation

vsudot_lane_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with signed and unsigned integers Arm’s documentation

vsudot_laneq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with signed and unsigned integers Arm’s documentation

vsudotq_lane_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with signed and unsigned integers Arm’s documentation

vsudotq_laneq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with signed and unsigned integers Arm’s documentation

vtrn_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Transpose elements Arm’s documentation

vtrn_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrn_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Transpose elements Arm’s documentation

vtrnq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtrnq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Transpose elements Arm’s documentation

vtst_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtst_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtst_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtst_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtst_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtst_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vtst_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vtst_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vtstq_p8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtstq_p16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtstq_s8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtstq_s16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtstq_s32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Signed compare bitwise Test bits nonzero Arm’s documentation

vtstq_u8Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vtstq_u16Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vtstq_u32Experimentalneon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned compare bitwise Test bits nonzero Arm’s documentation

vusdot_lane_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with unsigned and signed integers Arm’s documentation

vusdot_laneq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with unsigned and signed integers Arm’s documentation

vusdot_s32ExperimentalLittle-endian and i8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product vector form with unsigned and signed integers Arm’s documentation

vusdotq_lane_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with unsigned and signed integers Arm’s documentation

vusdotq_laneq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product index form with unsigned and signed integers Arm’s documentation

vusdotq_s32ExperimentalLittle-endian and i8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Dot product vector form with unsigned and signed integers Arm’s documentation

vusmmlaq_s32Experimentali8mm and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unsigned and signed 8-bit integer matrix multiply-accumulate Arm’s documentation

vuzp_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Unzip vectors Arm’s documentation

vuzp_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzp_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Unzip vectors Arm’s documentation

vuzpq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vuzpq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Unzip vectors Arm’s documentation

vzip_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Zip vectors Arm’s documentation

vzip_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzip_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_f16ExperimentalLittle-endian and fp16 and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7) and non-ARM64EC

Zip vectors Arm’s documentation

vzipq_f32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_p8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_p16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_s8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_s16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_s32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_u8ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_u16ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

vzipq_u32ExperimentalLittle-endian and neon and (AArch64 or ARM or ARM64EC) and (AArch64 or ARM64EC or v7)

Zip vectors Arm’s documentation

Type Aliases

int8x4_tExperimentalARM

ARM-specific vector of four packed i8 packed into a 32-bit integer.

int16x2_tExperimentalARM

ARM-specific vector of two packed i16 packed into a 32-bit integer.

uint8x4_tExperimentalARM

ARM-specific vector of four packed u8 packed into a 32-bit integer.

uint16x2_tExperimentalARM

ARM-specific vector of two packed u16 packed into a 32-bit integer.