Enum InlineAsmReg

pub enum InlineAsmReg {
    X86(X86InlineAsmReg),
    Arm(ArmInlineAsmReg),
    AArch64(AArch64InlineAsmReg),
    RiscV(RiscVInlineAsmReg),
    Nvptx(NvptxInlineAsmReg),
    PowerPC(PowerPCInlineAsmReg),
    Hexagon(HexagonInlineAsmReg),
    LoongArch(LoongArchInlineAsmReg),
    Mips(MipsInlineAsmReg),
    S390x(S390xInlineAsmReg),
    SpirV(SpirVInlineAsmReg),
    Wasm(WasmInlineAsmReg),
    Bpf(BpfInlineAsmReg),
    Avr(AvrInlineAsmReg),
    Msp430(Msp430InlineAsmReg),
    M68k(M68kInlineAsmReg),
    CSKY(CSKYInlineAsmReg),
    Err,
}

Variants

X86(X86InlineAsmReg)

Arm(ArmInlineAsmReg)

AArch64(AArch64InlineAsmReg)

RiscV(RiscVInlineAsmReg)

Nvptx(NvptxInlineAsmReg)

PowerPC(PowerPCInlineAsmReg)

Hexagon(HexagonInlineAsmReg)

LoongArch(LoongArchInlineAsmReg)

Mips(MipsInlineAsmReg)

S390x(S390xInlineAsmReg)

SpirV(SpirVInlineAsmReg)

Wasm(WasmInlineAsmReg)

Bpf(BpfInlineAsmReg)

Avr(AvrInlineAsmReg)

Msp430(Msp430InlineAsmReg)

M68k(M68kInlineAsmReg)

CSKY(CSKYInlineAsmReg)

Err

Implementations

impl InlineAsmReg

pub fn name(self) -> &'static str

pub fn reg_class(self) -> InlineAsmRegClass

pub fn parse(arch: InlineAsmArch, name: Symbol) -> Result<Self, &'static str>

pub fn validate( self, arch: InlineAsmArch, reloc_model: RelocModel, target_features: &FxIndexSet<Symbol>, target: &Target, is_clobber: bool, ) -> Result<(), &'static str>

pub fn emit( self, out: &mut dyn Write, arch: InlineAsmArch, modifier: Option<char>, ) -> Result

pub fn overlapping_regs(self, cb: impl FnMut(InlineAsmReg))

Trait Implementations

impl Clone for InlineAsmReg

fn clone(&self) -> InlineAsmReg

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for InlineAsmReg

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<__D: SpanDecoder> Decodable<__D> for InlineAsmReg

fn decode(__decoder: &mut __D) -> Self

impl<__E: SpanEncoder> Encodable<__E> for InlineAsmReg

fn encode(&self, __encoder: &mut __E)

impl Hash for InlineAsmReg

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl<__CTX> HashStable<__CTX> for InlineAsmReg

where __CTX: HashStableContext,

fn hash_stable(&self, __hcx: &mut __CTX, __hasher: &mut StableHasher)

impl PartialEq for InlineAsmReg

fn eq(&self, other: &InlineAsmReg) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for InlineAsmReg

fn partial_cmp(&self, other: &InlineAsmReg) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator.

impl Copy for InlineAsmReg

impl Eq for InlineAsmReg

impl StructuralPartialEq for InlineAsmReg

Layout

Note: Most layout information is completely unstable and may even differ between compilations. The only exception is types with certain repr(...) attributes. Please see the Rust Reference's “Type Layout” chapter for details on type layout guarantees.

Size: 2 bytes

Size for each variant:

• X86: 1 byte
• Arm: 1 byte
• AArch64: 1 byte
• RiscV: 1 byte
• Nvptx: 0 bytes (uninhabited)
• PowerPC: 1 byte
• Hexagon: 1 byte
• LoongArch: 1 byte
• Mips: 1 byte
• S390x: 1 byte
• SpirV: 0 bytes (uninhabited)
• Wasm: 0 bytes (uninhabited)
• Bpf: 1 byte
• Avr: 1 byte
• Msp430: 1 byte
• M68k: 1 byte
• CSKY: 1 byte
• Err: 0 bytes