Skip to main content

Module asm

Module asm 

Source

FunctionsΒ§

a64_reg_index πŸ”’
If the register is an AArch64 integer register then return its index.
a64_vreg_index πŸ”’
If the register is an AArch64 vector register then return its index.
allow_raw_span_inline_asm_srcloc πŸ”’
Whenever inline assembly bitcode is built, its srcloc contains the raw span numbers as location cookies. This is problematic since that is nondeterministic when using the parallel frontend. Even without parallelism, the cookies are meaningless in another rustc session.
any_target_feature_enabled πŸ”’
dummy_output_type πŸ”’
Type to use for outputs that are discarded. It doesn’t really matter what the type is, as long as it is valid for the constraint code.
hexagon_reg_pair_index πŸ”’
If the register is a Hexagon register pair then return its LLVM double register index. LLVM uses d0, d1, … for Hexagon double registers in inline asm constraints, not the assembly-printed r1:0, r3:2, … format.
hexagon_vreg_pair_index πŸ”’
If the register is a Hexagon HVX vector pair then return its LLVM W-register index. LLVM uses w0, w1, … for Hexagon vector pair registers in inline asm constraints.
inline_asm_call πŸ”’
llvm_asm_scalar_type πŸ”’
Helper function to get the LLVM type for a Scalar. Pointers are returned as the equivalent integer type.
llvm_fixup_input πŸ”’
Fix up an input value to work around LLVM bugs.
llvm_fixup_output πŸ”’
Fix up an output value to work around LLVM bugs.
llvm_fixup_output_type πŸ”’
Output type to use for llvm_fixup_output.
modifier_to_llvm πŸ”’
Converts a modifier into LLVM’s equivalent modifier.
reg_to_llvm πŸ”’
Converts a register class to an LLVM constraint code.
xmm_reg_index πŸ”’
If the register is an xmm/ymm/zmm register then return its index.