Function core::arch::riscv32::sha512sum0r

pub unsafe fn sha512sum0r(rs1: u32, rs2: u32) -> u32

🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)

Available on RISC-V RV32 and target feature zknh only.

Implements the Sum0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).

This instruction is implemented on RV32 only. Used to compute the Sum0 transform of the SHA2-512 hash function. The transform is a 64-bit to 64-bit function, so the input and output is represented by two 32-bit registers. This instruction must always be implemented such that its execution latency does not depend on the data being operated on.

Source: RISC-V Cryptography Extensions Volume I: Scalar & Entropy Source Instructions

Version: v1.0.1

Section: 3.35

Safety

This function is safe to use if the zknh target feature is present.