🔬This is a nightly-only experimental API. (

`riscv_ext_intrinsics`

#114544)Available on

**RISC-V RV32**only.## Expand description

Platform-specific intrinsics for the `riscv32`

platform.

See the module documentation for more details.

## Functions§

- add8
Experimental Adds packed 8-bit signed numbers, discarding overflow bits - add16
Experimental Adds packed 16-bit signed numbers, discarding overflow bits - AES final round decryption instruction for RV32.
- AES middle round decryption instruction for RV32.
- AES final round encryption instruction for RV32.
- AES middle round encryption instruction for RV32 with.
- Carry-less multiply (low-part)
- Carry-less multiply (high-part)
- Carry-less multiply (reversed)
- clrs8
Experimental Count the number of redundant sign bits of the packed 8-bit elements - clrs16
Experimental Count the number of redundant sign bits of the packed 16-bit elements - clrs32
Experimental Count the number of redundant sign bits of the packed 32-bit elements - clz8
Experimental Count the number of leading zero bits of the packed 8-bit elements - clz16
Experimental Count the number of leading zero bits of the packed 16-bit elements - clz32
Experimental Count the number of leading zero bits of the packed 32-bit elements - cmpeq8
Experimental Compare equality for packed 8-bit elements - cmpeq16
Experimental Compare equality for packed 16-bit elements - cras16
Experimental Cross adds and subtracts packed 16-bit signed numbers, discarding overflow bits - crsa16
Experimental Cross subtracts and adds packed 16-bit signed numbers, discarding overflow bits - Generates the
`FENCE.I`

instruction - frrm
Experimental Reads the floating-point rounding mode register`frm`

- Hypervisor memory management fence for guest physical address and virtual machine
- Hypervisor memory management fence for all virtual machines and guest physical addresses
- Hypervisor memory management fence for guest physical address
- Hypervisor memory management fence for given virtual machine
- Hypervisor memory management fence for given guest virtual address and guest address space
- Hypervisor memory management fence for all guest address spaces and guest virtual addresses
- Hypervisor memory management fence for given guest address space
- Hypervisor memory management fence for given guest virtual address
- Invalidate hypervisor translation cache for guest physical address and virtual machine
- Invalidate hypervisor translation cache for all virtual machines and guest physical addresses
- Invalidate hypervisor translation cache for guest physical address
- Invalidate hypervisor translation cache for given virtual machine
- Invalidate hypervisor translation cache for given guest virtual address and guest address space
- Invalidate hypervisor translation cache for all guest address spaces and guest virtual addresses
- Invalidate hypervisor translation cache for given guest address space
- Invalidate hypervisor translation cache for given guest virtual address
- Loads virtual machine memory by signed byte integer
- Loads virtual machine memory by unsigned byte integer
- Loads virtual machine memory by signed half integer
- Loads virtual machine memory by unsigned half integer
- Loads virtual machine memory by signed word integer
- Accesses virtual machine instruction by unsigned half integer
- Accesses virtual machine instruction by unsigned word integer
- Stores virtual machine memory by byte integer
- Stores virtual machine memory by half integer
- Stores virtual machine memory by word integer
- kabs8
Experimental Compute the absolute value of packed 8-bit signed integers - kabs16
Experimental Compute the absolute value of packed 16-bit signed integers - kadd8
Experimental Adds packed 8-bit signed numbers, saturating at the numeric bounds - kadd16
Experimental Adds packed 16-bit signed numbers, saturating at the numeric bounds - kaddh
Experimental Adds signed lower 16-bit content of two registers with Q15 saturation - kcras16
Experimental Cross adds and subtracts packed 16-bit signed numbers, saturating at the numeric bounds - kcrsa16
Experimental Cross subtracts and adds packed 16-bit signed numbers, saturating at the numeric bounds - ksll8
Experimental Logical left shift packed 8-bit elements, saturating at the numeric bounds - ksll16
Experimental Logical left shift packed 16-bit elements, saturating at the numeric bounds - kslra8
Experimental Logical saturating left then arithmetic right shift packed 8-bit elements - kslra8u
Experimental Logical saturating left then arithmetic right shift packed 8-bit elements - kslra16
Experimental Logical saturating left then arithmetic right shift packed 16-bit elements - kslra16u
Experimental Logical saturating left then arithmetic right shift packed 16-bit elements - kstas16
Experimental Straight adds and subtracts packed 16-bit signed numbers, saturating at the numeric bounds - kstsa16
Experimental Straight subtracts and adds packed 16-bit signed numbers, saturating at the numeric bounds - ksub8
Experimental Subtracts packed 8-bit signed numbers, saturating at the numeric bounds - ksub16
Experimental Subtracts packed 16-bit signed numbers, saturating at the numeric bounds - ksubh
Experimental Subtracts signed lower 16-bit content of two registers with Q15 saturation - nop
Experimental Generates the`NOP`

instruction - Bitwise OR-Combine, byte granule
- pause
Experimental Generates the`PAUSE`

instruction - pbsad
Experimental Calculate the sum of absolute difference of unsigned 8-bit data elements - pbsada
Experimental Calculate and accumulate the sum of absolute difference of unsigned 8-bit data elements - pkbt16
Experimental Pack two 16-bit data from bottom and top half from 32-bit chunks - pktb16
Experimental Pack two 16-bit data from top and bottom half from 32-bit chunks - radd8
Experimental Halves the sum of packed 8-bit signed numbers, dropping least bits - radd16
Experimental Halves the sum of packed 16-bit signed numbers, dropping least bits - rcras16
Experimental Cross halves of adds and subtracts packed 16-bit signed numbers, dropping least bits - rcrsa16
Experimental Cross halves of subtracts and adds packed 16-bit signed numbers, dropping least bits - rstas16
Experimental Straight halves of adds and subtracts packed 16-bit signed numbers, dropping least bits - rstsa16
Experimental Straight halves of subtracts and adds packed 16-bit signed numbers, dropping least bits - rsub8
Experimental Halves the subtraction result of packed 8-bit signed numbers, dropping least bits - rsub16
Experimental Halves the subtraction result of packed 16-bit signed numbers, dropping least bits - scmple8
Experimental Compare whether 8-bit packed signed integers are less than or equal to the others - scmple16
Experimental Compare whether 16-bit packed signed integers are less than or equal to the others - scmplt8
Experimental Compare whether 8-bit packed signed integers are less than the others - scmplt16
Experimental Compare whether 16-bit packed signed integers are less than the others - Generates the
`SFENCE.INVAL.IR`

instruction - Supervisor memory management fence for given virtual address and address space
- Supervisor memory management fence for all address spaces and virtual addresses
- Supervisor memory management fence for given address space
- Supervisor memory management fence for given virtual address
- Generates the
`SFENCE.W.INVAL`

instruction - Implements the Sigma0 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
- Implements the Sigma1 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
- Implements the Sum0 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
- Implements the Sum1 transformation function as used in the SHA2-256 hash function [49] (Section 4.1.2).
- Implements the high half of the Sigma0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Implements the low half of the Sigma0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Implements the high half of the Sigma1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Implements the low half of the Sigma1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Implements the Sum0 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Implements the Sum1 transformation, as used in the SHA2-512 hash function [49] (Section 4.1.3).
- Invalidate supervisor translation cache for given virtual address and address space
- Invalidate supervisor translation cache for all address spaces and virtual addresses
- Invalidate supervisor translation cache for given address space
- Invalidate supervisor translation cache for given virtual address
- sll8
Experimental Logical left shift packed 8-bit elements, discarding overflow bits - sll16
Experimental Logical left shift packed 16-bit elements, discarding overflow bits - Implements the P0 transformation function as used in the SM3 hash function [4, 30].
- Implements the P1 transformation function as used in the SM3 hash function [4, 30].
- Accelerates the block encrypt/decrypt operation of the SM4 block cipher [5, 31].
- Accelerates the Key Schedule operation of the SM4 block cipher [5, 31] with
`bs=0`

. - smaqa
Experimental Multiply signed 8-bit elements and add 16-bit elements on results for packed 32-bit chunks - smaqasu
Experimental Multiply signed to unsigned 8-bit and add 16-bit elements on results for packed 32-bit chunks - smax8
Experimental Get maximum values from 8-bit packed signed integers - smax16
Experimental Get maximum values from 16-bit packed signed integers - smin8
Experimental Get minimum values from 8-bit packed signed integers - smin16
Experimental Get minimum values from 16-bit packed signed integers - sra8
Experimental Arithmetic right shift packed 8-bit elements without rounding up - sra8u
Experimental Arithmetic right shift packed 8-bit elements with rounding up - sra16
Experimental Arithmetic right shift packed 16-bit elements without rounding up - sra16u
Experimental Arithmetic right shift packed 16-bit elements with rounding up - srl8
Experimental Logical right shift packed 8-bit elements without rounding up - srl8u
Experimental Logical right shift packed 8-bit elements with rounding up - srl16
Experimental Logical right shift packed 16-bit elements without rounding up - srl16u
Experimental Logical right shift packed 16-bit elements with rounding up - stas16
Experimental Straight adds and subtracts packed 16-bit signed numbers, discarding overflow bits - stsa16
Experimental Straight subtracts and adds packed 16-bit signed numbers, discarding overflow bits - sub8
Experimental Subtracts packed 8-bit signed numbers, discarding overflow bits - sub16
Experimental Subtracts packed 16-bit signed numbers, discarding overflow bits - sunpkd810
Experimental Unpack first and zeroth into two 16-bit signed halfwords in each 32-bit chunk - sunpkd820
Experimental Unpack second and zeroth into two 16-bit signed halfwords in each 32-bit chunk - sunpkd830
Experimental Unpack third and zeroth into two 16-bit signed halfwords in each 32-bit chunk - sunpkd831
Experimental Unpack third and first into two 16-bit signed halfwords in each 32-bit chunk - sunpkd832
Experimental Unpack third and second into two 16-bit signed halfwords in each 32-bit chunk - swap8
Experimental Swap the 8-bit bytes within each 16-bit halfword of a register. - swap16
Experimental Swap the 16-bit halfwords within each 32-bit word of a register - ucmple8
Experimental Compare whether 8-bit packed unsigned integers are less than or equal to the others - ucmple16
Experimental Compare whether 16-bit packed unsigned integers are less than or equal to the others - ucmplt8
Experimental Compare whether 8-bit packed unsigned integers are less than the others - ucmplt16
Experimental Compare whether 16-bit packed unsigned integers are less than the others - ukadd8
Experimental Adds packed 8-bit unsigned numbers, saturating at the numeric bounds - ukadd16
Experimental Adds packed 16-bit unsigned numbers, saturating at the numeric bounds - ukaddh
Experimental Adds signed lower 16-bit content of two registers with U16 saturation - ukcras16
Experimental Cross adds and subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds - ukcrsa16
Experimental Cross subtracts and adds packed 16-bit unsigned numbers, saturating at the numeric bounds - ukstas16
Experimental Straight adds and subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds - ukstsa16
Experimental Straight subtracts and adds packed 16-bit unsigned numbers, saturating at the numeric bounds - uksub8
Experimental Subtracts packed 8-bit unsigned numbers, saturating at the numeric bounds - uksub16
Experimental Subtracts packed 16-bit unsigned numbers, saturating at the numeric bounds - uksubh
Experimental Subtracts signed lower 16-bit content of two registers with U16 saturation - umaqa
Experimental Multiply unsigned 8-bit elements and add 16-bit elements on results for packed 32-bit chunks - umax8
Experimental Get maximum values from 8-bit packed unsigned integers - umax16
Experimental Get maximum values from 16-bit packed unsigned integers - umin8
Experimental Get minimum values from 8-bit packed unsigned integers - umin16
Experimental Get minimum values from 16-bit packed unsigned integers - Place odd and even bits of the source word into upper/lower halves of the destination.
- uradd8
Experimental Halves the sum of packed 8-bit unsigned numbers, dropping least bits - uradd16
Experimental Halves the sum of packed 16-bit unsigned numbers, dropping least bits - urcras16
Experimental Cross halves of adds and subtracts packed 16-bit unsigned numbers, dropping least bits - urcrsa16
Experimental Cross halves of subtracts and adds packed 16-bit unsigned numbers, dropping least bits - urstas16
Experimental Straight halves of adds and subtracts packed 16-bit unsigned numbers, dropping least bits - urstsa16
Experimental Straight halves of subtracts and adds packed 16-bit unsigned numbers, dropping least bits - ursub8
Experimental Halves the subtraction result of packed 8-bit unsigned numbers, dropping least bits - ursub16
Experimental Halves the subtraction result of packed 16-bit unsigned numbers, dropping least bits - Generates the
`WFI`

instruction - Nibble-wise lookup of indicies into a vector.
- Byte-wise lookup of indicies into a vector in registers.
- Place upper/lower halves of the source register into odd/even bits of the destination respectivley.
- zunpkd810
Experimental Unpack first and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk - zunpkd820
Experimental Unpack second and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk - zunpkd830
Experimental Unpack third and zeroth into two 16-bit unsigned halfwords in each 32-bit chunk - zunpkd831
Experimental Unpack third and first into two 16-bit unsigned halfwords in each 32-bit chunk - zunpkd832
Experimental Unpack third and second into two 16-bit unsigned halfwords in each 32-bit chunk