Tier: 2

Bare-metal target for CPUs in the Armv7-M architecture family, supporting a subset of the T32 ISA.

Processors in this family include the:

See arm-none-eabi for information applicable to all arm-none-eabi targets.

This target uses the soft-float ABI: functions which take f32 or f64 as arguments will have those values packed into integer registers. This is the only option because there is no FPU support in Armv7-M.

Target maintainers

Target CPU and Target Feature options

See the bare-metal Arm docs for details on how to use these flags.

Table of supported CPUs

CPUFPUTarget CPUTarget Features

Arm Cortex-M3

The target CPU option is cortex-m3.

There are no relevant feature flags, and the FPU is not available.