fn hexagon_vreg_pair_index(reg: InlineAsmReg) -> Option<u32>Expand description
If the register is a Hexagon HVX vector pair then return its LLVM W-register index.
LLVM uses w0, w1, … for Hexagon vector pair registers in inline asm constraints.
fn hexagon_vreg_pair_index(reg: InlineAsmReg) -> Option<u32>If the register is a Hexagon HVX vector pair then return its LLVM W-register index.
LLVM uses w0, w1, … for Hexagon vector pair registers in inline asm constraints.