Function core::arch::riscv64::srl8u

source ·
pub fn srl8u(a: usize, b: u32) -> usize
🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)
Available on RISC-V RV64 only.
Expand description

Logical right shift packed 8-bit elements with rounding up