rustc_target/spec/targets/
riscv32imfc_unknown_none_elf.rs

1use crate::spec::{
2    Arch, Cc, LinkerFlavor, Lld, LlvmAbi, PanicStrategy, RelocModel, Target, TargetMetadata,
3    TargetOptions,
4};
5
6// Bare-metal RV32IMFC for cores that have hardware single-precision float (the `F`
7// extension, with the `ilp32f` ABI) but NO atomic ('a') extension.
8// This is `riscv32imafc-unknown-none-elf` MINUS the atomic extension, handled the
9// same way the in-tree `riscv32imc-unknown-none-elf` handles a no-`a` core:
10// `+forced-atomics` makes atomic load/store lower to plain ld/st (sound on a single
11// hart) while `atomic_cas = false` keeps RMW/CAS off — downstream crates use a
12// critical-section polyfill (e.g. portable-atomic) for those. No lr.w/sc.w/amo* are
13// ever emitted, so it does not trap on a core without the A extension.
14pub(crate) fn target() -> Target {
15    Target {
16        data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
17        llvm_target: "riscv32".into(),
18        metadata: TargetMetadata {
19            description: Some(
20                "Bare RISC-V (RV32IMFC ISA, hardware single-float, no atomics)".into(),
21            ),
22            tier: Some(3),
23            host_tools: Some(false),
24            std: Some(false),
25        },
26        pointer_width: 32,
27        arch: Arch::RiscV32,
28
29        options: TargetOptions {
30            linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
31            linker: Some("rust-lld".into()),
32            cpu: "generic-rv32".into(),
33            max_atomic_width: Some(32),
34            atomic_cas: false,
35            features: "+m,+f,+c,+forced-atomics".into(),
36            llvm_abiname: LlvmAbi::Ilp32f,
37            panic_strategy: PanicStrategy::Abort,
38            relocation_model: RelocModel::Static,
39            emit_debug_gdb_scripts: false,
40            eh_frame_header: false,
41            ..Default::default()
42        },
43    }
44}
rustc_target/spec/targets/riscv32imfc_unknown_none_elf.rs

rustc_target/spec/targets/
riscv32imfc_unknown_none_elf.rs
