core/stdarch/crates/core_arch/src/arm_shared/neon/
mod.rs

1//! ARMv7 NEON intrinsics
2
3#[rustfmt::skip]
4mod generated;
5#[rustfmt::skip]
6#[cfg_attr(not(target_arch = "arm"), stable(feature = "neon_intrinsics", since = "1.59.0"))]
7#[cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
8pub use self::generated::*;
9
10use crate::{core_arch::simd::*, hint::unreachable_unchecked, intrinsics::simd::*, mem::transmute};
11#[cfg(test)]
12use stdarch_test::assert_instr;
13
14pub(crate) type p8 = u8;
15pub(crate) type p16 = u16;
16pub(crate) type p64 = u64;
17pub(crate) type p128 = u128;
18
19types! {
20    #![cfg_attr(not(target_arch = "arm"), stable(feature = "neon_intrinsics", since = "1.59.0"))]
21    #![cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
22
23    /// ARM-specific 64-bit wide vector of eight packed `i8`.
24    pub struct int8x8_t(8 x pub(crate) i8);
25    /// ARM-specific 64-bit wide vector of eight packed `u8`.
26    pub struct uint8x8_t(8 x pub(crate) u8);
27    /// ARM-specific 64-bit wide polynomial vector of eight packed `p8`.
28    pub struct poly8x8_t(8 x pub(crate) p8);
29    /// ARM-specific 64-bit wide vector of four packed `i16`.
30    pub struct int16x4_t(4 x pub(crate) i16);
31    /// ARM-specific 64-bit wide vector of four packed `u16`.
32    pub struct uint16x4_t(4 x pub(crate) u16);
33    // FIXME: ARM-specific 64-bit wide vector of four packed `f16`.
34    // pub struct float16x4_t(f16, f16, f16, f16);
35    /// ARM-specific 64-bit wide vector of four packed `p16`.
36    pub struct poly16x4_t(4 x pub(crate) p16);
37    /// ARM-specific 64-bit wide vector of two packed `i32`.
38    pub struct int32x2_t(2 x pub(crate) i32);
39    /// ARM-specific 64-bit wide vector of two packed `u32`.
40    pub struct uint32x2_t(2 x pub(crate) u32);
41    /// ARM-specific 64-bit wide vector of two packed `f32`.
42    pub struct float32x2_t(2 x pub(crate) f32);
43    /// ARM-specific 64-bit wide vector of one packed `i64`.
44    pub struct int64x1_t(1 x pub(crate) i64);
45    /// ARM-specific 64-bit wide vector of one packed `u64`.
46    pub struct uint64x1_t(1 x pub(crate) u64);
47    /// ARM-specific 64-bit wide vector of one packed `p64`.
48    pub struct poly64x1_t(1 x pub(crate) p64);
49
50    /// ARM-specific 128-bit wide vector of sixteen packed `i8`.
51    pub struct int8x16_t(16 x pub(crate) i8);
52    /// ARM-specific 128-bit wide vector of sixteen packed `u8`.
53    pub struct uint8x16_t(16 x pub(crate) u8);
54    /// ARM-specific 128-bit wide vector of sixteen packed `p8`.
55    pub struct poly8x16_t(16 x pub(crate) p8);
56    /// ARM-specific 128-bit wide vector of eight packed `i16`.
57    pub struct int16x8_t(8 x pub(crate) i16);
58    /// ARM-specific 128-bit wide vector of eight packed `u16`.
59    pub struct uint16x8_t(8 x pub(crate) u16);
60    // FIXME: ARM-specific 128-bit wide vector of eight packed `f16`.
61    // pub struct float16x8_t(f16, f16, f16, f16, f16, f16, f16);
62    /// ARM-specific 128-bit wide vector of eight packed `p16`.
63    pub struct poly16x8_t(8 x pub(crate) p16);
64    /// ARM-specific 128-bit wide vector of four packed `i32`.
65    pub struct int32x4_t(4 x pub(crate) i32);
66    /// ARM-specific 128-bit wide vector of four packed `u32`.
67    pub struct uint32x4_t(4 x pub(crate) u32);
68    /// ARM-specific 128-bit wide vector of four packed `f32`.
69    pub struct float32x4_t(4 x pub(crate) f32);
70    /// ARM-specific 128-bit wide vector of two packed `i64`.
71    pub struct int64x2_t(2 x pub(crate) i64);
72    /// ARM-specific 128-bit wide vector of two packed `u64`.
73    pub struct uint64x2_t(2 x pub(crate) u64);
74    /// ARM-specific 128-bit wide vector of two packed `p64`.
75    pub struct poly64x2_t(2 x pub(crate) p64);
76}
77
78/// ARM-specific type containing two `int8x8_t` vectors.
79#[repr(C)]
80#[derive(Copy, Clone, Debug)]
81#[cfg_attr(
82    not(target_arch = "arm"),
83    stable(feature = "neon_intrinsics", since = "1.59.0")
84)]
85#[cfg_attr(
86    target_arch = "arm",
87    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
88)]
89pub struct int8x8x2_t(pub int8x8_t, pub int8x8_t);
90/// ARM-specific type containing three `int8x8_t` vectors.
91#[repr(C)]
92#[derive(Copy, Clone, Debug)]
93#[cfg_attr(
94    not(target_arch = "arm"),
95    stable(feature = "neon_intrinsics", since = "1.59.0")
96)]
97#[cfg_attr(
98    target_arch = "arm",
99    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
100)]
101pub struct int8x8x3_t(pub int8x8_t, pub int8x8_t, pub int8x8_t);
102/// ARM-specific type containing four `int8x8_t` vectors.
103#[repr(C)]
104#[derive(Copy, Clone, Debug)]
105#[cfg_attr(
106    not(target_arch = "arm"),
107    stable(feature = "neon_intrinsics", since = "1.59.0")
108)]
109#[cfg_attr(
110    target_arch = "arm",
111    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
112)]
113pub struct int8x8x4_t(pub int8x8_t, pub int8x8_t, pub int8x8_t, pub int8x8_t);
114
115/// ARM-specific type containing two `int8x16_t` vectors.
116#[repr(C)]
117#[derive(Copy, Clone, Debug)]
118#[cfg_attr(
119    not(target_arch = "arm"),
120    stable(feature = "neon_intrinsics", since = "1.59.0")
121)]
122#[cfg_attr(
123    target_arch = "arm",
124    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
125)]
126pub struct int8x16x2_t(pub int8x16_t, pub int8x16_t);
127/// ARM-specific type containing three `int8x16_t` vectors.
128#[repr(C)]
129#[derive(Copy, Clone, Debug)]
130#[cfg_attr(
131    not(target_arch = "arm"),
132    stable(feature = "neon_intrinsics", since = "1.59.0")
133)]
134#[cfg_attr(
135    target_arch = "arm",
136    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
137)]
138pub struct int8x16x3_t(pub int8x16_t, pub int8x16_t, pub int8x16_t);
139/// ARM-specific type containing four `int8x16_t` vectors.
140#[repr(C)]
141#[derive(Copy, Clone, Debug)]
142#[cfg_attr(
143    not(target_arch = "arm"),
144    stable(feature = "neon_intrinsics", since = "1.59.0")
145)]
146#[cfg_attr(
147    target_arch = "arm",
148    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
149)]
150pub struct int8x16x4_t(pub int8x16_t, pub int8x16_t, pub int8x16_t, pub int8x16_t);
151
152/// ARM-specific type containing two `uint8x8_t` vectors.
153#[repr(C)]
154#[derive(Copy, Clone, Debug)]
155#[cfg_attr(
156    not(target_arch = "arm"),
157    stable(feature = "neon_intrinsics", since = "1.59.0")
158)]
159#[cfg_attr(
160    target_arch = "arm",
161    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
162)]
163pub struct uint8x8x2_t(pub uint8x8_t, pub uint8x8_t);
164/// ARM-specific type containing three `uint8x8_t` vectors.
165#[repr(C)]
166#[derive(Copy, Clone, Debug)]
167#[cfg_attr(
168    not(target_arch = "arm"),
169    stable(feature = "neon_intrinsics", since = "1.59.0")
170)]
171#[cfg_attr(
172    target_arch = "arm",
173    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
174)]
175pub struct uint8x8x3_t(pub uint8x8_t, pub uint8x8_t, pub uint8x8_t);
176/// ARM-specific type containing four `uint8x8_t` vectors.
177#[repr(C)]
178#[derive(Copy, Clone, Debug)]
179#[cfg_attr(
180    not(target_arch = "arm"),
181    stable(feature = "neon_intrinsics", since = "1.59.0")
182)]
183#[cfg_attr(
184    target_arch = "arm",
185    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
186)]
187pub struct uint8x8x4_t(pub uint8x8_t, pub uint8x8_t, pub uint8x8_t, pub uint8x8_t);
188
189/// ARM-specific type containing two `uint8x16_t` vectors.
190#[repr(C)]
191#[derive(Copy, Clone, Debug)]
192#[cfg_attr(
193    not(target_arch = "arm"),
194    stable(feature = "neon_intrinsics", since = "1.59.0")
195)]
196#[cfg_attr(
197    target_arch = "arm",
198    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
199)]
200pub struct uint8x16x2_t(pub uint8x16_t, pub uint8x16_t);
201/// ARM-specific type containing three `uint8x16_t` vectors.
202#[repr(C)]
203#[derive(Copy, Clone, Debug)]
204#[cfg_attr(
205    not(target_arch = "arm"),
206    stable(feature = "neon_intrinsics", since = "1.59.0")
207)]
208#[cfg_attr(
209    target_arch = "arm",
210    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
211)]
212pub struct uint8x16x3_t(pub uint8x16_t, pub uint8x16_t, pub uint8x16_t);
213/// ARM-specific type containing four `uint8x16_t` vectors.
214#[repr(C)]
215#[derive(Copy, Clone, Debug)]
216#[cfg_attr(
217    not(target_arch = "arm"),
218    stable(feature = "neon_intrinsics", since = "1.59.0")
219)]
220#[cfg_attr(
221    target_arch = "arm",
222    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
223)]
224pub struct uint8x16x4_t(
225    pub uint8x16_t,
226    pub uint8x16_t,
227    pub uint8x16_t,
228    pub uint8x16_t,
229);
230
231/// ARM-specific type containing two `poly8x8_t` vectors.
232#[repr(C)]
233#[derive(Copy, Clone, Debug)]
234#[cfg_attr(
235    not(target_arch = "arm"),
236    stable(feature = "neon_intrinsics", since = "1.59.0")
237)]
238#[cfg_attr(
239    target_arch = "arm",
240    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
241)]
242pub struct poly8x8x2_t(pub poly8x8_t, pub poly8x8_t);
243/// ARM-specific type containing three `poly8x8_t` vectors.
244#[repr(C)]
245#[derive(Copy, Clone, Debug)]
246#[cfg_attr(
247    not(target_arch = "arm"),
248    stable(feature = "neon_intrinsics", since = "1.59.0")
249)]
250#[cfg_attr(
251    target_arch = "arm",
252    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
253)]
254pub struct poly8x8x3_t(pub poly8x8_t, pub poly8x8_t, pub poly8x8_t);
255/// ARM-specific type containing four `poly8x8_t` vectors.
256#[repr(C)]
257#[derive(Copy, Clone, Debug)]
258#[cfg_attr(
259    not(target_arch = "arm"),
260    stable(feature = "neon_intrinsics", since = "1.59.0")
261)]
262#[cfg_attr(
263    target_arch = "arm",
264    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
265)]
266pub struct poly8x8x4_t(pub poly8x8_t, pub poly8x8_t, pub poly8x8_t, pub poly8x8_t);
267
268/// ARM-specific type containing two `poly8x16_t` vectors.
269#[repr(C)]
270#[derive(Copy, Clone, Debug)]
271#[cfg_attr(
272    not(target_arch = "arm"),
273    stable(feature = "neon_intrinsics", since = "1.59.0")
274)]
275#[cfg_attr(
276    target_arch = "arm",
277    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
278)]
279pub struct poly8x16x2_t(pub poly8x16_t, pub poly8x16_t);
280/// ARM-specific type containing three `poly8x16_t` vectors.
281#[repr(C)]
282#[derive(Copy, Clone, Debug)]
283#[cfg_attr(
284    not(target_arch = "arm"),
285    stable(feature = "neon_intrinsics", since = "1.59.0")
286)]
287#[cfg_attr(
288    target_arch = "arm",
289    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
290)]
291pub struct poly8x16x3_t(pub poly8x16_t, pub poly8x16_t, pub poly8x16_t);
292/// ARM-specific type containing four `poly8x16_t` vectors.
293#[repr(C)]
294#[derive(Copy, Clone, Debug)]
295#[cfg_attr(
296    not(target_arch = "arm"),
297    stable(feature = "neon_intrinsics", since = "1.59.0")
298)]
299#[cfg_attr(
300    target_arch = "arm",
301    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
302)]
303pub struct poly8x16x4_t(
304    pub poly8x16_t,
305    pub poly8x16_t,
306    pub poly8x16_t,
307    pub poly8x16_t,
308);
309
310/// ARM-specific type containing two `int16x4_t` vectors.
311#[repr(C)]
312#[derive(Copy, Clone, Debug)]
313#[cfg_attr(
314    not(target_arch = "arm"),
315    stable(feature = "neon_intrinsics", since = "1.59.0")
316)]
317#[cfg_attr(
318    target_arch = "arm",
319    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
320)]
321pub struct int16x4x2_t(pub int16x4_t, pub int16x4_t);
322/// ARM-specific type containing three `int16x4_t` vectors.
323#[repr(C)]
324#[derive(Copy, Clone, Debug)]
325#[cfg_attr(
326    not(target_arch = "arm"),
327    stable(feature = "neon_intrinsics", since = "1.59.0")
328)]
329#[cfg_attr(
330    target_arch = "arm",
331    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
332)]
333pub struct int16x4x3_t(pub int16x4_t, pub int16x4_t, pub int16x4_t);
334/// ARM-specific type containing four `int16x4_t` vectors.
335#[repr(C)]
336#[derive(Copy, Clone, Debug)]
337#[cfg_attr(
338    not(target_arch = "arm"),
339    stable(feature = "neon_intrinsics", since = "1.59.0")
340)]
341#[cfg_attr(
342    target_arch = "arm",
343    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
344)]
345pub struct int16x4x4_t(pub int16x4_t, pub int16x4_t, pub int16x4_t, pub int16x4_t);
346
347/// ARM-specific type containing two `int16x8_t` vectors.
348#[repr(C)]
349#[derive(Copy, Clone, Debug)]
350#[cfg_attr(
351    not(target_arch = "arm"),
352    stable(feature = "neon_intrinsics", since = "1.59.0")
353)]
354#[cfg_attr(
355    target_arch = "arm",
356    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
357)]
358pub struct int16x8x2_t(pub int16x8_t, pub int16x8_t);
359/// ARM-specific type containing three `int16x8_t` vectors.
360#[repr(C)]
361#[derive(Copy, Clone, Debug)]
362#[cfg_attr(
363    not(target_arch = "arm"),
364    stable(feature = "neon_intrinsics", since = "1.59.0")
365)]
366#[cfg_attr(
367    target_arch = "arm",
368    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
369)]
370pub struct int16x8x3_t(pub int16x8_t, pub int16x8_t, pub int16x8_t);
371/// ARM-specific type containing four `int16x8_t` vectors.
372#[repr(C)]
373#[derive(Copy, Clone, Debug)]
374#[cfg_attr(
375    not(target_arch = "arm"),
376    stable(feature = "neon_intrinsics", since = "1.59.0")
377)]
378#[cfg_attr(
379    target_arch = "arm",
380    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
381)]
382pub struct int16x8x4_t(pub int16x8_t, pub int16x8_t, pub int16x8_t, pub int16x8_t);
383
384/// ARM-specific type containing two `uint16x4_t` vectors.
385#[repr(C)]
386#[derive(Copy, Clone, Debug)]
387#[cfg_attr(
388    not(target_arch = "arm"),
389    stable(feature = "neon_intrinsics", since = "1.59.0")
390)]
391#[cfg_attr(
392    target_arch = "arm",
393    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
394)]
395pub struct uint16x4x2_t(pub uint16x4_t, pub uint16x4_t);
396/// ARM-specific type containing three `uint16x4_t` vectors.
397#[repr(C)]
398#[derive(Copy, Clone, Debug)]
399#[cfg_attr(
400    not(target_arch = "arm"),
401    stable(feature = "neon_intrinsics", since = "1.59.0")
402)]
403#[cfg_attr(
404    target_arch = "arm",
405    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
406)]
407pub struct uint16x4x3_t(pub uint16x4_t, pub uint16x4_t, pub uint16x4_t);
408/// ARM-specific type containing four `uint16x4_t` vectors.
409#[repr(C)]
410#[derive(Copy, Clone, Debug)]
411#[cfg_attr(
412    not(target_arch = "arm"),
413    stable(feature = "neon_intrinsics", since = "1.59.0")
414)]
415#[cfg_attr(
416    target_arch = "arm",
417    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
418)]
419pub struct uint16x4x4_t(
420    pub uint16x4_t,
421    pub uint16x4_t,
422    pub uint16x4_t,
423    pub uint16x4_t,
424);
425
426/// ARM-specific type containing two `uint16x8_t` vectors.
427#[repr(C)]
428#[derive(Copy, Clone, Debug)]
429#[cfg_attr(
430    not(target_arch = "arm"),
431    stable(feature = "neon_intrinsics", since = "1.59.0")
432)]
433#[cfg_attr(
434    target_arch = "arm",
435    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
436)]
437pub struct uint16x8x2_t(pub uint16x8_t, pub uint16x8_t);
438/// ARM-specific type containing three `uint16x8_t` vectors.
439#[repr(C)]
440#[derive(Copy, Clone, Debug)]
441#[cfg_attr(
442    not(target_arch = "arm"),
443    stable(feature = "neon_intrinsics", since = "1.59.0")
444)]
445#[cfg_attr(
446    target_arch = "arm",
447    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
448)]
449pub struct uint16x8x3_t(pub uint16x8_t, pub uint16x8_t, pub uint16x8_t);
450/// ARM-specific type containing four `uint16x8_t` vectors.
451#[repr(C)]
452#[derive(Copy, Clone, Debug)]
453#[cfg_attr(
454    not(target_arch = "arm"),
455    stable(feature = "neon_intrinsics", since = "1.59.0")
456)]
457#[cfg_attr(
458    target_arch = "arm",
459    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
460)]
461pub struct uint16x8x4_t(
462    pub uint16x8_t,
463    pub uint16x8_t,
464    pub uint16x8_t,
465    pub uint16x8_t,
466);
467
468/// ARM-specific type containing two `poly16x4_t` vectors.
469#[repr(C)]
470#[derive(Copy, Clone, Debug)]
471#[cfg_attr(
472    not(target_arch = "arm"),
473    stable(feature = "neon_intrinsics", since = "1.59.0")
474)]
475#[cfg_attr(
476    target_arch = "arm",
477    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
478)]
479pub struct poly16x4x2_t(pub poly16x4_t, pub poly16x4_t);
480/// ARM-specific type containing three `poly16x4_t` vectors.
481#[repr(C)]
482#[derive(Copy, Clone, Debug)]
483#[cfg_attr(
484    not(target_arch = "arm"),
485    stable(feature = "neon_intrinsics", since = "1.59.0")
486)]
487#[cfg_attr(
488    target_arch = "arm",
489    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
490)]
491pub struct poly16x4x3_t(pub poly16x4_t, pub poly16x4_t, pub poly16x4_t);
492/// ARM-specific type containing four `poly16x4_t` vectors.
493#[repr(C)]
494#[derive(Copy, Clone, Debug)]
495#[cfg_attr(
496    not(target_arch = "arm"),
497    stable(feature = "neon_intrinsics", since = "1.59.0")
498)]
499#[cfg_attr(
500    target_arch = "arm",
501    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
502)]
503pub struct poly16x4x4_t(
504    pub poly16x4_t,
505    pub poly16x4_t,
506    pub poly16x4_t,
507    pub poly16x4_t,
508);
509
510/// ARM-specific type containing two `poly16x8_t` vectors.
511#[repr(C)]
512#[derive(Copy, Clone, Debug)]
513#[cfg_attr(
514    not(target_arch = "arm"),
515    stable(feature = "neon_intrinsics", since = "1.59.0")
516)]
517#[cfg_attr(
518    target_arch = "arm",
519    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
520)]
521pub struct poly16x8x2_t(pub poly16x8_t, pub poly16x8_t);
522/// ARM-specific type containing three `poly16x8_t` vectors.
523#[repr(C)]
524#[derive(Copy, Clone, Debug)]
525#[cfg_attr(
526    not(target_arch = "arm"),
527    stable(feature = "neon_intrinsics", since = "1.59.0")
528)]
529#[cfg_attr(
530    target_arch = "arm",
531    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
532)]
533pub struct poly16x8x3_t(pub poly16x8_t, pub poly16x8_t, pub poly16x8_t);
534/// ARM-specific type containing four `poly16x8_t` vectors.
535#[repr(C)]
536#[derive(Copy, Clone, Debug)]
537#[cfg_attr(
538    not(target_arch = "arm"),
539    stable(feature = "neon_intrinsics", since = "1.59.0")
540)]
541#[cfg_attr(
542    target_arch = "arm",
543    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
544)]
545pub struct poly16x8x4_t(
546    pub poly16x8_t,
547    pub poly16x8_t,
548    pub poly16x8_t,
549    pub poly16x8_t,
550);
551
552/// ARM-specific type containing two `int32x2_t` vectors.
553#[repr(C)]
554#[derive(Copy, Clone, Debug)]
555#[cfg_attr(
556    not(target_arch = "arm"),
557    stable(feature = "neon_intrinsics", since = "1.59.0")
558)]
559#[cfg_attr(
560    target_arch = "arm",
561    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
562)]
563pub struct int32x2x2_t(pub int32x2_t, pub int32x2_t);
564/// ARM-specific type containing three `int32x2_t` vectors.
565#[repr(C)]
566#[derive(Copy, Clone, Debug)]
567#[cfg_attr(
568    not(target_arch = "arm"),
569    stable(feature = "neon_intrinsics", since = "1.59.0")
570)]
571#[cfg_attr(
572    target_arch = "arm",
573    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
574)]
575pub struct int32x2x3_t(pub int32x2_t, pub int32x2_t, pub int32x2_t);
576/// ARM-specific type containing four `int32x2_t` vectors.
577#[repr(C)]
578#[derive(Copy, Clone, Debug)]
579#[cfg_attr(
580    not(target_arch = "arm"),
581    stable(feature = "neon_intrinsics", since = "1.59.0")
582)]
583#[cfg_attr(
584    target_arch = "arm",
585    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
586)]
587pub struct int32x2x4_t(pub int32x2_t, pub int32x2_t, pub int32x2_t, pub int32x2_t);
588
589/// ARM-specific type containing two `int32x4_t` vectors.
590#[repr(C)]
591#[derive(Copy, Clone, Debug)]
592#[cfg_attr(
593    not(target_arch = "arm"),
594    stable(feature = "neon_intrinsics", since = "1.59.0")
595)]
596#[cfg_attr(
597    target_arch = "arm",
598    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
599)]
600pub struct int32x4x2_t(pub int32x4_t, pub int32x4_t);
601/// ARM-specific type containing three `int32x4_t` vectors.
602#[repr(C)]
603#[derive(Copy, Clone, Debug)]
604#[cfg_attr(
605    not(target_arch = "arm"),
606    stable(feature = "neon_intrinsics", since = "1.59.0")
607)]
608#[cfg_attr(
609    target_arch = "arm",
610    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
611)]
612pub struct int32x4x3_t(pub int32x4_t, pub int32x4_t, pub int32x4_t);
613/// ARM-specific type containing four `int32x4_t` vectors.
614#[repr(C)]
615#[derive(Copy, Clone, Debug)]
616#[cfg_attr(
617    not(target_arch = "arm"),
618    stable(feature = "neon_intrinsics", since = "1.59.0")
619)]
620#[cfg_attr(
621    target_arch = "arm",
622    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
623)]
624pub struct int32x4x4_t(pub int32x4_t, pub int32x4_t, pub int32x4_t, pub int32x4_t);
625
626/// ARM-specific type containing two `uint32x2_t` vectors.
627#[repr(C)]
628#[derive(Copy, Clone, Debug)]
629#[cfg_attr(
630    not(target_arch = "arm"),
631    stable(feature = "neon_intrinsics", since = "1.59.0")
632)]
633#[cfg_attr(
634    target_arch = "arm",
635    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
636)]
637pub struct uint32x2x2_t(pub uint32x2_t, pub uint32x2_t);
638/// ARM-specific type containing three `uint32x2_t` vectors.
639#[repr(C)]
640#[derive(Copy, Clone, Debug)]
641#[cfg_attr(
642    not(target_arch = "arm"),
643    stable(feature = "neon_intrinsics", since = "1.59.0")
644)]
645#[cfg_attr(
646    target_arch = "arm",
647    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
648)]
649pub struct uint32x2x3_t(pub uint32x2_t, pub uint32x2_t, pub uint32x2_t);
650/// ARM-specific type containing four `uint32x2_t` vectors.
651#[repr(C)]
652#[derive(Copy, Clone, Debug)]
653#[cfg_attr(
654    not(target_arch = "arm"),
655    stable(feature = "neon_intrinsics", since = "1.59.0")
656)]
657#[cfg_attr(
658    target_arch = "arm",
659    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
660)]
661pub struct uint32x2x4_t(
662    pub uint32x2_t,
663    pub uint32x2_t,
664    pub uint32x2_t,
665    pub uint32x2_t,
666);
667
668/// ARM-specific type containing two `uint32x4_t` vectors.
669#[repr(C)]
670#[derive(Copy, Clone, Debug)]
671#[cfg_attr(
672    not(target_arch = "arm"),
673    stable(feature = "neon_intrinsics", since = "1.59.0")
674)]
675#[cfg_attr(
676    target_arch = "arm",
677    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
678)]
679pub struct uint32x4x2_t(pub uint32x4_t, pub uint32x4_t);
680/// ARM-specific type containing three `uint32x4_t` vectors.
681#[repr(C)]
682#[derive(Copy, Clone, Debug)]
683#[cfg_attr(
684    not(target_arch = "arm"),
685    stable(feature = "neon_intrinsics", since = "1.59.0")
686)]
687#[cfg_attr(
688    target_arch = "arm",
689    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
690)]
691pub struct uint32x4x3_t(pub uint32x4_t, pub uint32x4_t, pub uint32x4_t);
692/// ARM-specific type containing four `uint32x4_t` vectors.
693#[repr(C)]
694#[derive(Copy, Clone, Debug)]
695#[cfg_attr(
696    not(target_arch = "arm"),
697    stable(feature = "neon_intrinsics", since = "1.59.0")
698)]
699#[cfg_attr(
700    target_arch = "arm",
701    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
702)]
703pub struct uint32x4x4_t(
704    pub uint32x4_t,
705    pub uint32x4_t,
706    pub uint32x4_t,
707    pub uint32x4_t,
708);
709
710/// ARM-specific type containing two `float32x2_t` vectors.
711#[repr(C)]
712#[derive(Copy, Clone, Debug)]
713#[cfg_attr(
714    not(target_arch = "arm"),
715    stable(feature = "neon_intrinsics", since = "1.59.0")
716)]
717#[cfg_attr(
718    target_arch = "arm",
719    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
720)]
721pub struct float32x2x2_t(pub float32x2_t, pub float32x2_t);
722/// ARM-specific type containing three `float32x2_t` vectors.
723#[repr(C)]
724#[derive(Copy, Clone, Debug)]
725#[cfg_attr(
726    not(target_arch = "arm"),
727    stable(feature = "neon_intrinsics", since = "1.59.0")
728)]
729#[cfg_attr(
730    target_arch = "arm",
731    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
732)]
733pub struct float32x2x3_t(pub float32x2_t, pub float32x2_t, pub float32x2_t);
734/// ARM-specific type containing four `float32x2_t` vectors.
735#[repr(C)]
736#[derive(Copy, Clone, Debug)]
737#[cfg_attr(
738    not(target_arch = "arm"),
739    stable(feature = "neon_intrinsics", since = "1.59.0")
740)]
741#[cfg_attr(
742    target_arch = "arm",
743    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
744)]
745pub struct float32x2x4_t(
746    pub float32x2_t,
747    pub float32x2_t,
748    pub float32x2_t,
749    pub float32x2_t,
750);
751
752/// ARM-specific type containing two `float32x4_t` vectors.
753#[repr(C)]
754#[derive(Copy, Clone, Debug)]
755#[cfg_attr(
756    not(target_arch = "arm"),
757    stable(feature = "neon_intrinsics", since = "1.59.0")
758)]
759#[cfg_attr(
760    target_arch = "arm",
761    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
762)]
763pub struct float32x4x2_t(pub float32x4_t, pub float32x4_t);
764/// ARM-specific type containing three `float32x4_t` vectors.
765#[repr(C)]
766#[derive(Copy, Clone, Debug)]
767#[cfg_attr(
768    not(target_arch = "arm"),
769    stable(feature = "neon_intrinsics", since = "1.59.0")
770)]
771#[cfg_attr(
772    target_arch = "arm",
773    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
774)]
775pub struct float32x4x3_t(pub float32x4_t, pub float32x4_t, pub float32x4_t);
776/// ARM-specific type containing four `float32x4_t` vectors.
777#[repr(C)]
778#[derive(Copy, Clone, Debug)]
779#[cfg_attr(
780    not(target_arch = "arm"),
781    stable(feature = "neon_intrinsics", since = "1.59.0")
782)]
783#[cfg_attr(
784    target_arch = "arm",
785    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
786)]
787pub struct float32x4x4_t(
788    pub float32x4_t,
789    pub float32x4_t,
790    pub float32x4_t,
791    pub float32x4_t,
792);
793
794/// ARM-specific type containing two `int64x1_t` vectors.
795#[repr(C)]
796#[derive(Copy, Clone, Debug)]
797#[cfg_attr(
798    not(target_arch = "arm"),
799    stable(feature = "neon_intrinsics", since = "1.59.0")
800)]
801#[cfg_attr(
802    target_arch = "arm",
803    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
804)]
805pub struct int64x1x2_t(pub int64x1_t, pub int64x1_t);
806/// ARM-specific type containing three `int64x1_t` vectors.
807#[repr(C)]
808#[derive(Copy, Clone, Debug)]
809#[cfg_attr(
810    not(target_arch = "arm"),
811    stable(feature = "neon_intrinsics", since = "1.59.0")
812)]
813#[cfg_attr(
814    target_arch = "arm",
815    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
816)]
817pub struct int64x1x3_t(pub int64x1_t, pub int64x1_t, pub int64x1_t);
818/// ARM-specific type containing four `int64x1_t` vectors.
819#[repr(C)]
820#[derive(Copy, Clone, Debug)]
821#[cfg_attr(
822    not(target_arch = "arm"),
823    stable(feature = "neon_intrinsics", since = "1.59.0")
824)]
825#[cfg_attr(
826    target_arch = "arm",
827    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
828)]
829pub struct int64x1x4_t(pub int64x1_t, pub int64x1_t, pub int64x1_t, pub int64x1_t);
830
831/// ARM-specific type containing two `int64x2_t` vectors.
832#[repr(C)]
833#[derive(Copy, Clone, Debug)]
834#[cfg_attr(
835    not(target_arch = "arm"),
836    stable(feature = "neon_intrinsics", since = "1.59.0")
837)]
838#[cfg_attr(
839    target_arch = "arm",
840    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
841)]
842pub struct int64x2x2_t(pub int64x2_t, pub int64x2_t);
843/// ARM-specific type containing three `int64x2_t` vectors.
844#[repr(C)]
845#[derive(Copy, Clone, Debug)]
846#[cfg_attr(
847    not(target_arch = "arm"),
848    stable(feature = "neon_intrinsics", since = "1.59.0")
849)]
850#[cfg_attr(
851    target_arch = "arm",
852    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
853)]
854pub struct int64x2x3_t(pub int64x2_t, pub int64x2_t, pub int64x2_t);
855/// ARM-specific type containing four `int64x2_t` vectors.
856#[repr(C)]
857#[derive(Copy, Clone, Debug)]
858#[cfg_attr(
859    not(target_arch = "arm"),
860    stable(feature = "neon_intrinsics", since = "1.59.0")
861)]
862#[cfg_attr(
863    target_arch = "arm",
864    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
865)]
866pub struct int64x2x4_t(pub int64x2_t, pub int64x2_t, pub int64x2_t, pub int64x2_t);
867
868/// ARM-specific type containing two `uint64x1_t` vectors.
869#[repr(C)]
870#[derive(Copy, Clone, Debug)]
871#[cfg_attr(
872    not(target_arch = "arm"),
873    stable(feature = "neon_intrinsics", since = "1.59.0")
874)]
875#[cfg_attr(
876    target_arch = "arm",
877    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
878)]
879pub struct uint64x1x2_t(pub uint64x1_t, pub uint64x1_t);
880/// ARM-specific type containing three `uint64x1_t` vectors.
881#[repr(C)]
882#[derive(Copy, Clone, Debug)]
883#[cfg_attr(
884    not(target_arch = "arm"),
885    stable(feature = "neon_intrinsics", since = "1.59.0")
886)]
887#[cfg_attr(
888    target_arch = "arm",
889    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
890)]
891pub struct uint64x1x3_t(pub uint64x1_t, pub uint64x1_t, pub uint64x1_t);
892/// ARM-specific type containing four `uint64x1_t` vectors.
893#[repr(C)]
894#[derive(Copy, Clone, Debug)]
895#[cfg_attr(
896    not(target_arch = "arm"),
897    stable(feature = "neon_intrinsics", since = "1.59.0")
898)]
899#[cfg_attr(
900    target_arch = "arm",
901    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
902)]
903pub struct uint64x1x4_t(
904    pub uint64x1_t,
905    pub uint64x1_t,
906    pub uint64x1_t,
907    pub uint64x1_t,
908);
909
910/// ARM-specific type containing two `uint64x2_t` vectors.
911#[repr(C)]
912#[derive(Copy, Clone, Debug)]
913#[cfg_attr(
914    not(target_arch = "arm"),
915    stable(feature = "neon_intrinsics", since = "1.59.0")
916)]
917#[cfg_attr(
918    target_arch = "arm",
919    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
920)]
921pub struct uint64x2x2_t(pub uint64x2_t, pub uint64x2_t);
922/// ARM-specific type containing three `uint64x2_t` vectors.
923#[repr(C)]
924#[derive(Copy, Clone, Debug)]
925#[cfg_attr(
926    not(target_arch = "arm"),
927    stable(feature = "neon_intrinsics", since = "1.59.0")
928)]
929#[cfg_attr(
930    target_arch = "arm",
931    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
932)]
933pub struct uint64x2x3_t(pub uint64x2_t, pub uint64x2_t, pub uint64x2_t);
934/// ARM-specific type containing four `uint64x2_t` vectors.
935#[repr(C)]
936#[derive(Copy, Clone, Debug)]
937#[cfg_attr(
938    not(target_arch = "arm"),
939    stable(feature = "neon_intrinsics", since = "1.59.0")
940)]
941#[cfg_attr(
942    target_arch = "arm",
943    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
944)]
945pub struct uint64x2x4_t(
946    pub uint64x2_t,
947    pub uint64x2_t,
948    pub uint64x2_t,
949    pub uint64x2_t,
950);
951
952/// ARM-specific type containing two `poly64x1_t` vectors.
953#[repr(C)]
954#[derive(Copy, Clone, Debug)]
955#[cfg_attr(
956    not(target_arch = "arm"),
957    stable(feature = "neon_intrinsics", since = "1.59.0")
958)]
959#[cfg_attr(
960    target_arch = "arm",
961    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
962)]
963pub struct poly64x1x2_t(pub poly64x1_t, pub poly64x1_t);
964/// ARM-specific type containing three `poly64x1_t` vectors.
965#[repr(C)]
966#[derive(Copy, Clone, Debug)]
967#[cfg_attr(
968    not(target_arch = "arm"),
969    stable(feature = "neon_intrinsics", since = "1.59.0")
970)]
971#[cfg_attr(
972    target_arch = "arm",
973    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
974)]
975pub struct poly64x1x3_t(pub poly64x1_t, pub poly64x1_t, pub poly64x1_t);
976/// ARM-specific type containing four `poly64x1_t` vectors.
977#[repr(C)]
978#[derive(Copy, Clone, Debug)]
979#[cfg_attr(
980    not(target_arch = "arm"),
981    stable(feature = "neon_intrinsics", since = "1.59.0")
982)]
983#[cfg_attr(
984    target_arch = "arm",
985    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
986)]
987pub struct poly64x1x4_t(
988    pub poly64x1_t,
989    pub poly64x1_t,
990    pub poly64x1_t,
991    pub poly64x1_t,
992);
993
994/// ARM-specific type containing two `poly64x2_t` vectors.
995#[repr(C)]
996#[derive(Copy, Clone, Debug)]
997#[cfg_attr(
998    not(target_arch = "arm"),
999    stable(feature = "neon_intrinsics", since = "1.59.0")
1000)]
1001#[cfg_attr(
1002    target_arch = "arm",
1003    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1004)]
1005pub struct poly64x2x2_t(pub poly64x2_t, pub poly64x2_t);
1006/// ARM-specific type containing three `poly64x2_t` vectors.
1007#[repr(C)]
1008#[derive(Copy, Clone, Debug)]
1009#[cfg_attr(
1010    not(target_arch = "arm"),
1011    stable(feature = "neon_intrinsics", since = "1.59.0")
1012)]
1013#[cfg_attr(
1014    target_arch = "arm",
1015    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1016)]
1017pub struct poly64x2x3_t(pub poly64x2_t, pub poly64x2_t, pub poly64x2_t);
1018/// ARM-specific type containing four `poly64x2_t` vectors.
1019#[repr(C)]
1020#[derive(Copy, Clone, Debug)]
1021#[cfg_attr(
1022    not(target_arch = "arm"),
1023    stable(feature = "neon_intrinsics", since = "1.59.0")
1024)]
1025#[cfg_attr(
1026    target_arch = "arm",
1027    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1028)]
1029pub struct poly64x2x4_t(
1030    pub poly64x2_t,
1031    pub poly64x2_t,
1032    pub poly64x2_t,
1033    pub poly64x2_t,
1034);
1035
1036#[allow(improper_ctypes)]
1037extern "unadjusted" {
1038    // absolute value (64-bit)
1039    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i8")]
1040    #[cfg_attr(
1041        any(target_arch = "aarch64", target_arch = "arm64ec"),
1042        link_name = "llvm.aarch64.neon.abs.v8i8"
1043    )]
1044    fn vabs_s8_(a: int8x8_t) -> int8x8_t;
1045    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i16")]
1046    #[cfg_attr(
1047        any(target_arch = "aarch64", target_arch = "arm64ec"),
1048        link_name = "llvm.aarch64.neon.abs.v4i16"
1049    )]
1050    fn vabs_s16_(a: int16x4_t) -> int16x4_t;
1051    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v2i32")]
1052    #[cfg_attr(
1053        any(target_arch = "aarch64", target_arch = "arm64ec"),
1054        link_name = "llvm.aarch64.neon.abs.v2i32"
1055    )]
1056    fn vabs_s32_(a: int32x2_t) -> int32x2_t;
1057    // absolute value (128-bit)
1058    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v16i8")]
1059    #[cfg_attr(
1060        any(target_arch = "aarch64", target_arch = "arm64ec"),
1061        link_name = "llvm.aarch64.neon.abs.v16i8"
1062    )]
1063    fn vabsq_s8_(a: int8x16_t) -> int8x16_t;
1064    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v8i16")]
1065    #[cfg_attr(
1066        any(target_arch = "aarch64", target_arch = "arm64ec"),
1067        link_name = "llvm.aarch64.neon.abs.v8i16"
1068    )]
1069    fn vabsq_s16_(a: int16x8_t) -> int16x8_t;
1070    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v4i32")]
1071    #[cfg_attr(
1072        any(target_arch = "aarch64", target_arch = "arm64ec"),
1073        link_name = "llvm.aarch64.neon.abs.v4i32"
1074    )]
1075    fn vabsq_s32_(a: int32x4_t) -> int32x4_t;
1076
1077    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v8i8")]
1078    #[cfg_attr(
1079        any(target_arch = "aarch64", target_arch = "arm64ec"),
1080        link_name = "llvm.aarch64.neon.sminp.v8i8"
1081    )]
1082    fn vpmins_v8i8(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1083    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v4i16")]
1084    #[cfg_attr(
1085        any(target_arch = "aarch64", target_arch = "arm64ec"),
1086        link_name = "llvm.aarch64.neon.sminp.v4i16"
1087    )]
1088    fn vpmins_v4i16(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1089    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v2i32")]
1090    #[cfg_attr(
1091        any(target_arch = "aarch64", target_arch = "arm64ec"),
1092        link_name = "llvm.aarch64.neon.sminp.v2i32"
1093    )]
1094    fn vpmins_v2i32(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1095    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v8i8")]
1096    #[cfg_attr(
1097        any(target_arch = "aarch64", target_arch = "arm64ec"),
1098        link_name = "llvm.aarch64.neon.uminp.v8i8"
1099    )]
1100    fn vpminu_v8i8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1101    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v4i16")]
1102    #[cfg_attr(
1103        any(target_arch = "aarch64", target_arch = "arm64ec"),
1104        link_name = "llvm.aarch64.neon.uminp.v4i16"
1105    )]
1106    fn vpminu_v4i16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1107    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpminu.v2i32")]
1108    #[cfg_attr(
1109        any(target_arch = "aarch64", target_arch = "arm64ec"),
1110        link_name = "llvm.aarch64.neon.uminp.v2i32"
1111    )]
1112    fn vpminu_v2i32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1113    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmins.v2f32")]
1114    #[cfg_attr(
1115        any(target_arch = "aarch64", target_arch = "arm64ec"),
1116        link_name = "llvm.aarch64.neon.fminp.v2f32"
1117    )]
1118    fn vpminf_v2f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
1119
1120    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v8i8")]
1121    #[cfg_attr(
1122        any(target_arch = "aarch64", target_arch = "arm64ec"),
1123        link_name = "llvm.aarch64.neon.smaxp.v8i8"
1124    )]
1125    fn vpmaxs_v8i8(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1126    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v4i16")]
1127    #[cfg_attr(
1128        any(target_arch = "aarch64", target_arch = "arm64ec"),
1129        link_name = "llvm.aarch64.neon.smaxp.v4i16"
1130    )]
1131    fn vpmaxs_v4i16(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1132    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v2i32")]
1133    #[cfg_attr(
1134        any(target_arch = "aarch64", target_arch = "arm64ec"),
1135        link_name = "llvm.aarch64.neon.smaxp.v2i32"
1136    )]
1137    fn vpmaxs_v2i32(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1138    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v8i8")]
1139    #[cfg_attr(
1140        any(target_arch = "aarch64", target_arch = "arm64ec"),
1141        link_name = "llvm.aarch64.neon.umaxp.v8i8"
1142    )]
1143    fn vpmaxu_v8i8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1144    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v4i16")]
1145    #[cfg_attr(
1146        any(target_arch = "aarch64", target_arch = "arm64ec"),
1147        link_name = "llvm.aarch64.neon.umaxp.v4i16"
1148    )]
1149    fn vpmaxu_v4i16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1150    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxu.v2i32")]
1151    #[cfg_attr(
1152        any(target_arch = "aarch64", target_arch = "arm64ec"),
1153        link_name = "llvm.aarch64.neon.umaxp.v2i32"
1154    )]
1155    fn vpmaxu_v2i32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1156    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpmaxs.v2f32")]
1157    #[cfg_attr(
1158        any(target_arch = "aarch64", target_arch = "arm64ec"),
1159        link_name = "llvm.aarch64.neon.fmaxp.v2f32"
1160    )]
1161    fn vpmaxf_v2f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
1162
1163    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v8i8")]
1164    #[cfg_attr(
1165        any(target_arch = "aarch64", target_arch = "arm64ec"),
1166        link_name = "llvm.aarch64.neon.raddhn.v8i8"
1167    )]
1168    fn vraddhn_s16_(a: int16x8_t, b: int16x8_t) -> int8x8_t;
1169    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v4i16")]
1170    #[cfg_attr(
1171        any(target_arch = "aarch64", target_arch = "arm64ec"),
1172        link_name = "llvm.aarch64.neon.raddhn.v4i16"
1173    )]
1174    fn vraddhn_s32_(a: int32x4_t, b: int32x4_t) -> int16x4_t;
1175    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vraddhn.v2i32")]
1176    #[cfg_attr(
1177        any(target_arch = "aarch64", target_arch = "arm64ec"),
1178        link_name = "llvm.aarch64.neon.raddhn.v2i32"
1179    )]
1180    fn vraddhn_s64_(a: int64x2_t, b: int64x2_t) -> int32x2_t;
1181
1182    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v4i16")]
1183    #[cfg_attr(
1184        any(target_arch = "aarch64", target_arch = "arm64ec"),
1185        link_name = "llvm.aarch64.neon.addp.v4i16"
1186    )]
1187    fn vpadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1188    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v2i32")]
1189    #[cfg_attr(
1190        any(target_arch = "aarch64", target_arch = "arm64ec"),
1191        link_name = "llvm.aarch64.neon.addp.v2i32"
1192    )]
1193    fn vpadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1194    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadd.v8i8")]
1195    #[cfg_attr(
1196        any(target_arch = "aarch64", target_arch = "arm64ec"),
1197        link_name = "llvm.aarch64.neon.addp.v8i8"
1198    )]
1199    fn vpadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1200
1201    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v4i16.v8i8")]
1202    #[cfg_attr(
1203        any(target_arch = "aarch64", target_arch = "arm64ec"),
1204        link_name = "llvm.aarch64.neon.saddlp.v4i16.v8i8"
1205    )]
1206    pub(crate) fn vpaddl_s8_(a: int8x8_t) -> int16x4_t;
1207    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v2i32.v4i16")]
1208    #[cfg_attr(
1209        any(target_arch = "aarch64", target_arch = "arm64ec"),
1210        link_name = "llvm.aarch64.neon.saddlp.v2i32.v4i16"
1211    )]
1212    pub(crate) fn vpaddl_s16_(a: int16x4_t) -> int32x2_t;
1213    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v1i64.v2i32")]
1214    #[cfg_attr(
1215        any(target_arch = "aarch64", target_arch = "arm64ec"),
1216        link_name = "llvm.aarch64.neon.saddlp.v1i64.v2i32"
1217    )]
1218    pub(crate) fn vpaddl_s32_(a: int32x2_t) -> int64x1_t;
1219    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v8i16.v16i8")]
1220    #[cfg_attr(
1221        any(target_arch = "aarch64", target_arch = "arm64ec"),
1222        link_name = "llvm.aarch64.neon.saddlp.v8i16.v16i8"
1223    )]
1224    pub(crate) fn vpaddlq_s8_(a: int8x16_t) -> int16x8_t;
1225    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v4i32.v8i16")]
1226    #[cfg_attr(
1227        any(target_arch = "aarch64", target_arch = "arm64ec"),
1228        link_name = "llvm.aarch64.neon.saddlp.v4i32.v8i16"
1229    )]
1230    pub(crate) fn vpaddlq_s16_(a: int16x8_t) -> int32x4_t;
1231    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddls.v2i64.v4i32")]
1232    #[cfg_attr(
1233        any(target_arch = "aarch64", target_arch = "arm64ec"),
1234        link_name = "llvm.aarch64.neon.saddlp.v2i64.v4i32"
1235    )]
1236    pub(crate) fn vpaddlq_s32_(a: int32x4_t) -> int64x2_t;
1237
1238    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v4i16.v8i8")]
1239    #[cfg_attr(
1240        any(target_arch = "aarch64", target_arch = "arm64ec"),
1241        link_name = "llvm.aarch64.neon.uaddlp.v4i16.v8i8"
1242    )]
1243    pub(crate) fn vpaddl_u8_(a: uint8x8_t) -> uint16x4_t;
1244    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v2i32.v4i16")]
1245    #[cfg_attr(
1246        any(target_arch = "aarch64", target_arch = "arm64ec"),
1247        link_name = "llvm.aarch64.neon.uaddlp.v2i32.v4i16"
1248    )]
1249    pub(crate) fn vpaddl_u16_(a: uint16x4_t) -> uint32x2_t;
1250    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v1i64.v2i32")]
1251    #[cfg_attr(
1252        any(target_arch = "aarch64", target_arch = "arm64ec"),
1253        link_name = "llvm.aarch64.neon.uaddlp.v1i64.v2i32"
1254    )]
1255    pub(crate) fn vpaddl_u32_(a: uint32x2_t) -> uint64x1_t;
1256    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v8i16.v16i8")]
1257    #[cfg_attr(
1258        any(target_arch = "aarch64", target_arch = "arm64ec"),
1259        link_name = "llvm.aarch64.neon.uaddlp.v8i16.v16i8"
1260    )]
1261    pub(crate) fn vpaddlq_u8_(a: uint8x16_t) -> uint16x8_t;
1262    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v4i32.v8i16")]
1263    #[cfg_attr(
1264        any(target_arch = "aarch64", target_arch = "arm64ec"),
1265        link_name = "llvm.aarch64.neon.uaddlp.v4i32.v8i16"
1266    )]
1267    pub(crate) fn vpaddlq_u16_(a: uint16x8_t) -> uint32x4_t;
1268    #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpaddlu.v2i64.v4i32")]
1269    #[cfg_attr(
1270        any(target_arch = "aarch64", target_arch = "arm64ec"),
1271        link_name = "llvm.aarch64.neon.uaddlp.v2i64.v4i32"
1272    )]
1273    pub(crate) fn vpaddlq_u32_(a: uint32x4_t) -> uint64x2_t;
1274
1275    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctpop.v8i8")]
1276    #[cfg_attr(
1277        any(target_arch = "aarch64", target_arch = "arm64ec"),
1278        link_name = "llvm.ctpop.v8i8"
1279    )]
1280    fn vcnt_s8_(a: int8x8_t) -> int8x8_t;
1281    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctpop.v16i8")]
1282    #[cfg_attr(
1283        any(target_arch = "aarch64", target_arch = "arm64ec"),
1284        link_name = "llvm.ctpop.v16i8"
1285    )]
1286    fn vcntq_s8_(a: int8x16_t) -> int8x16_t;
1287
1288    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v8i8")]
1289    #[cfg_attr(
1290        any(target_arch = "aarch64", target_arch = "arm64ec"),
1291        link_name = "llvm.ctlz.v8i8"
1292    )]
1293    fn vclz_s8_(a: int8x8_t) -> int8x8_t;
1294    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v16i8")]
1295    #[cfg_attr(
1296        any(target_arch = "aarch64", target_arch = "arm64ec"),
1297        link_name = "llvm.ctlz.v16i8"
1298    )]
1299    fn vclzq_s8_(a: int8x16_t) -> int8x16_t;
1300    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v4i16")]
1301    #[cfg_attr(
1302        any(target_arch = "aarch64", target_arch = "arm64ec"),
1303        link_name = "llvm.ctlz.v4i16"
1304    )]
1305    fn vclz_s16_(a: int16x4_t) -> int16x4_t;
1306    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v8i16")]
1307    #[cfg_attr(
1308        any(target_arch = "aarch64", target_arch = "arm64ec"),
1309        link_name = "llvm.ctlz.v8i16"
1310    )]
1311    fn vclzq_s16_(a: int16x8_t) -> int16x8_t;
1312    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v2i32")]
1313    #[cfg_attr(
1314        any(target_arch = "aarch64", target_arch = "arm64ec"),
1315        link_name = "llvm.ctlz.v2i32"
1316    )]
1317    fn vclz_s32_(a: int32x2_t) -> int32x2_t;
1318    #[cfg_attr(target_arch = "arm", link_name = "llvm.ctlz.v4i32")]
1319    #[cfg_attr(
1320        any(target_arch = "aarch64", target_arch = "arm64ec"),
1321        link_name = "llvm.ctlz.v4i32"
1322    )]
1323    fn vclzq_s32_(a: int32x4_t) -> int32x4_t;
1324}
1325
1326/// Load one single-element structure to one lane of one register.
1327#[inline]
1328#[target_feature(enable = "neon")]
1329#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1330#[rustc_legacy_const_generics(2)]
1331#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1332#[cfg_attr(
1333    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1334    assert_instr(ld1, LANE = 7)
1335)]
1336#[cfg_attr(
1337    not(target_arch = "arm"),
1338    stable(feature = "neon_intrinsics", since = "1.59.0")
1339)]
1340#[cfg_attr(
1341    target_arch = "arm",
1342    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1343)]
1344pub unsafe fn vld1_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x8_t) -> int8x8_t {
1345    static_assert_uimm_bits!(LANE, 3);
1346    simd_insert!(src, LANE as u32, *ptr)
1347}
1348
1349/// Load one single-element structure to one lane of one register.
1350#[inline]
1351#[target_feature(enable = "neon")]
1352#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1353#[rustc_legacy_const_generics(2)]
1354#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1355#[cfg_attr(
1356    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1357    assert_instr(ld1, LANE = 15)
1358)]
1359#[cfg_attr(
1360    not(target_arch = "arm"),
1361    stable(feature = "neon_intrinsics", since = "1.59.0")
1362)]
1363#[cfg_attr(
1364    target_arch = "arm",
1365    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1366)]
1367pub unsafe fn vld1q_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x16_t) -> int8x16_t {
1368    static_assert_uimm_bits!(LANE, 4);
1369    simd_insert!(src, LANE as u32, *ptr)
1370}
1371
1372/// Load one single-element structure to one lane of one register.
1373#[inline]
1374#[target_feature(enable = "neon")]
1375#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1376#[rustc_legacy_const_generics(2)]
1377#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1378#[cfg_attr(
1379    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1380    assert_instr(ld1, LANE = 3)
1381)]
1382#[cfg_attr(
1383    not(target_arch = "arm"),
1384    stable(feature = "neon_intrinsics", since = "1.59.0")
1385)]
1386#[cfg_attr(
1387    target_arch = "arm",
1388    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1389)]
1390pub unsafe fn vld1_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x4_t) -> int16x4_t {
1391    static_assert_uimm_bits!(LANE, 2);
1392    simd_insert!(src, LANE as u32, *ptr)
1393}
1394
1395/// Load one single-element structure to one lane of one register.
1396#[inline]
1397#[target_feature(enable = "neon")]
1398#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1399#[rustc_legacy_const_generics(2)]
1400#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1401#[cfg_attr(
1402    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1403    assert_instr(ld1, LANE = 7)
1404)]
1405#[cfg_attr(
1406    not(target_arch = "arm"),
1407    stable(feature = "neon_intrinsics", since = "1.59.0")
1408)]
1409#[cfg_attr(
1410    target_arch = "arm",
1411    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1412)]
1413pub unsafe fn vld1q_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x8_t) -> int16x8_t {
1414    static_assert_uimm_bits!(LANE, 3);
1415    simd_insert!(src, LANE as u32, *ptr)
1416}
1417
1418/// Load one single-element structure to one lane of one register.
1419#[inline]
1420#[target_feature(enable = "neon")]
1421#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1422#[rustc_legacy_const_generics(2)]
1423#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1424#[cfg_attr(
1425    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1426    assert_instr(ld1, LANE = 1)
1427)]
1428#[cfg_attr(
1429    not(target_arch = "arm"),
1430    stable(feature = "neon_intrinsics", since = "1.59.0")
1431)]
1432#[cfg_attr(
1433    target_arch = "arm",
1434    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1435)]
1436pub unsafe fn vld1_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x2_t) -> int32x2_t {
1437    static_assert_uimm_bits!(LANE, 1);
1438    simd_insert!(src, LANE as u32, *ptr)
1439}
1440
1441/// Load one single-element structure to one lane of one register.
1442#[inline]
1443#[target_feature(enable = "neon")]
1444#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1445#[rustc_legacy_const_generics(2)]
1446#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1447#[cfg_attr(
1448    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1449    assert_instr(ld1, LANE = 3)
1450)]
1451#[cfg_attr(
1452    not(target_arch = "arm"),
1453    stable(feature = "neon_intrinsics", since = "1.59.0")
1454)]
1455#[cfg_attr(
1456    target_arch = "arm",
1457    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1458)]
1459pub unsafe fn vld1q_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x4_t) -> int32x4_t {
1460    static_assert_uimm_bits!(LANE, 2);
1461    simd_insert!(src, LANE as u32, *ptr)
1462}
1463
1464/// Load one single-element structure to one lane of one register.
1465#[inline]
1466#[target_feature(enable = "neon")]
1467#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1468#[rustc_legacy_const_generics(2)]
1469#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1470#[cfg_attr(
1471    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1472    assert_instr(ldr, LANE = 0)
1473)]
1474#[cfg_attr(
1475    not(target_arch = "arm"),
1476    stable(feature = "neon_intrinsics", since = "1.59.0")
1477)]
1478#[cfg_attr(
1479    target_arch = "arm",
1480    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1481)]
1482pub unsafe fn vld1_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x1_t) -> int64x1_t {
1483    static_assert!(LANE == 0);
1484    simd_insert!(src, LANE as u32, *ptr)
1485}
1486
1487/// Load one single-element structure to one lane of one register.
1488#[inline]
1489#[target_feature(enable = "neon")]
1490#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1491#[rustc_legacy_const_generics(2)]
1492#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1493#[cfg_attr(
1494    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1495    assert_instr(ld1, LANE = 1)
1496)]
1497#[cfg_attr(
1498    not(target_arch = "arm"),
1499    stable(feature = "neon_intrinsics", since = "1.59.0")
1500)]
1501#[cfg_attr(
1502    target_arch = "arm",
1503    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1504)]
1505pub unsafe fn vld1q_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x2_t) -> int64x2_t {
1506    static_assert_uimm_bits!(LANE, 1);
1507    simd_insert!(src, LANE as u32, *ptr)
1508}
1509
1510/// Load one single-element structure to one lane of one register.
1511#[inline]
1512#[target_feature(enable = "neon")]
1513#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1514#[rustc_legacy_const_generics(2)]
1515#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1516#[cfg_attr(
1517    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1518    assert_instr(ld1, LANE = 7)
1519)]
1520#[cfg_attr(
1521    not(target_arch = "arm"),
1522    stable(feature = "neon_intrinsics", since = "1.59.0")
1523)]
1524#[cfg_attr(
1525    target_arch = "arm",
1526    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1527)]
1528pub unsafe fn vld1_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x8_t) -> uint8x8_t {
1529    static_assert_uimm_bits!(LANE, 3);
1530    simd_insert!(src, LANE as u32, *ptr)
1531}
1532
1533/// Load one single-element structure to one lane of one register.
1534#[inline]
1535#[target_feature(enable = "neon")]
1536#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1537#[rustc_legacy_const_generics(2)]
1538#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1539#[cfg_attr(
1540    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1541    assert_instr(ld1, LANE = 15)
1542)]
1543#[cfg_attr(
1544    not(target_arch = "arm"),
1545    stable(feature = "neon_intrinsics", since = "1.59.0")
1546)]
1547#[cfg_attr(
1548    target_arch = "arm",
1549    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1550)]
1551pub unsafe fn vld1q_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x16_t) -> uint8x16_t {
1552    static_assert_uimm_bits!(LANE, 4);
1553    simd_insert!(src, LANE as u32, *ptr)
1554}
1555
1556/// Load one single-element structure to one lane of one register.
1557#[inline]
1558#[target_feature(enable = "neon")]
1559#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1560#[rustc_legacy_const_generics(2)]
1561#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1562#[cfg_attr(
1563    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1564    assert_instr(ld1, LANE = 3)
1565)]
1566#[cfg_attr(
1567    not(target_arch = "arm"),
1568    stable(feature = "neon_intrinsics", since = "1.59.0")
1569)]
1570#[cfg_attr(
1571    target_arch = "arm",
1572    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1573)]
1574pub unsafe fn vld1_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x4_t) -> uint16x4_t {
1575    static_assert_uimm_bits!(LANE, 2);
1576    simd_insert!(src, LANE as u32, *ptr)
1577}
1578
1579/// Load one single-element structure to one lane of one register.
1580#[inline]
1581#[target_feature(enable = "neon")]
1582#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1583#[rustc_legacy_const_generics(2)]
1584#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1585#[cfg_attr(
1586    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1587    assert_instr(ld1, LANE = 7)
1588)]
1589#[cfg_attr(
1590    not(target_arch = "arm"),
1591    stable(feature = "neon_intrinsics", since = "1.59.0")
1592)]
1593#[cfg_attr(
1594    target_arch = "arm",
1595    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1596)]
1597pub unsafe fn vld1q_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x8_t) -> uint16x8_t {
1598    static_assert_uimm_bits!(LANE, 3);
1599    simd_insert!(src, LANE as u32, *ptr)
1600}
1601
1602/// Load one single-element structure to one lane of one register.
1603#[inline]
1604#[target_feature(enable = "neon")]
1605#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1606#[rustc_legacy_const_generics(2)]
1607#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1608#[cfg_attr(
1609    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1610    assert_instr(ld1, LANE = 1)
1611)]
1612#[cfg_attr(
1613    not(target_arch = "arm"),
1614    stable(feature = "neon_intrinsics", since = "1.59.0")
1615)]
1616#[cfg_attr(
1617    target_arch = "arm",
1618    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1619)]
1620pub unsafe fn vld1_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x2_t) -> uint32x2_t {
1621    static_assert_uimm_bits!(LANE, 1);
1622    simd_insert!(src, LANE as u32, *ptr)
1623}
1624
1625/// Load one single-element structure to one lane of one register.
1626#[inline]
1627#[target_feature(enable = "neon")]
1628#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1629#[rustc_legacy_const_generics(2)]
1630#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1631#[cfg_attr(
1632    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1633    assert_instr(ld1, LANE = 3)
1634)]
1635#[cfg_attr(
1636    not(target_arch = "arm"),
1637    stable(feature = "neon_intrinsics", since = "1.59.0")
1638)]
1639#[cfg_attr(
1640    target_arch = "arm",
1641    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1642)]
1643pub unsafe fn vld1q_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x4_t) -> uint32x4_t {
1644    static_assert_uimm_bits!(LANE, 2);
1645    simd_insert!(src, LANE as u32, *ptr)
1646}
1647
1648/// Load one single-element structure to one lane of one register.
1649#[inline]
1650#[target_feature(enable = "neon")]
1651#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1652#[rustc_legacy_const_generics(2)]
1653#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1654#[cfg_attr(
1655    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1656    assert_instr(ldr, LANE = 0)
1657)]
1658#[cfg_attr(
1659    not(target_arch = "arm"),
1660    stable(feature = "neon_intrinsics", since = "1.59.0")
1661)]
1662#[cfg_attr(
1663    target_arch = "arm",
1664    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1665)]
1666pub unsafe fn vld1_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x1_t) -> uint64x1_t {
1667    static_assert!(LANE == 0);
1668    simd_insert!(src, LANE as u32, *ptr)
1669}
1670
1671/// Load one single-element structure to one lane of one register.
1672#[inline]
1673#[target_feature(enable = "neon")]
1674#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1675#[rustc_legacy_const_generics(2)]
1676#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1677#[cfg_attr(
1678    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1679    assert_instr(ld1, LANE = 1)
1680)]
1681#[cfg_attr(
1682    not(target_arch = "arm"),
1683    stable(feature = "neon_intrinsics", since = "1.59.0")
1684)]
1685#[cfg_attr(
1686    target_arch = "arm",
1687    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1688)]
1689pub unsafe fn vld1q_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x2_t) -> uint64x2_t {
1690    static_assert_uimm_bits!(LANE, 1);
1691    simd_insert!(src, LANE as u32, *ptr)
1692}
1693
1694/// Load one single-element structure to one lane of one register.
1695#[inline]
1696#[target_feature(enable = "neon")]
1697#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1698#[rustc_legacy_const_generics(2)]
1699#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1700#[cfg_attr(
1701    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1702    assert_instr(ld1, LANE = 7)
1703)]
1704#[cfg_attr(
1705    not(target_arch = "arm"),
1706    stable(feature = "neon_intrinsics", since = "1.59.0")
1707)]
1708#[cfg_attr(
1709    target_arch = "arm",
1710    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1711)]
1712pub unsafe fn vld1_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x8_t) -> poly8x8_t {
1713    static_assert_uimm_bits!(LANE, 3);
1714    simd_insert!(src, LANE as u32, *ptr)
1715}
1716
1717/// Load one single-element structure to one lane of one register.
1718#[inline]
1719#[target_feature(enable = "neon")]
1720#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1721#[rustc_legacy_const_generics(2)]
1722#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1723#[cfg_attr(
1724    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1725    assert_instr(ld1, LANE = 15)
1726)]
1727#[cfg_attr(
1728    not(target_arch = "arm"),
1729    stable(feature = "neon_intrinsics", since = "1.59.0")
1730)]
1731#[cfg_attr(
1732    target_arch = "arm",
1733    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1734)]
1735pub unsafe fn vld1q_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x16_t) -> poly8x16_t {
1736    static_assert_uimm_bits!(LANE, 4);
1737    simd_insert!(src, LANE as u32, *ptr)
1738}
1739
1740/// Load one single-element structure to one lane of one register.
1741#[inline]
1742#[target_feature(enable = "neon")]
1743#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1744#[rustc_legacy_const_generics(2)]
1745#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1746#[cfg_attr(
1747    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1748    assert_instr(ld1, LANE = 3)
1749)]
1750#[cfg_attr(
1751    not(target_arch = "arm"),
1752    stable(feature = "neon_intrinsics", since = "1.59.0")
1753)]
1754#[cfg_attr(
1755    target_arch = "arm",
1756    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1757)]
1758pub unsafe fn vld1_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x4_t) -> poly16x4_t {
1759    static_assert_uimm_bits!(LANE, 2);
1760    simd_insert!(src, LANE as u32, *ptr)
1761}
1762
1763/// Load one single-element structure to one lane of one register.
1764#[inline]
1765#[target_feature(enable = "neon")]
1766#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1767#[rustc_legacy_const_generics(2)]
1768#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1769#[cfg_attr(
1770    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1771    assert_instr(ld1, LANE = 7)
1772)]
1773#[cfg_attr(
1774    not(target_arch = "arm"),
1775    stable(feature = "neon_intrinsics", since = "1.59.0")
1776)]
1777#[cfg_attr(
1778    target_arch = "arm",
1779    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1780)]
1781pub unsafe fn vld1q_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x8_t) -> poly16x8_t {
1782    static_assert_uimm_bits!(LANE, 3);
1783    simd_insert!(src, LANE as u32, *ptr)
1784}
1785
1786/// Load one single-element structure to one lane of one register.
1787///
1788/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_lane_p64)
1789#[inline]
1790#[target_feature(enable = "neon,aes")]
1791#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1792#[rustc_legacy_const_generics(2)]
1793#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1794#[cfg_attr(
1795    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1796    assert_instr(ldr, LANE = 0)
1797)]
1798#[cfg_attr(
1799    not(target_arch = "arm"),
1800    stable(feature = "neon_intrinsics", since = "1.59.0")
1801)]
1802#[cfg_attr(
1803    target_arch = "arm",
1804    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1805)]
1806pub unsafe fn vld1_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x1_t) -> poly64x1_t {
1807    static_assert!(LANE == 0);
1808    simd_insert!(src, LANE as u32, *ptr)
1809}
1810
1811/// Load one single-element structure to one lane of one register.
1812///
1813/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_lane_p64)
1814#[inline]
1815#[target_feature(enable = "neon,aes")]
1816#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1817#[rustc_legacy_const_generics(2)]
1818#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1819#[cfg_attr(
1820    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1821    assert_instr(ld1, LANE = 1)
1822)]
1823#[cfg_attr(
1824    not(target_arch = "arm"),
1825    stable(feature = "neon_intrinsics", since = "1.59.0")
1826)]
1827#[cfg_attr(
1828    target_arch = "arm",
1829    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1830)]
1831pub unsafe fn vld1q_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x2_t) -> poly64x2_t {
1832    static_assert_uimm_bits!(LANE, 1);
1833    simd_insert!(src, LANE as u32, *ptr)
1834}
1835
1836/// Load one single-element structure to one lane of one register.
1837#[inline]
1838#[target_feature(enable = "neon")]
1839#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1840#[rustc_legacy_const_generics(2)]
1841#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1842#[cfg_attr(
1843    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1844    assert_instr(ld1, LANE = 1)
1845)]
1846#[cfg_attr(
1847    not(target_arch = "arm"),
1848    stable(feature = "neon_intrinsics", since = "1.59.0")
1849)]
1850#[cfg_attr(
1851    target_arch = "arm",
1852    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1853)]
1854pub unsafe fn vld1_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x2_t) -> float32x2_t {
1855    static_assert_uimm_bits!(LANE, 1);
1856    simd_insert!(src, LANE as u32, *ptr)
1857}
1858
1859/// Load one single-element structure to one lane of one register.
1860#[inline]
1861#[target_feature(enable = "neon")]
1862#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1863#[rustc_legacy_const_generics(2)]
1864#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1865#[cfg_attr(
1866    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1867    assert_instr(ld1, LANE = 3)
1868)]
1869#[cfg_attr(
1870    not(target_arch = "arm"),
1871    stable(feature = "neon_intrinsics", since = "1.59.0")
1872)]
1873#[cfg_attr(
1874    target_arch = "arm",
1875    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1876)]
1877pub unsafe fn vld1q_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x4_t) -> float32x4_t {
1878    static_assert_uimm_bits!(LANE, 2);
1879    simd_insert!(src, LANE as u32, *ptr)
1880}
1881
1882/// Load one single-element structure and Replicate to all lanes (of one register).
1883#[inline]
1884#[target_feature(enable = "neon")]
1885#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1886#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1887#[cfg_attr(
1888    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1889    assert_instr(ld1r)
1890)]
1891#[cfg_attr(
1892    not(target_arch = "arm"),
1893    stable(feature = "neon_intrinsics", since = "1.59.0")
1894)]
1895#[cfg_attr(
1896    target_arch = "arm",
1897    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1898)]
1899pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t {
1900    let x = vld1_lane_s8::<0>(ptr, transmute(i8x8::splat(0)));
1901    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
1902}
1903
1904/// Load one single-element structure and Replicate to all lanes (of one register).
1905#[inline]
1906#[target_feature(enable = "neon")]
1907#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1908#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1909#[cfg_attr(
1910    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1911    assert_instr(ld1r)
1912)]
1913#[cfg_attr(
1914    not(target_arch = "arm"),
1915    stable(feature = "neon_intrinsics", since = "1.59.0")
1916)]
1917#[cfg_attr(
1918    target_arch = "arm",
1919    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1920)]
1921pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t {
1922    let x = vld1q_lane_s8::<0>(ptr, transmute(i8x16::splat(0)));
1923    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
1924}
1925
1926/// Load one single-element structure and Replicate to all lanes (of one register).
1927#[inline]
1928#[target_feature(enable = "neon")]
1929#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1930#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
1931#[cfg_attr(
1932    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1933    assert_instr(ld1r)
1934)]
1935#[cfg_attr(
1936    not(target_arch = "arm"),
1937    stable(feature = "neon_intrinsics", since = "1.59.0")
1938)]
1939#[cfg_attr(
1940    target_arch = "arm",
1941    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1942)]
1943pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t {
1944    let x = vld1_lane_s16::<0>(ptr, transmute(i16x4::splat(0)));
1945    simd_shuffle!(x, x, [0, 0, 0, 0])
1946}
1947
1948/// Load one single-element structure and Replicate to all lanes (of one register).
1949#[inline]
1950#[target_feature(enable = "neon")]
1951#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1952#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
1953#[cfg_attr(
1954    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1955    assert_instr(ld1r)
1956)]
1957#[cfg_attr(
1958    not(target_arch = "arm"),
1959    stable(feature = "neon_intrinsics", since = "1.59.0")
1960)]
1961#[cfg_attr(
1962    target_arch = "arm",
1963    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1964)]
1965pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t {
1966    let x = vld1q_lane_s16::<0>(ptr, transmute(i16x8::splat(0)));
1967    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
1968}
1969
1970/// Load one single-element structure and Replicate to all lanes (of one register).
1971#[inline]
1972#[target_feature(enable = "neon")]
1973#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1974#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
1975#[cfg_attr(
1976    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1977    assert_instr(ld1r)
1978)]
1979#[cfg_attr(
1980    not(target_arch = "arm"),
1981    stable(feature = "neon_intrinsics", since = "1.59.0")
1982)]
1983#[cfg_attr(
1984    target_arch = "arm",
1985    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1986)]
1987pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t {
1988    let x = vld1_lane_s32::<0>(ptr, transmute(i32x2::splat(0)));
1989    simd_shuffle!(x, x, [0, 0])
1990}
1991
1992/// Load one single-element structure and Replicate to all lanes (of one register).
1993#[inline]
1994#[target_feature(enable = "neon")]
1995#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1996#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
1997#[cfg_attr(
1998    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1999    assert_instr(ld1r)
2000)]
2001#[cfg_attr(
2002    not(target_arch = "arm"),
2003    stable(feature = "neon_intrinsics", since = "1.59.0")
2004)]
2005#[cfg_attr(
2006    target_arch = "arm",
2007    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2008)]
2009pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t {
2010    let x = vld1q_lane_s32::<0>(ptr, transmute(i32x4::splat(0)));
2011    simd_shuffle!(x, x, [0, 0, 0, 0])
2012}
2013
2014/// Load one single-element structure and Replicate to all lanes (of one register).
2015#[inline]
2016#[target_feature(enable = "neon")]
2017#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2018#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2019#[cfg_attr(
2020    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2021    assert_instr(ldr)
2022)]
2023#[cfg_attr(
2024    not(target_arch = "arm"),
2025    stable(feature = "neon_intrinsics", since = "1.59.0")
2026)]
2027#[cfg_attr(
2028    target_arch = "arm",
2029    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2030)]
2031pub unsafe fn vld1_dup_s64(ptr: *const i64) -> int64x1_t {
2032    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
2033    {
2034        crate::core_arch::aarch64::vld1_s64(ptr)
2035    }
2036    #[cfg(target_arch = "arm")]
2037    {
2038        crate::core_arch::arm::vld1_s64(ptr)
2039    }
2040}
2041
2042/// Load one single-element structure and Replicate to all lanes (of one register).
2043#[inline]
2044#[target_feature(enable = "neon")]
2045#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2046#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2047#[cfg_attr(
2048    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2049    assert_instr(ld1r)
2050)]
2051#[cfg_attr(
2052    not(target_arch = "arm"),
2053    stable(feature = "neon_intrinsics", since = "1.59.0")
2054)]
2055#[cfg_attr(
2056    target_arch = "arm",
2057    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2058)]
2059pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t {
2060    let x = vld1q_lane_s64::<0>(ptr, transmute(i64x2::splat(0)));
2061    simd_shuffle!(x, x, [0, 0])
2062}
2063
2064/// Load one single-element structure and Replicate to all lanes (of one register).
2065#[inline]
2066#[target_feature(enable = "neon")]
2067#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2068#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2069#[cfg_attr(
2070    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2071    assert_instr(ld1r)
2072)]
2073#[cfg_attr(
2074    not(target_arch = "arm"),
2075    stable(feature = "neon_intrinsics", since = "1.59.0")
2076)]
2077#[cfg_attr(
2078    target_arch = "arm",
2079    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2080)]
2081pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t {
2082    let x = vld1_lane_u8::<0>(ptr, transmute(u8x8::splat(0)));
2083    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2084}
2085
2086/// Load one single-element structure and Replicate to all lanes (of one register).
2087#[inline]
2088#[target_feature(enable = "neon")]
2089#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2090#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2091#[cfg_attr(
2092    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2093    assert_instr(ld1r)
2094)]
2095#[cfg_attr(
2096    not(target_arch = "arm"),
2097    stable(feature = "neon_intrinsics", since = "1.59.0")
2098)]
2099#[cfg_attr(
2100    target_arch = "arm",
2101    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2102)]
2103pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t {
2104    let x = vld1q_lane_u8::<0>(ptr, transmute(u8x16::splat(0)));
2105    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
2106}
2107
2108/// Load one single-element structure and Replicate to all lanes (of one register).
2109#[inline]
2110#[target_feature(enable = "neon")]
2111#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2112#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2113#[cfg_attr(
2114    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2115    assert_instr(ld1r)
2116)]
2117#[cfg_attr(
2118    not(target_arch = "arm"),
2119    stable(feature = "neon_intrinsics", since = "1.59.0")
2120)]
2121#[cfg_attr(
2122    target_arch = "arm",
2123    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2124)]
2125pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t {
2126    let x = vld1_lane_u16::<0>(ptr, transmute(u16x4::splat(0)));
2127    simd_shuffle!(x, x, [0, 0, 0, 0])
2128}
2129
2130/// Load one single-element structure and Replicate to all lanes (of one register).
2131#[inline]
2132#[target_feature(enable = "neon")]
2133#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2134#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2135#[cfg_attr(
2136    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2137    assert_instr(ld1r)
2138)]
2139#[cfg_attr(
2140    not(target_arch = "arm"),
2141    stable(feature = "neon_intrinsics", since = "1.59.0")
2142)]
2143#[cfg_attr(
2144    target_arch = "arm",
2145    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2146)]
2147pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t {
2148    let x = vld1q_lane_u16::<0>(ptr, transmute(u16x8::splat(0)));
2149    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2150}
2151
2152/// Load one single-element structure and Replicate to all lanes (of one register).
2153#[inline]
2154#[target_feature(enable = "neon")]
2155#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2156#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2157#[cfg_attr(
2158    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2159    assert_instr(ld1r)
2160)]
2161#[cfg_attr(
2162    not(target_arch = "arm"),
2163    stable(feature = "neon_intrinsics", since = "1.59.0")
2164)]
2165#[cfg_attr(
2166    target_arch = "arm",
2167    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2168)]
2169pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t {
2170    let x = vld1_lane_u32::<0>(ptr, transmute(u32x2::splat(0)));
2171    simd_shuffle!(x, x, [0, 0])
2172}
2173
2174/// Load one single-element structure and Replicate to all lanes (of one register).
2175#[inline]
2176#[target_feature(enable = "neon")]
2177#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2178#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2179#[cfg_attr(
2180    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2181    assert_instr(ld1r)
2182)]
2183#[cfg_attr(
2184    not(target_arch = "arm"),
2185    stable(feature = "neon_intrinsics", since = "1.59.0")
2186)]
2187#[cfg_attr(
2188    target_arch = "arm",
2189    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2190)]
2191pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t {
2192    let x = vld1q_lane_u32::<0>(ptr, transmute(u32x4::splat(0)));
2193    simd_shuffle!(x, x, [0, 0, 0, 0])
2194}
2195
2196/// Load one single-element structure and Replicate to all lanes (of one register).
2197#[inline]
2198#[target_feature(enable = "neon")]
2199#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2200#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2201#[cfg_attr(
2202    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2203    assert_instr(ldr)
2204)]
2205#[cfg_attr(
2206    not(target_arch = "arm"),
2207    stable(feature = "neon_intrinsics", since = "1.59.0")
2208)]
2209#[cfg_attr(
2210    target_arch = "arm",
2211    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2212)]
2213pub unsafe fn vld1_dup_u64(ptr: *const u64) -> uint64x1_t {
2214    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
2215    {
2216        crate::core_arch::aarch64::vld1_u64(ptr)
2217    }
2218    #[cfg(target_arch = "arm")]
2219    {
2220        crate::core_arch::arm::vld1_u64(ptr)
2221    }
2222}
2223
2224/// Load one single-element structure and Replicate to all lanes (of one register).
2225#[inline]
2226#[target_feature(enable = "neon")]
2227#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2228#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2229#[cfg_attr(
2230    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2231    assert_instr(ld1r)
2232)]
2233#[cfg_attr(
2234    not(target_arch = "arm"),
2235    stable(feature = "neon_intrinsics", since = "1.59.0")
2236)]
2237#[cfg_attr(
2238    target_arch = "arm",
2239    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2240)]
2241pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t {
2242    let x = vld1q_lane_u64::<0>(ptr, transmute(u64x2::splat(0)));
2243    simd_shuffle!(x, x, [0, 0])
2244}
2245
2246/// Load one single-element structure and Replicate to all lanes (of one register).
2247#[inline]
2248#[target_feature(enable = "neon")]
2249#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2250#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2251#[cfg_attr(
2252    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2253    assert_instr(ld1r)
2254)]
2255#[cfg_attr(
2256    not(target_arch = "arm"),
2257    stable(feature = "neon_intrinsics", since = "1.59.0")
2258)]
2259#[cfg_attr(
2260    target_arch = "arm",
2261    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2262)]
2263pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t {
2264    let x = vld1_lane_p8::<0>(ptr, transmute(u8x8::splat(0)));
2265    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2266}
2267
2268/// Load one single-element structure and Replicate to all lanes (of one register).
2269#[inline]
2270#[target_feature(enable = "neon")]
2271#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2272#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2273#[cfg_attr(
2274    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2275    assert_instr(ld1r)
2276)]
2277#[cfg_attr(
2278    not(target_arch = "arm"),
2279    stable(feature = "neon_intrinsics", since = "1.59.0")
2280)]
2281#[cfg_attr(
2282    target_arch = "arm",
2283    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2284)]
2285pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t {
2286    let x = vld1q_lane_p8::<0>(ptr, transmute(u8x16::splat(0)));
2287    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
2288}
2289
2290/// Load one single-element structure and Replicate to all lanes (of one register).
2291#[inline]
2292#[target_feature(enable = "neon")]
2293#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2294#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2295#[cfg_attr(
2296    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2297    assert_instr(ld1r)
2298)]
2299#[cfg_attr(
2300    not(target_arch = "arm"),
2301    stable(feature = "neon_intrinsics", since = "1.59.0")
2302)]
2303#[cfg_attr(
2304    target_arch = "arm",
2305    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2306)]
2307pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t {
2308    let x = vld1_lane_p16::<0>(ptr, transmute(u16x4::splat(0)));
2309    simd_shuffle!(x, x, [0, 0, 0, 0])
2310}
2311
2312/// Load one single-element structure and Replicate to all lanes (of one register).
2313#[inline]
2314#[target_feature(enable = "neon")]
2315#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2316#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2317#[cfg_attr(
2318    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2319    assert_instr(ld1r)
2320)]
2321#[cfg_attr(
2322    not(target_arch = "arm"),
2323    stable(feature = "neon_intrinsics", since = "1.59.0")
2324)]
2325#[cfg_attr(
2326    target_arch = "arm",
2327    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2328)]
2329pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t {
2330    let x = vld1q_lane_p16::<0>(ptr, transmute(u16x8::splat(0)));
2331    simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2332}
2333
2334/// Load one single-element structure and Replicate to all lanes (of one register).
2335#[inline]
2336#[target_feature(enable = "neon")]
2337#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2338#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2339#[cfg_attr(
2340    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2341    assert_instr(ld1r)
2342)]
2343#[cfg_attr(
2344    not(target_arch = "arm"),
2345    stable(feature = "neon_intrinsics", since = "1.59.0")
2346)]
2347#[cfg_attr(
2348    target_arch = "arm",
2349    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2350)]
2351pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t {
2352    let x = vld1_lane_f32::<0>(ptr, transmute(f32x2::splat(0.)));
2353    simd_shuffle!(x, x, [0, 0])
2354}
2355
2356/// Load one single-element structure and Replicate to all lanes (of one register).
2357///
2358/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_dup_p64)
2359#[inline]
2360#[target_feature(enable = "neon,aes")]
2361#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2362#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2363#[cfg_attr(
2364    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2365    assert_instr(ldr)
2366)]
2367#[cfg_attr(
2368    not(target_arch = "arm"),
2369    stable(feature = "neon_intrinsics", since = "1.59.0")
2370)]
2371#[cfg_attr(
2372    target_arch = "arm",
2373    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2374)]
2375pub unsafe fn vld1_dup_p64(ptr: *const p64) -> poly64x1_t {
2376    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
2377    {
2378        crate::core_arch::aarch64::vld1_p64(ptr)
2379    }
2380    #[cfg(target_arch = "arm")]
2381    {
2382        crate::core_arch::arm::vld1_p64(ptr)
2383    }
2384}
2385
2386/// Load one single-element structure and Replicate to all lanes (of one register).
2387///
2388/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_dup_p64)
2389#[inline]
2390#[target_feature(enable = "neon,aes")]
2391#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2392#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2393#[cfg_attr(
2394    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2395    assert_instr(ld1r)
2396)]
2397#[cfg_attr(
2398    not(target_arch = "arm"),
2399    stable(feature = "neon_intrinsics", since = "1.59.0")
2400)]
2401#[cfg_attr(
2402    target_arch = "arm",
2403    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2404)]
2405pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t {
2406    let x = vld1q_lane_p64::<0>(ptr, transmute(u64x2::splat(0)));
2407    simd_shuffle!(x, x, [0, 0])
2408}
2409
2410/// Load one single-element structure and Replicate to all lanes (of one register).
2411#[inline]
2412#[target_feature(enable = "neon")]
2413#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2414#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2415#[cfg_attr(
2416    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2417    assert_instr(ld1r)
2418)]
2419#[cfg_attr(
2420    not(target_arch = "arm"),
2421    stable(feature = "neon_intrinsics", since = "1.59.0")
2422)]
2423#[cfg_attr(
2424    target_arch = "arm",
2425    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2426)]
2427pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t {
2428    let x = vld1q_lane_f32::<0>(ptr, transmute(f32x4::splat(0.)));
2429    simd_shuffle!(x, x, [0, 0, 0, 0])
2430}
2431
2432// signed absolute difference and accumulate (64-bit)
2433#[inline]
2434#[target_feature(enable = "neon")]
2435#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2436#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
2437#[cfg_attr(
2438    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2439    assert_instr("saba")
2440)]
2441#[cfg_attr(
2442    not(target_arch = "arm"),
2443    stable(feature = "neon_intrinsics", since = "1.59.0")
2444)]
2445#[cfg_attr(
2446    target_arch = "arm",
2447    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2448)]
2449pub unsafe fn vaba_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
2450    simd_add(a, vabd_s8(b, c))
2451}
2452#[inline]
2453#[target_feature(enable = "neon")]
2454#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2455#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
2456#[cfg_attr(
2457    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2458    assert_instr("saba")
2459)]
2460#[cfg_attr(
2461    not(target_arch = "arm"),
2462    stable(feature = "neon_intrinsics", since = "1.59.0")
2463)]
2464#[cfg_attr(
2465    target_arch = "arm",
2466    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2467)]
2468pub unsafe fn vaba_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
2469    simd_add(a, vabd_s16(b, c))
2470}
2471#[inline]
2472#[target_feature(enable = "neon")]
2473#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2474#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
2475#[cfg_attr(
2476    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2477    assert_instr("saba")
2478)]
2479#[cfg_attr(
2480    not(target_arch = "arm"),
2481    stable(feature = "neon_intrinsics", since = "1.59.0")
2482)]
2483#[cfg_attr(
2484    target_arch = "arm",
2485    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2486)]
2487pub unsafe fn vaba_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
2488    simd_add(a, vabd_s32(b, c))
2489}
2490#[inline]
2491#[target_feature(enable = "neon")]
2492#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2493#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
2494#[cfg_attr(
2495    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2496    assert_instr("uaba")
2497)]
2498#[cfg_attr(
2499    not(target_arch = "arm"),
2500    stable(feature = "neon_intrinsics", since = "1.59.0")
2501)]
2502#[cfg_attr(
2503    target_arch = "arm",
2504    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2505)]
2506pub unsafe fn vaba_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
2507    simd_add(a, vabd_u8(b, c))
2508}
2509#[inline]
2510#[target_feature(enable = "neon")]
2511#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2512#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
2513#[cfg_attr(
2514    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2515    assert_instr("uaba")
2516)]
2517#[cfg_attr(
2518    not(target_arch = "arm"),
2519    stable(feature = "neon_intrinsics", since = "1.59.0")
2520)]
2521#[cfg_attr(
2522    target_arch = "arm",
2523    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2524)]
2525pub unsafe fn vaba_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
2526    simd_add(a, vabd_u16(b, c))
2527}
2528#[inline]
2529#[target_feature(enable = "neon")]
2530#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2531#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
2532#[cfg_attr(
2533    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2534    assert_instr("uaba")
2535)]
2536#[cfg_attr(
2537    not(target_arch = "arm"),
2538    stable(feature = "neon_intrinsics", since = "1.59.0")
2539)]
2540#[cfg_attr(
2541    target_arch = "arm",
2542    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2543)]
2544pub unsafe fn vaba_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
2545    simd_add(a, vabd_u32(b, c))
2546}
2547// signed absolute difference and accumulate (128-bit)
2548#[inline]
2549#[target_feature(enable = "neon")]
2550#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2551#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
2552#[cfg_attr(
2553    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2554    assert_instr("saba")
2555)]
2556#[cfg_attr(
2557    not(target_arch = "arm"),
2558    stable(feature = "neon_intrinsics", since = "1.59.0")
2559)]
2560#[cfg_attr(
2561    target_arch = "arm",
2562    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2563)]
2564pub unsafe fn vabaq_s8(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
2565    simd_add(a, vabdq_s8(b, c))
2566}
2567#[inline]
2568#[target_feature(enable = "neon")]
2569#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2570#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
2571#[cfg_attr(
2572    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2573    assert_instr("saba")
2574)]
2575#[cfg_attr(
2576    not(target_arch = "arm"),
2577    stable(feature = "neon_intrinsics", since = "1.59.0")
2578)]
2579#[cfg_attr(
2580    target_arch = "arm",
2581    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2582)]
2583pub unsafe fn vabaq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
2584    simd_add(a, vabdq_s16(b, c))
2585}
2586#[inline]
2587#[target_feature(enable = "neon")]
2588#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2589#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
2590#[cfg_attr(
2591    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2592    assert_instr("saba")
2593)]
2594#[cfg_attr(
2595    not(target_arch = "arm"),
2596    stable(feature = "neon_intrinsics", since = "1.59.0")
2597)]
2598#[cfg_attr(
2599    target_arch = "arm",
2600    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2601)]
2602pub unsafe fn vabaq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
2603    simd_add(a, vabdq_s32(b, c))
2604}
2605#[inline]
2606#[target_feature(enable = "neon")]
2607#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2608#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
2609#[cfg_attr(
2610    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2611    assert_instr("uaba")
2612)]
2613#[cfg_attr(
2614    not(target_arch = "arm"),
2615    stable(feature = "neon_intrinsics", since = "1.59.0")
2616)]
2617#[cfg_attr(
2618    target_arch = "arm",
2619    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2620)]
2621pub unsafe fn vabaq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
2622    simd_add(a, vabdq_u8(b, c))
2623}
2624#[inline]
2625#[target_feature(enable = "neon")]
2626#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2627#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
2628#[cfg_attr(
2629    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2630    assert_instr("uaba")
2631)]
2632#[cfg_attr(
2633    not(target_arch = "arm"),
2634    stable(feature = "neon_intrinsics", since = "1.59.0")
2635)]
2636#[cfg_attr(
2637    target_arch = "arm",
2638    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2639)]
2640pub unsafe fn vabaq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
2641    simd_add(a, vabdq_u16(b, c))
2642}
2643#[inline]
2644#[target_feature(enable = "neon")]
2645#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2646#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
2647#[cfg_attr(
2648    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2649    assert_instr("uaba")
2650)]
2651#[cfg_attr(
2652    not(target_arch = "arm"),
2653    stable(feature = "neon_intrinsics", since = "1.59.0")
2654)]
2655#[cfg_attr(
2656    target_arch = "arm",
2657    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2658)]
2659pub unsafe fn vabaq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
2660    simd_add(a, vabdq_u32(b, c))
2661}
2662
2663/// Absolute value (wrapping).
2664#[inline]
2665#[target_feature(enable = "neon")]
2666#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2667#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2668#[cfg_attr(
2669    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2670    assert_instr(abs)
2671)]
2672#[cfg_attr(
2673    not(target_arch = "arm"),
2674    stable(feature = "neon_intrinsics", since = "1.59.0")
2675)]
2676#[cfg_attr(
2677    target_arch = "arm",
2678    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2679)]
2680pub unsafe fn vabs_s8(a: int8x8_t) -> int8x8_t {
2681    vabs_s8_(a)
2682}
2683/// Absolute value (wrapping).
2684#[inline]
2685#[target_feature(enable = "neon")]
2686#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2687#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2688#[cfg_attr(
2689    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2690    assert_instr(abs)
2691)]
2692#[cfg_attr(
2693    not(target_arch = "arm"),
2694    stable(feature = "neon_intrinsics", since = "1.59.0")
2695)]
2696#[cfg_attr(
2697    target_arch = "arm",
2698    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2699)]
2700pub unsafe fn vabs_s16(a: int16x4_t) -> int16x4_t {
2701    vabs_s16_(a)
2702}
2703/// Absolute value (wrapping).
2704#[inline]
2705#[target_feature(enable = "neon")]
2706#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2707#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2708#[cfg_attr(
2709    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2710    assert_instr(abs)
2711)]
2712#[cfg_attr(
2713    not(target_arch = "arm"),
2714    stable(feature = "neon_intrinsics", since = "1.59.0")
2715)]
2716#[cfg_attr(
2717    target_arch = "arm",
2718    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2719)]
2720pub unsafe fn vabs_s32(a: int32x2_t) -> int32x2_t {
2721    vabs_s32_(a)
2722}
2723/// Absolute value (wrapping).
2724#[inline]
2725#[target_feature(enable = "neon")]
2726#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2727#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2728#[cfg_attr(
2729    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2730    assert_instr(abs)
2731)]
2732#[cfg_attr(
2733    not(target_arch = "arm"),
2734    stable(feature = "neon_intrinsics", since = "1.59.0")
2735)]
2736#[cfg_attr(
2737    target_arch = "arm",
2738    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2739)]
2740pub unsafe fn vabsq_s8(a: int8x16_t) -> int8x16_t {
2741    vabsq_s8_(a)
2742}
2743/// Absolute value (wrapping).
2744#[inline]
2745#[target_feature(enable = "neon")]
2746#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2747#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2748#[cfg_attr(
2749    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2750    assert_instr(abs)
2751)]
2752#[cfg_attr(
2753    not(target_arch = "arm"),
2754    stable(feature = "neon_intrinsics", since = "1.59.0")
2755)]
2756#[cfg_attr(
2757    target_arch = "arm",
2758    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2759)]
2760pub unsafe fn vabsq_s16(a: int16x8_t) -> int16x8_t {
2761    vabsq_s16_(a)
2762}
2763/// Absolute value (wrapping).
2764#[inline]
2765#[target_feature(enable = "neon")]
2766#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2767#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
2768#[cfg_attr(
2769    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2770    assert_instr(abs)
2771)]
2772#[cfg_attr(
2773    not(target_arch = "arm"),
2774    stable(feature = "neon_intrinsics", since = "1.59.0")
2775)]
2776#[cfg_attr(
2777    target_arch = "arm",
2778    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2779)]
2780pub unsafe fn vabsq_s32(a: int32x4_t) -> int32x4_t {
2781    vabsq_s32_(a)
2782}
2783
2784/// Add pairwise.
2785#[inline]
2786#[target_feature(enable = "neon")]
2787#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2788#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2789#[cfg_attr(
2790    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2791    assert_instr(addp)
2792)]
2793#[cfg_attr(
2794    not(target_arch = "arm"),
2795    stable(feature = "neon_intrinsics", since = "1.59.0")
2796)]
2797#[cfg_attr(
2798    target_arch = "arm",
2799    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2800)]
2801pub unsafe fn vpadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
2802    vpadd_s16_(a, b)
2803}
2804/// Add pairwise.
2805#[inline]
2806#[target_feature(enable = "neon")]
2807#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2808#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2809#[cfg_attr(
2810    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2811    assert_instr(addp)
2812)]
2813#[cfg_attr(
2814    not(target_arch = "arm"),
2815    stable(feature = "neon_intrinsics", since = "1.59.0")
2816)]
2817#[cfg_attr(
2818    target_arch = "arm",
2819    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2820)]
2821pub unsafe fn vpadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
2822    vpadd_s32_(a, b)
2823}
2824/// Add pairwise.
2825#[inline]
2826#[target_feature(enable = "neon")]
2827#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2828#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2829#[cfg_attr(
2830    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2831    assert_instr(addp)
2832)]
2833#[cfg_attr(
2834    not(target_arch = "arm"),
2835    stable(feature = "neon_intrinsics", since = "1.59.0")
2836)]
2837#[cfg_attr(
2838    target_arch = "arm",
2839    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2840)]
2841pub unsafe fn vpadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
2842    vpadd_s8_(a, b)
2843}
2844/// Add pairwise.
2845#[inline]
2846#[target_feature(enable = "neon")]
2847#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2848#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2849#[cfg_attr(
2850    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2851    assert_instr(addp)
2852)]
2853#[cfg_attr(
2854    not(target_arch = "arm"),
2855    stable(feature = "neon_intrinsics", since = "1.59.0")
2856)]
2857#[cfg_attr(
2858    target_arch = "arm",
2859    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2860)]
2861pub unsafe fn vpadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
2862    transmute(vpadd_s16_(transmute(a), transmute(b)))
2863}
2864/// Add pairwise.
2865#[inline]
2866#[target_feature(enable = "neon")]
2867#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2868#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2869#[cfg_attr(
2870    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2871    assert_instr(addp)
2872)]
2873#[cfg_attr(
2874    not(target_arch = "arm"),
2875    stable(feature = "neon_intrinsics", since = "1.59.0")
2876)]
2877#[cfg_attr(
2878    target_arch = "arm",
2879    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2880)]
2881pub unsafe fn vpadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
2882    transmute(vpadd_s32_(transmute(a), transmute(b)))
2883}
2884/// Add pairwise.
2885#[inline]
2886#[target_feature(enable = "neon")]
2887#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2888#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadd))]
2889#[cfg_attr(
2890    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2891    assert_instr(addp)
2892)]
2893#[cfg_attr(
2894    not(target_arch = "arm"),
2895    stable(feature = "neon_intrinsics", since = "1.59.0")
2896)]
2897#[cfg_attr(
2898    target_arch = "arm",
2899    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2900)]
2901pub unsafe fn vpadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
2902    transmute(vpadd_s8_(transmute(a), transmute(b)))
2903}
2904
2905/// Vector add.
2906#[inline]
2907#[target_feature(enable = "neon")]
2908#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2909#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2910#[cfg_attr(
2911    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2912    assert_instr(add)
2913)]
2914#[cfg_attr(
2915    not(target_arch = "arm"),
2916    stable(feature = "neon_intrinsics", since = "1.59.0")
2917)]
2918#[cfg_attr(
2919    target_arch = "arm",
2920    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2921)]
2922pub unsafe fn vadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
2923    simd_add(a, b)
2924}
2925
2926/// Vector add.
2927#[inline]
2928#[target_feature(enable = "neon")]
2929#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2930#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2931#[cfg_attr(
2932    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2933    assert_instr(add)
2934)]
2935#[cfg_attr(
2936    not(target_arch = "arm"),
2937    stable(feature = "neon_intrinsics", since = "1.59.0")
2938)]
2939#[cfg_attr(
2940    target_arch = "arm",
2941    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2942)]
2943pub unsafe fn vaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
2944    simd_add(a, b)
2945}
2946
2947/// Vector add.
2948#[inline]
2949#[target_feature(enable = "neon")]
2950#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2951#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2952#[cfg_attr(
2953    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2954    assert_instr(add)
2955)]
2956#[cfg_attr(
2957    not(target_arch = "arm"),
2958    stable(feature = "neon_intrinsics", since = "1.59.0")
2959)]
2960#[cfg_attr(
2961    target_arch = "arm",
2962    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2963)]
2964pub unsafe fn vadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
2965    simd_add(a, b)
2966}
2967
2968/// Vector add.
2969#[inline]
2970#[target_feature(enable = "neon")]
2971#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2972#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2973#[cfg_attr(
2974    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2975    assert_instr(add)
2976)]
2977#[cfg_attr(
2978    not(target_arch = "arm"),
2979    stable(feature = "neon_intrinsics", since = "1.59.0")
2980)]
2981#[cfg_attr(
2982    target_arch = "arm",
2983    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2984)]
2985pub unsafe fn vaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
2986    simd_add(a, b)
2987}
2988
2989/// Vector add.
2990#[inline]
2991#[target_feature(enable = "neon")]
2992#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2993#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2994#[cfg_attr(
2995    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2996    assert_instr(add)
2997)]
2998#[cfg_attr(
2999    not(target_arch = "arm"),
3000    stable(feature = "neon_intrinsics", since = "1.59.0")
3001)]
3002#[cfg_attr(
3003    target_arch = "arm",
3004    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3005)]
3006pub unsafe fn vadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
3007    simd_add(a, b)
3008}
3009
3010/// Vector add.
3011#[inline]
3012#[target_feature(enable = "neon")]
3013#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3014#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3015#[cfg_attr(
3016    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3017    assert_instr(add)
3018)]
3019#[cfg_attr(
3020    not(target_arch = "arm"),
3021    stable(feature = "neon_intrinsics", since = "1.59.0")
3022)]
3023#[cfg_attr(
3024    target_arch = "arm",
3025    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3026)]
3027pub unsafe fn vaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
3028    simd_add(a, b)
3029}
3030
3031/// Vector add.
3032#[inline]
3033#[target_feature(enable = "neon")]
3034#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3035#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3036#[cfg_attr(
3037    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3038    assert_instr(add)
3039)]
3040#[cfg_attr(
3041    not(target_arch = "arm"),
3042    stable(feature = "neon_intrinsics", since = "1.59.0")
3043)]
3044#[cfg_attr(
3045    target_arch = "arm",
3046    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3047)]
3048pub unsafe fn vaddq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
3049    simd_add(a, b)
3050}
3051
3052/// Vector add.
3053#[inline]
3054#[target_feature(enable = "neon")]
3055#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3056#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3057#[cfg_attr(
3058    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3059    assert_instr(add)
3060)]
3061#[cfg_attr(
3062    not(target_arch = "arm"),
3063    stable(feature = "neon_intrinsics", since = "1.59.0")
3064)]
3065#[cfg_attr(
3066    target_arch = "arm",
3067    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3068)]
3069pub unsafe fn vadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
3070    simd_add(a, b)
3071}
3072
3073/// Vector add.
3074#[inline]
3075#[target_feature(enable = "neon")]
3076#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3077#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3078#[cfg_attr(
3079    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3080    assert_instr(add)
3081)]
3082#[cfg_attr(
3083    not(target_arch = "arm"),
3084    stable(feature = "neon_intrinsics", since = "1.59.0")
3085)]
3086#[cfg_attr(
3087    target_arch = "arm",
3088    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3089)]
3090pub unsafe fn vaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
3091    simd_add(a, b)
3092}
3093
3094/// Vector add.
3095#[inline]
3096#[target_feature(enable = "neon")]
3097#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3098#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3099#[cfg_attr(
3100    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3101    assert_instr(add)
3102)]
3103#[cfg_attr(
3104    not(target_arch = "arm"),
3105    stable(feature = "neon_intrinsics", since = "1.59.0")
3106)]
3107#[cfg_attr(
3108    target_arch = "arm",
3109    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3110)]
3111pub unsafe fn vadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
3112    simd_add(a, b)
3113}
3114
3115/// Vector add.
3116#[inline]
3117#[target_feature(enable = "neon")]
3118#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3119#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3120#[cfg_attr(
3121    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3122    assert_instr(add)
3123)]
3124#[cfg_attr(
3125    not(target_arch = "arm"),
3126    stable(feature = "neon_intrinsics", since = "1.59.0")
3127)]
3128#[cfg_attr(
3129    target_arch = "arm",
3130    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3131)]
3132pub unsafe fn vaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
3133    simd_add(a, b)
3134}
3135
3136/// Vector add.
3137#[inline]
3138#[target_feature(enable = "neon")]
3139#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3140#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3141#[cfg_attr(
3142    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3143    assert_instr(add)
3144)]
3145#[cfg_attr(
3146    not(target_arch = "arm"),
3147    stable(feature = "neon_intrinsics", since = "1.59.0")
3148)]
3149#[cfg_attr(
3150    target_arch = "arm",
3151    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3152)]
3153pub unsafe fn vadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
3154    simd_add(a, b)
3155}
3156
3157/// Vector add.
3158#[inline]
3159#[target_feature(enable = "neon")]
3160#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3161#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3162#[cfg_attr(
3163    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3164    assert_instr(add)
3165)]
3166#[cfg_attr(
3167    not(target_arch = "arm"),
3168    stable(feature = "neon_intrinsics", since = "1.59.0")
3169)]
3170#[cfg_attr(
3171    target_arch = "arm",
3172    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3173)]
3174pub unsafe fn vaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
3175    simd_add(a, b)
3176}
3177
3178/// Vector add.
3179#[inline]
3180#[target_feature(enable = "neon")]
3181#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3182#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3183#[cfg_attr(
3184    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3185    assert_instr(add)
3186)]
3187#[cfg_attr(
3188    not(target_arch = "arm"),
3189    stable(feature = "neon_intrinsics", since = "1.59.0")
3190)]
3191#[cfg_attr(
3192    target_arch = "arm",
3193    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3194)]
3195pub unsafe fn vaddq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
3196    simd_add(a, b)
3197}
3198
3199/// Vector add.
3200#[inline]
3201#[target_feature(enable = "neon")]
3202#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3203#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3204#[cfg_attr(
3205    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3206    assert_instr(fadd)
3207)]
3208#[cfg_attr(
3209    not(target_arch = "arm"),
3210    stable(feature = "neon_intrinsics", since = "1.59.0")
3211)]
3212#[cfg_attr(
3213    target_arch = "arm",
3214    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3215)]
3216pub unsafe fn vadd_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
3217    simd_add(a, b)
3218}
3219
3220/// Vector add.
3221#[inline]
3222#[target_feature(enable = "neon")]
3223#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3224#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
3225#[cfg_attr(
3226    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3227    assert_instr(fadd)
3228)]
3229#[cfg_attr(
3230    not(target_arch = "arm"),
3231    stable(feature = "neon_intrinsics", since = "1.59.0")
3232)]
3233#[cfg_attr(
3234    target_arch = "arm",
3235    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3236)]
3237pub unsafe fn vaddq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
3238    simd_add(a, b)
3239}
3240
3241/// Signed Add Long (vector).
3242#[inline]
3243#[target_feature(enable = "neon")]
3244#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3245#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3246#[cfg_attr(
3247    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3248    assert_instr(saddl)
3249)]
3250#[cfg_attr(
3251    not(target_arch = "arm"),
3252    stable(feature = "neon_intrinsics", since = "1.59.0")
3253)]
3254#[cfg_attr(
3255    target_arch = "arm",
3256    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3257)]
3258pub unsafe fn vaddl_s8(a: int8x8_t, b: int8x8_t) -> int16x8_t {
3259    let a: int16x8_t = simd_cast(a);
3260    let b: int16x8_t = simd_cast(b);
3261    simd_add(a, b)
3262}
3263
3264/// Signed Add Long (vector).
3265#[inline]
3266#[target_feature(enable = "neon")]
3267#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3268#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3269#[cfg_attr(
3270    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3271    assert_instr(saddl)
3272)]
3273#[cfg_attr(
3274    not(target_arch = "arm"),
3275    stable(feature = "neon_intrinsics", since = "1.59.0")
3276)]
3277#[cfg_attr(
3278    target_arch = "arm",
3279    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3280)]
3281pub unsafe fn vaddl_s16(a: int16x4_t, b: int16x4_t) -> int32x4_t {
3282    let a: int32x4_t = simd_cast(a);
3283    let b: int32x4_t = simd_cast(b);
3284    simd_add(a, b)
3285}
3286
3287/// Signed Add Long (vector).
3288#[inline]
3289#[target_feature(enable = "neon")]
3290#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3291#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3292#[cfg_attr(
3293    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3294    assert_instr(saddl)
3295)]
3296#[cfg_attr(
3297    not(target_arch = "arm"),
3298    stable(feature = "neon_intrinsics", since = "1.59.0")
3299)]
3300#[cfg_attr(
3301    target_arch = "arm",
3302    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3303)]
3304pub unsafe fn vaddl_s32(a: int32x2_t, b: int32x2_t) -> int64x2_t {
3305    let a: int64x2_t = simd_cast(a);
3306    let b: int64x2_t = simd_cast(b);
3307    simd_add(a, b)
3308}
3309
3310/// Unsigned Add Long (vector).
3311#[inline]
3312#[target_feature(enable = "neon")]
3313#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3314#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3315#[cfg_attr(
3316    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3317    assert_instr(uaddl)
3318)]
3319#[cfg_attr(
3320    not(target_arch = "arm"),
3321    stable(feature = "neon_intrinsics", since = "1.59.0")
3322)]
3323#[cfg_attr(
3324    target_arch = "arm",
3325    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3326)]
3327pub unsafe fn vaddl_u8(a: uint8x8_t, b: uint8x8_t) -> uint16x8_t {
3328    let a: uint16x8_t = simd_cast(a);
3329    let b: uint16x8_t = simd_cast(b);
3330    simd_add(a, b)
3331}
3332
3333/// Unsigned Add Long (vector).
3334#[inline]
3335#[target_feature(enable = "neon")]
3336#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3337#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3338#[cfg_attr(
3339    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3340    assert_instr(uaddl)
3341)]
3342#[cfg_attr(
3343    not(target_arch = "arm"),
3344    stable(feature = "neon_intrinsics", since = "1.59.0")
3345)]
3346#[cfg_attr(
3347    target_arch = "arm",
3348    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3349)]
3350pub unsafe fn vaddl_u16(a: uint16x4_t, b: uint16x4_t) -> uint32x4_t {
3351    let a: uint32x4_t = simd_cast(a);
3352    let b: uint32x4_t = simd_cast(b);
3353    simd_add(a, b)
3354}
3355
3356/// Unsigned Add Long (vector).
3357#[inline]
3358#[target_feature(enable = "neon")]
3359#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3360#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3361#[cfg_attr(
3362    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3363    assert_instr(uaddl)
3364)]
3365#[cfg_attr(
3366    not(target_arch = "arm"),
3367    stable(feature = "neon_intrinsics", since = "1.59.0")
3368)]
3369#[cfg_attr(
3370    target_arch = "arm",
3371    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3372)]
3373pub unsafe fn vaddl_u32(a: uint32x2_t, b: uint32x2_t) -> uint64x2_t {
3374    let a: uint64x2_t = simd_cast(a);
3375    let b: uint64x2_t = simd_cast(b);
3376    simd_add(a, b)
3377}
3378
3379/// Signed Add Long (vector, high half).
3380#[inline]
3381#[target_feature(enable = "neon")]
3382#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3383#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3384#[cfg_attr(
3385    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3386    assert_instr(saddl2)
3387)]
3388#[cfg_attr(
3389    not(target_arch = "arm"),
3390    stable(feature = "neon_intrinsics", since = "1.59.0")
3391)]
3392#[cfg_attr(
3393    target_arch = "arm",
3394    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3395)]
3396pub unsafe fn vaddl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t {
3397    let a: int8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]);
3398    let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3399    let a: int16x8_t = simd_cast(a);
3400    let b: int16x8_t = simd_cast(b);
3401    simd_add(a, b)
3402}
3403
3404/// Signed Add Long (vector, high half).
3405#[inline]
3406#[target_feature(enable = "neon")]
3407#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3408#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3409#[cfg_attr(
3410    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3411    assert_instr(saddl2)
3412)]
3413#[cfg_attr(
3414    not(target_arch = "arm"),
3415    stable(feature = "neon_intrinsics", since = "1.59.0")
3416)]
3417#[cfg_attr(
3418    target_arch = "arm",
3419    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3420)]
3421pub unsafe fn vaddl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t {
3422    let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
3423    let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3424    let a: int32x4_t = simd_cast(a);
3425    let b: int32x4_t = simd_cast(b);
3426    simd_add(a, b)
3427}
3428
3429/// Signed Add Long (vector, high half).
3430#[inline]
3431#[target_feature(enable = "neon")]
3432#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3433#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3434#[cfg_attr(
3435    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3436    assert_instr(saddl2)
3437)]
3438#[cfg_attr(
3439    not(target_arch = "arm"),
3440    stable(feature = "neon_intrinsics", since = "1.59.0")
3441)]
3442#[cfg_attr(
3443    target_arch = "arm",
3444    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3445)]
3446pub unsafe fn vaddl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t {
3447    let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
3448    let b: int32x2_t = simd_shuffle!(b, b, [2, 3]);
3449    let a: int64x2_t = simd_cast(a);
3450    let b: int64x2_t = simd_cast(b);
3451    simd_add(a, b)
3452}
3453
3454/// Unsigned Add Long (vector, high half).
3455#[inline]
3456#[target_feature(enable = "neon")]
3457#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3458#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3459#[cfg_attr(
3460    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3461    assert_instr(uaddl2)
3462)]
3463#[cfg_attr(
3464    not(target_arch = "arm"),
3465    stable(feature = "neon_intrinsics", since = "1.59.0")
3466)]
3467#[cfg_attr(
3468    target_arch = "arm",
3469    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3470)]
3471pub unsafe fn vaddl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t {
3472    let a: uint8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]);
3473    let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3474    let a: uint16x8_t = simd_cast(a);
3475    let b: uint16x8_t = simd_cast(b);
3476    simd_add(a, b)
3477}
3478
3479/// Unsigned Add Long (vector, high half).
3480#[inline]
3481#[target_feature(enable = "neon")]
3482#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3483#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3484#[cfg_attr(
3485    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3486    assert_instr(uaddl2)
3487)]
3488#[cfg_attr(
3489    not(target_arch = "arm"),
3490    stable(feature = "neon_intrinsics", since = "1.59.0")
3491)]
3492#[cfg_attr(
3493    target_arch = "arm",
3494    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3495)]
3496pub unsafe fn vaddl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t {
3497    let a: uint16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
3498    let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3499    let a: uint32x4_t = simd_cast(a);
3500    let b: uint32x4_t = simd_cast(b);
3501    simd_add(a, b)
3502}
3503
3504/// Unsigned Add Long (vector, high half).
3505#[inline]
3506#[target_feature(enable = "neon")]
3507#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3508#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3509#[cfg_attr(
3510    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3511    assert_instr(uaddl2)
3512)]
3513#[cfg_attr(
3514    not(target_arch = "arm"),
3515    stable(feature = "neon_intrinsics", since = "1.59.0")
3516)]
3517#[cfg_attr(
3518    target_arch = "arm",
3519    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3520)]
3521pub unsafe fn vaddl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t {
3522    let a: uint32x2_t = simd_shuffle!(a, a, [2, 3]);
3523    let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]);
3524    let a: uint64x2_t = simd_cast(a);
3525    let b: uint64x2_t = simd_cast(b);
3526    simd_add(a, b)
3527}
3528
3529/// Signed Add Wide.
3530#[inline]
3531#[target_feature(enable = "neon")]
3532#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3533#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3534#[cfg_attr(
3535    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3536    assert_instr(saddw)
3537)]
3538#[cfg_attr(
3539    not(target_arch = "arm"),
3540    stable(feature = "neon_intrinsics", since = "1.59.0")
3541)]
3542#[cfg_attr(
3543    target_arch = "arm",
3544    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3545)]
3546pub unsafe fn vaddw_s8(a: int16x8_t, b: int8x8_t) -> int16x8_t {
3547    let b: int16x8_t = simd_cast(b);
3548    simd_add(a, b)
3549}
3550
3551/// Signed Add Wide.
3552#[inline]
3553#[target_feature(enable = "neon")]
3554#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3555#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3556#[cfg_attr(
3557    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3558    assert_instr(saddw)
3559)]
3560#[cfg_attr(
3561    not(target_arch = "arm"),
3562    stable(feature = "neon_intrinsics", since = "1.59.0")
3563)]
3564#[cfg_attr(
3565    target_arch = "arm",
3566    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3567)]
3568pub unsafe fn vaddw_s16(a: int32x4_t, b: int16x4_t) -> int32x4_t {
3569    let b: int32x4_t = simd_cast(b);
3570    simd_add(a, b)
3571}
3572
3573/// Signed Add Wide.
3574#[inline]
3575#[target_feature(enable = "neon")]
3576#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3577#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3578#[cfg_attr(
3579    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3580    assert_instr(saddw)
3581)]
3582#[cfg_attr(
3583    not(target_arch = "arm"),
3584    stable(feature = "neon_intrinsics", since = "1.59.0")
3585)]
3586#[cfg_attr(
3587    target_arch = "arm",
3588    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3589)]
3590pub unsafe fn vaddw_s32(a: int64x2_t, b: int32x2_t) -> int64x2_t {
3591    let b: int64x2_t = simd_cast(b);
3592    simd_add(a, b)
3593}
3594
3595/// Unsigned Add Wide.
3596#[inline]
3597#[target_feature(enable = "neon")]
3598#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3599#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3600#[cfg_attr(
3601    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3602    assert_instr(uaddw)
3603)]
3604#[cfg_attr(
3605    not(target_arch = "arm"),
3606    stable(feature = "neon_intrinsics", since = "1.59.0")
3607)]
3608#[cfg_attr(
3609    target_arch = "arm",
3610    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3611)]
3612pub unsafe fn vaddw_u8(a: uint16x8_t, b: uint8x8_t) -> uint16x8_t {
3613    let b: uint16x8_t = simd_cast(b);
3614    simd_add(a, b)
3615}
3616
3617/// Unsigned Add Wide.
3618#[inline]
3619#[target_feature(enable = "neon")]
3620#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3621#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3622#[cfg_attr(
3623    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3624    assert_instr(uaddw)
3625)]
3626#[cfg_attr(
3627    not(target_arch = "arm"),
3628    stable(feature = "neon_intrinsics", since = "1.59.0")
3629)]
3630#[cfg_attr(
3631    target_arch = "arm",
3632    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3633)]
3634pub unsafe fn vaddw_u16(a: uint32x4_t, b: uint16x4_t) -> uint32x4_t {
3635    let b: uint32x4_t = simd_cast(b);
3636    simd_add(a, b)
3637}
3638
3639/// Unsigned Add Wide.
3640#[inline]
3641#[target_feature(enable = "neon")]
3642#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3643#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3644#[cfg_attr(
3645    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3646    assert_instr(uaddw)
3647)]
3648#[cfg_attr(
3649    not(target_arch = "arm"),
3650    stable(feature = "neon_intrinsics", since = "1.59.0")
3651)]
3652#[cfg_attr(
3653    target_arch = "arm",
3654    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3655)]
3656pub unsafe fn vaddw_u32(a: uint64x2_t, b: uint32x2_t) -> uint64x2_t {
3657    let b: uint64x2_t = simd_cast(b);
3658    simd_add(a, b)
3659}
3660
3661/// Signed Add Wide (high half).
3662#[inline]
3663#[target_feature(enable = "neon")]
3664#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3665#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3666#[cfg_attr(
3667    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3668    assert_instr(saddw2)
3669)]
3670#[cfg_attr(
3671    not(target_arch = "arm"),
3672    stable(feature = "neon_intrinsics", since = "1.59.0")
3673)]
3674#[cfg_attr(
3675    target_arch = "arm",
3676    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3677)]
3678pub unsafe fn vaddw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t {
3679    let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3680    let b: int16x8_t = simd_cast(b);
3681    simd_add(a, b)
3682}
3683
3684/// Signed Add Wide (high half).
3685#[inline]
3686#[target_feature(enable = "neon")]
3687#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3688#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3689#[cfg_attr(
3690    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3691    assert_instr(saddw2)
3692)]
3693#[cfg_attr(
3694    not(target_arch = "arm"),
3695    stable(feature = "neon_intrinsics", since = "1.59.0")
3696)]
3697#[cfg_attr(
3698    target_arch = "arm",
3699    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3700)]
3701pub unsafe fn vaddw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t {
3702    let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3703    let b: int32x4_t = simd_cast(b);
3704    simd_add(a, b)
3705}
3706
3707/// Signed Add Wide (high half).
3708#[inline]
3709#[target_feature(enable = "neon")]
3710#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3711#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3712#[cfg_attr(
3713    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3714    assert_instr(saddw2)
3715)]
3716#[cfg_attr(
3717    not(target_arch = "arm"),
3718    stable(feature = "neon_intrinsics", since = "1.59.0")
3719)]
3720#[cfg_attr(
3721    target_arch = "arm",
3722    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3723)]
3724pub unsafe fn vaddw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t {
3725    let b: int32x2_t = simd_shuffle!(b, b, [2, 3]);
3726    let b: int64x2_t = simd_cast(b);
3727    simd_add(a, b)
3728}
3729
3730/// Unsigned Add Wide (high half).
3731#[inline]
3732#[target_feature(enable = "neon")]
3733#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3734#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3735#[cfg_attr(
3736    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3737    assert_instr(uaddw2)
3738)]
3739#[cfg_attr(
3740    not(target_arch = "arm"),
3741    stable(feature = "neon_intrinsics", since = "1.59.0")
3742)]
3743#[cfg_attr(
3744    target_arch = "arm",
3745    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3746)]
3747pub unsafe fn vaddw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t {
3748    let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3749    let b: uint16x8_t = simd_cast(b);
3750    simd_add(a, b)
3751}
3752
3753/// Unsigned Add Wide (high half).
3754#[inline]
3755#[target_feature(enable = "neon")]
3756#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3757#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3758#[cfg_attr(
3759    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3760    assert_instr(uaddw2)
3761)]
3762#[cfg_attr(
3763    not(target_arch = "arm"),
3764    stable(feature = "neon_intrinsics", since = "1.59.0")
3765)]
3766#[cfg_attr(
3767    target_arch = "arm",
3768    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3769)]
3770pub unsafe fn vaddw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t {
3771    let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3772    let b: uint32x4_t = simd_cast(b);
3773    simd_add(a, b)
3774}
3775
3776/// Unsigned Add Wide (high half).
3777#[inline]
3778#[target_feature(enable = "neon")]
3779#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3780#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3781#[cfg_attr(
3782    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3783    assert_instr(uaddw2)
3784)]
3785#[cfg_attr(
3786    not(target_arch = "arm"),
3787    stable(feature = "neon_intrinsics", since = "1.59.0")
3788)]
3789#[cfg_attr(
3790    target_arch = "arm",
3791    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3792)]
3793pub unsafe fn vaddw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
3794    let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]);
3795    let b: uint64x2_t = simd_cast(b);
3796    simd_add(a, b)
3797}
3798
3799/// Add returning High Narrow.
3800#[inline]
3801#[target_feature(enable = "neon")]
3802#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3803#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3804#[cfg_attr(
3805    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3806    assert_instr(addhn)
3807)]
3808#[cfg_attr(
3809    not(target_arch = "arm"),
3810    stable(feature = "neon_intrinsics", since = "1.59.0")
3811)]
3812#[cfg_attr(
3813    target_arch = "arm",
3814    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3815)]
3816pub unsafe fn vaddhn_s16(a: int16x8_t, b: int16x8_t) -> int8x8_t {
3817    simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8)))
3818}
3819
3820/// Add returning High Narrow.
3821#[inline]
3822#[target_feature(enable = "neon")]
3823#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3824#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3825#[cfg_attr(
3826    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3827    assert_instr(addhn)
3828)]
3829#[cfg_attr(
3830    not(target_arch = "arm"),
3831    stable(feature = "neon_intrinsics", since = "1.59.0")
3832)]
3833#[cfg_attr(
3834    target_arch = "arm",
3835    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3836)]
3837pub unsafe fn vaddhn_s32(a: int32x4_t, b: int32x4_t) -> int16x4_t {
3838    simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16)))
3839}
3840
3841/// Add returning High Narrow.
3842#[inline]
3843#[target_feature(enable = "neon")]
3844#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3845#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3846#[cfg_attr(
3847    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3848    assert_instr(addhn)
3849)]
3850#[cfg_attr(
3851    not(target_arch = "arm"),
3852    stable(feature = "neon_intrinsics", since = "1.59.0")
3853)]
3854#[cfg_attr(
3855    target_arch = "arm",
3856    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3857)]
3858pub unsafe fn vaddhn_s64(a: int64x2_t, b: int64x2_t) -> int32x2_t {
3859    simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32)))
3860}
3861
3862/// Add returning High Narrow.
3863#[inline]
3864#[target_feature(enable = "neon")]
3865#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3866#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3867#[cfg_attr(
3868    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3869    assert_instr(addhn)
3870)]
3871#[cfg_attr(
3872    not(target_arch = "arm"),
3873    stable(feature = "neon_intrinsics", since = "1.59.0")
3874)]
3875#[cfg_attr(
3876    target_arch = "arm",
3877    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3878)]
3879pub unsafe fn vaddhn_u16(a: uint16x8_t, b: uint16x8_t) -> uint8x8_t {
3880    simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8)))
3881}
3882
3883/// Add returning High Narrow.
3884#[inline]
3885#[target_feature(enable = "neon")]
3886#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3887#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3888#[cfg_attr(
3889    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3890    assert_instr(addhn)
3891)]
3892#[cfg_attr(
3893    not(target_arch = "arm"),
3894    stable(feature = "neon_intrinsics", since = "1.59.0")
3895)]
3896#[cfg_attr(
3897    target_arch = "arm",
3898    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3899)]
3900pub unsafe fn vaddhn_u32(a: uint32x4_t, b: uint32x4_t) -> uint16x4_t {
3901    simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16)))
3902}
3903
3904/// Add returning High Narrow.
3905#[inline]
3906#[target_feature(enable = "neon")]
3907#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3908#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3909#[cfg_attr(
3910    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3911    assert_instr(addhn)
3912)]
3913#[cfg_attr(
3914    not(target_arch = "arm"),
3915    stable(feature = "neon_intrinsics", since = "1.59.0")
3916)]
3917#[cfg_attr(
3918    target_arch = "arm",
3919    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3920)]
3921pub unsafe fn vaddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t {
3922    simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32)))
3923}
3924
3925/// Add returning High Narrow (high half).
3926#[inline]
3927#[target_feature(enable = "neon")]
3928#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3929#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3930#[cfg_attr(
3931    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3932    assert_instr(addhn2)
3933)]
3934#[cfg_attr(
3935    not(target_arch = "arm"),
3936    stable(feature = "neon_intrinsics", since = "1.59.0")
3937)]
3938#[cfg_attr(
3939    target_arch = "arm",
3940    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3941)]
3942pub unsafe fn vaddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t {
3943    let x = simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8)));
3944    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
3945}
3946
3947/// Add returning High Narrow (high half).
3948#[inline]
3949#[target_feature(enable = "neon")]
3950#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3951#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3952#[cfg_attr(
3953    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3954    assert_instr(addhn2)
3955)]
3956#[cfg_attr(
3957    not(target_arch = "arm"),
3958    stable(feature = "neon_intrinsics", since = "1.59.0")
3959)]
3960#[cfg_attr(
3961    target_arch = "arm",
3962    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3963)]
3964pub unsafe fn vaddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t {
3965    let x = simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16)));
3966    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
3967}
3968
3969/// Add returning High Narrow (high half).
3970#[inline]
3971#[target_feature(enable = "neon")]
3972#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3973#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3974#[cfg_attr(
3975    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3976    assert_instr(addhn2)
3977)]
3978#[cfg_attr(
3979    not(target_arch = "arm"),
3980    stable(feature = "neon_intrinsics", since = "1.59.0")
3981)]
3982#[cfg_attr(
3983    target_arch = "arm",
3984    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3985)]
3986pub unsafe fn vaddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t {
3987    let x = simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32)));
3988    simd_shuffle!(r, x, [0, 1, 2, 3])
3989}
3990
3991/// Add returning High Narrow (high half).
3992#[inline]
3993#[target_feature(enable = "neon")]
3994#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3995#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3996#[cfg_attr(
3997    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3998    assert_instr(addhn2)
3999)]
4000#[cfg_attr(
4001    not(target_arch = "arm"),
4002    stable(feature = "neon_intrinsics", since = "1.59.0")
4003)]
4004#[cfg_attr(
4005    target_arch = "arm",
4006    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4007)]
4008pub unsafe fn vaddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t {
4009    let x = simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8)));
4010    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
4011}
4012
4013/// Add returning High Narrow (high half).
4014#[inline]
4015#[target_feature(enable = "neon")]
4016#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4017#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
4018#[cfg_attr(
4019    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4020    assert_instr(addhn2)
4021)]
4022#[cfg_attr(
4023    not(target_arch = "arm"),
4024    stable(feature = "neon_intrinsics", since = "1.59.0")
4025)]
4026#[cfg_attr(
4027    target_arch = "arm",
4028    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4029)]
4030pub unsafe fn vaddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t {
4031    let x = simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16)));
4032    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
4033}
4034
4035/// Add returning High Narrow (high half).
4036#[inline]
4037#[target_feature(enable = "neon")]
4038#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4039#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
4040#[cfg_attr(
4041    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4042    assert_instr(addhn2)
4043)]
4044#[cfg_attr(
4045    not(target_arch = "arm"),
4046    stable(feature = "neon_intrinsics", since = "1.59.0")
4047)]
4048#[cfg_attr(
4049    target_arch = "arm",
4050    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4051)]
4052pub unsafe fn vaddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t {
4053    let x = simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32)));
4054    simd_shuffle!(r, x, [0, 1, 2, 3])
4055}
4056
4057/// Rounding Add returning High Narrow.
4058#[inline]
4059#[target_feature(enable = "neon")]
4060#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4061#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))]
4062#[cfg_attr(
4063    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4064    assert_instr(raddhn)
4065)]
4066#[cfg_attr(
4067    not(target_arch = "arm"),
4068    stable(feature = "neon_intrinsics", since = "1.59.0")
4069)]
4070#[cfg_attr(
4071    target_arch = "arm",
4072    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4073)]
4074pub unsafe fn vraddhn_s16(a: int16x8_t, b: int16x8_t) -> int8x8_t {
4075    vraddhn_s16_(a, b)
4076}
4077
4078/// Rounding Add returning High Narrow.
4079#[inline]
4080#[target_feature(enable = "neon")]
4081#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4082#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))]
4083#[cfg_attr(
4084    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4085    assert_instr(raddhn)
4086)]
4087#[cfg_attr(
4088    not(target_arch = "arm"),
4089    stable(feature = "neon_intrinsics", since = "1.59.0")
4090)]
4091#[cfg_attr(
4092    target_arch = "arm",
4093    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4094)]
4095pub unsafe fn vraddhn_s32(a: int32x4_t, b: int32x4_t) -> int16x4_t {
4096    vraddhn_s32_(a, b)
4097}
4098
4099/// Rounding Add returning High Narrow.
4100#[inline]
4101#[target_feature(enable = "neon")]
4102#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4103#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))]
4104#[cfg_attr(
4105    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4106    assert_instr(raddhn)
4107)]
4108#[cfg_attr(
4109    not(target_arch = "arm"),
4110    stable(feature = "neon_intrinsics", since = "1.59.0")
4111)]
4112#[cfg_attr(
4113    target_arch = "arm",
4114    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4115)]
4116pub unsafe fn vraddhn_s64(a: int64x2_t, b: int64x2_t) -> int32x2_t {
4117    vraddhn_s64_(a, b)
4118}
4119
4120/// Rounding Add returning High Narrow.
4121#[inline]
4122#[target_feature(enable = "neon")]
4123#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4124#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))]
4125#[cfg_attr(
4126    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4127    assert_instr(raddhn)
4128)]
4129#[cfg_attr(
4130    not(target_arch = "arm"),
4131    stable(feature = "neon_intrinsics", since = "1.59.0")
4132)]
4133#[cfg_attr(
4134    target_arch = "arm",
4135    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4136)]
4137pub unsafe fn vraddhn_u16(a: uint16x8_t, b: uint16x8_t) -> uint8x8_t {
4138    transmute(vraddhn_s16_(transmute(a), transmute(b)))
4139}
4140
4141/// Rounding Add returning High Narrow.
4142#[inline]
4143#[target_feature(enable = "neon")]
4144#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4145#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))]
4146#[cfg_attr(
4147    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4148    assert_instr(raddhn)
4149)]
4150#[cfg_attr(
4151    not(target_arch = "arm"),
4152    stable(feature = "neon_intrinsics", since = "1.59.0")
4153)]
4154#[cfg_attr(
4155    target_arch = "arm",
4156    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4157)]
4158pub unsafe fn vraddhn_u32(a: uint32x4_t, b: uint32x4_t) -> uint16x4_t {
4159    transmute(vraddhn_s32_(transmute(a), transmute(b)))
4160}
4161
4162/// Rounding Add returning High Narrow.
4163#[inline]
4164#[target_feature(enable = "neon")]
4165#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4166#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))]
4167#[cfg_attr(
4168    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4169    assert_instr(raddhn)
4170)]
4171#[cfg_attr(
4172    not(target_arch = "arm"),
4173    stable(feature = "neon_intrinsics", since = "1.59.0")
4174)]
4175#[cfg_attr(
4176    target_arch = "arm",
4177    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4178)]
4179pub unsafe fn vraddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t {
4180    transmute(vraddhn_s64_(transmute(a), transmute(b)))
4181}
4182
4183/// Rounding Add returning High Narrow (high half).
4184#[inline]
4185#[target_feature(enable = "neon")]
4186#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4187#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))]
4188#[cfg_attr(
4189    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4190    assert_instr(raddhn2)
4191)]
4192#[cfg_attr(
4193    not(target_arch = "arm"),
4194    stable(feature = "neon_intrinsics", since = "1.59.0")
4195)]
4196#[cfg_attr(
4197    target_arch = "arm",
4198    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4199)]
4200pub unsafe fn vraddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t {
4201    let x = vraddhn_s16_(a, b);
4202    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
4203}
4204
4205/// Rounding Add returning High Narrow (high half).
4206#[inline]
4207#[target_feature(enable = "neon")]
4208#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4209#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))]
4210#[cfg_attr(
4211    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4212    assert_instr(raddhn2)
4213)]
4214#[cfg_attr(
4215    not(target_arch = "arm"),
4216    stable(feature = "neon_intrinsics", since = "1.59.0")
4217)]
4218#[cfg_attr(
4219    target_arch = "arm",
4220    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4221)]
4222pub unsafe fn vraddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t {
4223    let x = vraddhn_s32_(a, b);
4224    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
4225}
4226
4227/// Rounding Add returning High Narrow (high half).
4228#[inline]
4229#[target_feature(enable = "neon")]
4230#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4231#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))]
4232#[cfg_attr(
4233    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4234    assert_instr(raddhn2)
4235)]
4236#[cfg_attr(
4237    not(target_arch = "arm"),
4238    stable(feature = "neon_intrinsics", since = "1.59.0")
4239)]
4240#[cfg_attr(
4241    target_arch = "arm",
4242    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4243)]
4244pub unsafe fn vraddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t {
4245    let x = vraddhn_s64_(a, b);
4246    simd_shuffle!(r, x, [0, 1, 2, 3])
4247}
4248
4249/// Rounding Add returning High Narrow (high half).
4250#[inline]
4251#[target_feature(enable = "neon")]
4252#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4253#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i16))]
4254#[cfg_attr(
4255    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4256    assert_instr(raddhn2)
4257)]
4258#[cfg_attr(
4259    not(target_arch = "arm"),
4260    stable(feature = "neon_intrinsics", since = "1.59.0")
4261)]
4262#[cfg_attr(
4263    target_arch = "arm",
4264    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4265)]
4266pub unsafe fn vraddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t {
4267    let x: uint8x8_t = transmute(vraddhn_s16_(transmute(a), transmute(b)));
4268    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
4269}
4270
4271/// Rounding Add returning High Narrow (high half).
4272#[inline]
4273#[target_feature(enable = "neon")]
4274#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4275#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i32))]
4276#[cfg_attr(
4277    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4278    assert_instr(raddhn2)
4279)]
4280#[cfg_attr(
4281    not(target_arch = "arm"),
4282    stable(feature = "neon_intrinsics", since = "1.59.0")
4283)]
4284#[cfg_attr(
4285    target_arch = "arm",
4286    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4287)]
4288pub unsafe fn vraddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t {
4289    let x: uint16x4_t = transmute(vraddhn_s32_(transmute(a), transmute(b)));
4290    simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
4291}
4292
4293/// Rounding Add returning High Narrow (high half).
4294#[inline]
4295#[target_feature(enable = "neon")]
4296#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4297#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vraddhn.i64))]
4298#[cfg_attr(
4299    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4300    assert_instr(raddhn2)
4301)]
4302#[cfg_attr(
4303    not(target_arch = "arm"),
4304    stable(feature = "neon_intrinsics", since = "1.59.0")
4305)]
4306#[cfg_attr(
4307    target_arch = "arm",
4308    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4309)]
4310pub unsafe fn vraddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t {
4311    let x: uint32x2_t = transmute(vraddhn_s64_(transmute(a), transmute(b)));
4312    simd_shuffle!(r, x, [0, 1, 2, 3])
4313}
4314
4315/// Signed Add Long Pairwise.
4316#[inline]
4317#[target_feature(enable = "neon")]
4318#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4319#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s8))]
4320#[cfg_attr(
4321    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4322    assert_instr(saddlp)
4323)]
4324#[cfg_attr(
4325    not(target_arch = "arm"),
4326    stable(feature = "neon_intrinsics", since = "1.59.0")
4327)]
4328#[cfg_attr(
4329    target_arch = "arm",
4330    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4331)]
4332pub unsafe fn vpaddl_s8(a: int8x8_t) -> int16x4_t {
4333    vpaddl_s8_(a)
4334}
4335
4336/// Signed Add Long Pairwise.
4337#[inline]
4338#[target_feature(enable = "neon")]
4339#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4340#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s16))]
4341#[cfg_attr(
4342    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4343    assert_instr(saddlp)
4344)]
4345#[cfg_attr(
4346    not(target_arch = "arm"),
4347    stable(feature = "neon_intrinsics", since = "1.59.0")
4348)]
4349#[cfg_attr(
4350    target_arch = "arm",
4351    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4352)]
4353pub unsafe fn vpaddl_s16(a: int16x4_t) -> int32x2_t {
4354    vpaddl_s16_(a)
4355}
4356
4357/// Signed Add Long Pairwise.
4358#[inline]
4359#[target_feature(enable = "neon")]
4360#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4361#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s32))]
4362#[cfg_attr(
4363    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4364    assert_instr(saddlp)
4365)]
4366#[cfg_attr(
4367    not(target_arch = "arm"),
4368    stable(feature = "neon_intrinsics", since = "1.59.0")
4369)]
4370#[cfg_attr(
4371    target_arch = "arm",
4372    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4373)]
4374pub unsafe fn vpaddl_s32(a: int32x2_t) -> int64x1_t {
4375    vpaddl_s32_(a)
4376}
4377
4378/// Signed Add Long Pairwise.
4379#[inline]
4380#[target_feature(enable = "neon")]
4381#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4382#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s8))]
4383#[cfg_attr(
4384    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4385    assert_instr(saddlp)
4386)]
4387#[cfg_attr(
4388    not(target_arch = "arm"),
4389    stable(feature = "neon_intrinsics", since = "1.59.0")
4390)]
4391#[cfg_attr(
4392    target_arch = "arm",
4393    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4394)]
4395pub unsafe fn vpaddlq_s8(a: int8x16_t) -> int16x8_t {
4396    vpaddlq_s8_(a)
4397}
4398
4399/// Signed Add Long Pairwise.
4400#[inline]
4401#[target_feature(enable = "neon")]
4402#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4403#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s16))]
4404#[cfg_attr(
4405    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4406    assert_instr(saddlp)
4407)]
4408#[cfg_attr(
4409    not(target_arch = "arm"),
4410    stable(feature = "neon_intrinsics", since = "1.59.0")
4411)]
4412#[cfg_attr(
4413    target_arch = "arm",
4414    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4415)]
4416pub unsafe fn vpaddlq_s16(a: int16x8_t) -> int32x4_t {
4417    vpaddlq_s16_(a)
4418}
4419
4420/// Signed Add Long Pairwise.
4421#[inline]
4422#[target_feature(enable = "neon")]
4423#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4424#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.s32))]
4425#[cfg_attr(
4426    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4427    assert_instr(saddlp)
4428)]
4429#[cfg_attr(
4430    not(target_arch = "arm"),
4431    stable(feature = "neon_intrinsics", since = "1.59.0")
4432)]
4433#[cfg_attr(
4434    target_arch = "arm",
4435    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4436)]
4437pub unsafe fn vpaddlq_s32(a: int32x4_t) -> int64x2_t {
4438    vpaddlq_s32_(a)
4439}
4440
4441/// Unsigned Add Long Pairwise.
4442#[inline]
4443#[target_feature(enable = "neon")]
4444#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4445#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u8))]
4446#[cfg_attr(
4447    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4448    assert_instr(uaddlp)
4449)]
4450#[cfg_attr(
4451    not(target_arch = "arm"),
4452    stable(feature = "neon_intrinsics", since = "1.59.0")
4453)]
4454#[cfg_attr(
4455    target_arch = "arm",
4456    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4457)]
4458pub unsafe fn vpaddl_u8(a: uint8x8_t) -> uint16x4_t {
4459    vpaddl_u8_(a)
4460}
4461
4462/// Unsigned Add Long Pairwise.
4463#[inline]
4464#[target_feature(enable = "neon")]
4465#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4466#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u16))]
4467#[cfg_attr(
4468    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4469    assert_instr(uaddlp)
4470)]
4471#[cfg_attr(
4472    not(target_arch = "arm"),
4473    stable(feature = "neon_intrinsics", since = "1.59.0")
4474)]
4475#[cfg_attr(
4476    target_arch = "arm",
4477    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4478)]
4479pub unsafe fn vpaddl_u16(a: uint16x4_t) -> uint32x2_t {
4480    vpaddl_u16_(a)
4481}
4482
4483/// Unsigned Add Long Pairwise.
4484#[inline]
4485#[target_feature(enable = "neon")]
4486#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4487#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u32))]
4488#[cfg_attr(
4489    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4490    assert_instr(uaddlp)
4491)]
4492#[cfg_attr(
4493    not(target_arch = "arm"),
4494    stable(feature = "neon_intrinsics", since = "1.59.0")
4495)]
4496#[cfg_attr(
4497    target_arch = "arm",
4498    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4499)]
4500pub unsafe fn vpaddl_u32(a: uint32x2_t) -> uint64x1_t {
4501    vpaddl_u32_(a)
4502}
4503
4504/// Unsigned Add Long Pairwise.
4505#[inline]
4506#[target_feature(enable = "neon")]
4507#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4508#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u8))]
4509#[cfg_attr(
4510    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4511    assert_instr(uaddlp)
4512)]
4513#[cfg_attr(
4514    not(target_arch = "arm"),
4515    stable(feature = "neon_intrinsics", since = "1.59.0")
4516)]
4517#[cfg_attr(
4518    target_arch = "arm",
4519    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4520)]
4521pub unsafe fn vpaddlq_u8(a: uint8x16_t) -> uint16x8_t {
4522    vpaddlq_u8_(a)
4523}
4524
4525/// Unsigned Add Long Pairwise.
4526#[inline]
4527#[target_feature(enable = "neon")]
4528#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4529#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u16))]
4530#[cfg_attr(
4531    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4532    assert_instr(uaddlp)
4533)]
4534#[cfg_attr(
4535    not(target_arch = "arm"),
4536    stable(feature = "neon_intrinsics", since = "1.59.0")
4537)]
4538#[cfg_attr(
4539    target_arch = "arm",
4540    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4541)]
4542pub unsafe fn vpaddlq_u16(a: uint16x8_t) -> uint32x4_t {
4543    vpaddlq_u16_(a)
4544}
4545
4546/// Unsigned Add Long Pairwise.
4547#[inline]
4548#[target_feature(enable = "neon")]
4549#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4550#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpaddl.u32))]
4551#[cfg_attr(
4552    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4553    assert_instr(uaddlp)
4554)]
4555#[cfg_attr(
4556    not(target_arch = "arm"),
4557    stable(feature = "neon_intrinsics", since = "1.59.0")
4558)]
4559#[cfg_attr(
4560    target_arch = "arm",
4561    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4562)]
4563pub unsafe fn vpaddlq_u32(a: uint32x4_t) -> uint64x2_t {
4564    vpaddlq_u32_(a)
4565}
4566
4567/// Vector narrow integer.
4568#[inline]
4569#[target_feature(enable = "neon")]
4570#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4571#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4572#[cfg_attr(
4573    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4574    assert_instr(xtn)
4575)]
4576#[cfg_attr(
4577    not(target_arch = "arm"),
4578    stable(feature = "neon_intrinsics", since = "1.59.0")
4579)]
4580#[cfg_attr(
4581    target_arch = "arm",
4582    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4583)]
4584pub unsafe fn vmovn_s16(a: int16x8_t) -> int8x8_t {
4585    simd_cast(a)
4586}
4587
4588/// Vector narrow integer.
4589#[inline]
4590#[target_feature(enable = "neon")]
4591#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4592#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4593#[cfg_attr(
4594    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4595    assert_instr(xtn)
4596)]
4597#[cfg_attr(
4598    not(target_arch = "arm"),
4599    stable(feature = "neon_intrinsics", since = "1.59.0")
4600)]
4601#[cfg_attr(
4602    target_arch = "arm",
4603    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4604)]
4605pub unsafe fn vmovn_s32(a: int32x4_t) -> int16x4_t {
4606    simd_cast(a)
4607}
4608
4609/// Vector narrow integer.
4610#[inline]
4611#[target_feature(enable = "neon")]
4612#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4613#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4614#[cfg_attr(
4615    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4616    assert_instr(xtn)
4617)]
4618#[cfg_attr(
4619    not(target_arch = "arm"),
4620    stable(feature = "neon_intrinsics", since = "1.59.0")
4621)]
4622#[cfg_attr(
4623    target_arch = "arm",
4624    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4625)]
4626pub unsafe fn vmovn_s64(a: int64x2_t) -> int32x2_t {
4627    simd_cast(a)
4628}
4629
4630/// Vector narrow integer.
4631#[inline]
4632#[target_feature(enable = "neon")]
4633#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4634#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4635#[cfg_attr(
4636    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4637    assert_instr(xtn)
4638)]
4639#[cfg_attr(
4640    not(target_arch = "arm"),
4641    stable(feature = "neon_intrinsics", since = "1.59.0")
4642)]
4643#[cfg_attr(
4644    target_arch = "arm",
4645    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4646)]
4647pub unsafe fn vmovn_u16(a: uint16x8_t) -> uint8x8_t {
4648    simd_cast(a)
4649}
4650
4651/// Vector narrow integer.
4652#[inline]
4653#[target_feature(enable = "neon")]
4654#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4655#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4656#[cfg_attr(
4657    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4658    assert_instr(xtn)
4659)]
4660#[cfg_attr(
4661    not(target_arch = "arm"),
4662    stable(feature = "neon_intrinsics", since = "1.59.0")
4663)]
4664#[cfg_attr(
4665    target_arch = "arm",
4666    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4667)]
4668pub unsafe fn vmovn_u32(a: uint32x4_t) -> uint16x4_t {
4669    simd_cast(a)
4670}
4671
4672/// Vector narrow integer.
4673#[inline]
4674#[target_feature(enable = "neon")]
4675#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4676#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
4677#[cfg_attr(
4678    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4679    assert_instr(xtn)
4680)]
4681#[cfg_attr(
4682    not(target_arch = "arm"),
4683    stable(feature = "neon_intrinsics", since = "1.59.0")
4684)]
4685#[cfg_attr(
4686    target_arch = "arm",
4687    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4688)]
4689pub unsafe fn vmovn_u64(a: uint64x2_t) -> uint32x2_t {
4690    simd_cast(a)
4691}
4692
4693/// Vector long move.
4694#[inline]
4695#[target_feature(enable = "neon")]
4696#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4697#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4698#[cfg_attr(
4699    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4700    assert_instr(sxtl)
4701)]
4702#[cfg_attr(
4703    not(target_arch = "arm"),
4704    stable(feature = "neon_intrinsics", since = "1.59.0")
4705)]
4706#[cfg_attr(
4707    target_arch = "arm",
4708    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4709)]
4710pub unsafe fn vmovl_s8(a: int8x8_t) -> int16x8_t {
4711    simd_cast(a)
4712}
4713
4714/// Vector long move.
4715#[inline]
4716#[target_feature(enable = "neon")]
4717#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4718#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4719#[cfg_attr(
4720    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4721    assert_instr(sxtl)
4722)]
4723#[cfg_attr(
4724    not(target_arch = "arm"),
4725    stable(feature = "neon_intrinsics", since = "1.59.0")
4726)]
4727#[cfg_attr(
4728    target_arch = "arm",
4729    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4730)]
4731pub unsafe fn vmovl_s16(a: int16x4_t) -> int32x4_t {
4732    simd_cast(a)
4733}
4734
4735/// Vector long move.
4736#[inline]
4737#[target_feature(enable = "neon")]
4738#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4739#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4740#[cfg_attr(
4741    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4742    assert_instr(sxtl)
4743)]
4744#[cfg_attr(
4745    not(target_arch = "arm"),
4746    stable(feature = "neon_intrinsics", since = "1.59.0")
4747)]
4748#[cfg_attr(
4749    target_arch = "arm",
4750    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4751)]
4752pub unsafe fn vmovl_s32(a: int32x2_t) -> int64x2_t {
4753    simd_cast(a)
4754}
4755
4756/// Vector long move.
4757#[inline]
4758#[target_feature(enable = "neon")]
4759#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4760#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4761#[cfg_attr(
4762    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4763    assert_instr(uxtl)
4764)]
4765#[cfg_attr(
4766    not(target_arch = "arm"),
4767    stable(feature = "neon_intrinsics", since = "1.59.0")
4768)]
4769#[cfg_attr(
4770    target_arch = "arm",
4771    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4772)]
4773pub unsafe fn vmovl_u8(a: uint8x8_t) -> uint16x8_t {
4774    simd_cast(a)
4775}
4776
4777/// Vector long move.
4778#[inline]
4779#[target_feature(enable = "neon")]
4780#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4781#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4782#[cfg_attr(
4783    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4784    assert_instr(uxtl)
4785)]
4786#[cfg_attr(
4787    not(target_arch = "arm"),
4788    stable(feature = "neon_intrinsics", since = "1.59.0")
4789)]
4790#[cfg_attr(
4791    target_arch = "arm",
4792    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4793)]
4794pub unsafe fn vmovl_u16(a: uint16x4_t) -> uint32x4_t {
4795    simd_cast(a)
4796}
4797
4798/// Vector long move.
4799#[inline]
4800#[target_feature(enable = "neon")]
4801#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4802#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
4803#[cfg_attr(
4804    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4805    assert_instr(uxtl)
4806)]
4807#[cfg_attr(
4808    not(target_arch = "arm"),
4809    stable(feature = "neon_intrinsics", since = "1.59.0")
4810)]
4811#[cfg_attr(
4812    target_arch = "arm",
4813    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4814)]
4815pub unsafe fn vmovl_u32(a: uint32x2_t) -> uint64x2_t {
4816    simd_cast(a)
4817}
4818
4819/// Vector bitwise not.
4820#[inline]
4821#[target_feature(enable = "neon")]
4822#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4823#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4824#[cfg_attr(
4825    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4826    assert_instr(mvn)
4827)]
4828#[cfg_attr(
4829    not(target_arch = "arm"),
4830    stable(feature = "neon_intrinsics", since = "1.59.0")
4831)]
4832#[cfg_attr(
4833    target_arch = "arm",
4834    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4835)]
4836pub unsafe fn vmvn_s8(a: int8x8_t) -> int8x8_t {
4837    let b = int8x8_t::splat(-1);
4838    simd_xor(a, b)
4839}
4840
4841/// Vector bitwise not.
4842#[inline]
4843#[target_feature(enable = "neon")]
4844#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4845#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4846#[cfg_attr(
4847    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4848    assert_instr(mvn)
4849)]
4850#[cfg_attr(
4851    not(target_arch = "arm"),
4852    stable(feature = "neon_intrinsics", since = "1.59.0")
4853)]
4854#[cfg_attr(
4855    target_arch = "arm",
4856    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4857)]
4858pub unsafe fn vmvnq_s8(a: int8x16_t) -> int8x16_t {
4859    let b = int8x16_t::splat(-1);
4860    simd_xor(a, b)
4861}
4862
4863/// Vector bitwise not.
4864#[inline]
4865#[target_feature(enable = "neon")]
4866#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4867#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4868#[cfg_attr(
4869    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4870    assert_instr(mvn)
4871)]
4872#[cfg_attr(
4873    not(target_arch = "arm"),
4874    stable(feature = "neon_intrinsics", since = "1.59.0")
4875)]
4876#[cfg_attr(
4877    target_arch = "arm",
4878    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4879)]
4880pub unsafe fn vmvn_s16(a: int16x4_t) -> int16x4_t {
4881    let b = int16x4_t::splat(-1);
4882    simd_xor(a, b)
4883}
4884
4885/// Vector bitwise not.
4886#[inline]
4887#[target_feature(enable = "neon")]
4888#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4889#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4890#[cfg_attr(
4891    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4892    assert_instr(mvn)
4893)]
4894#[cfg_attr(
4895    not(target_arch = "arm"),
4896    stable(feature = "neon_intrinsics", since = "1.59.0")
4897)]
4898#[cfg_attr(
4899    target_arch = "arm",
4900    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4901)]
4902pub unsafe fn vmvnq_s16(a: int16x8_t) -> int16x8_t {
4903    let b = int16x8_t::splat(-1);
4904    simd_xor(a, b)
4905}
4906
4907/// Vector bitwise not.
4908#[inline]
4909#[target_feature(enable = "neon")]
4910#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4911#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4912#[cfg_attr(
4913    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4914    assert_instr(mvn)
4915)]
4916#[cfg_attr(
4917    not(target_arch = "arm"),
4918    stable(feature = "neon_intrinsics", since = "1.59.0")
4919)]
4920#[cfg_attr(
4921    target_arch = "arm",
4922    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4923)]
4924pub unsafe fn vmvn_s32(a: int32x2_t) -> int32x2_t {
4925    let b = int32x2_t::splat(-1);
4926    simd_xor(a, b)
4927}
4928
4929/// Vector bitwise not.
4930#[inline]
4931#[target_feature(enable = "neon")]
4932#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4933#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4934#[cfg_attr(
4935    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4936    assert_instr(mvn)
4937)]
4938#[cfg_attr(
4939    not(target_arch = "arm"),
4940    stable(feature = "neon_intrinsics", since = "1.59.0")
4941)]
4942#[cfg_attr(
4943    target_arch = "arm",
4944    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4945)]
4946pub unsafe fn vmvnq_s32(a: int32x4_t) -> int32x4_t {
4947    let b = int32x4_t::splat(-1);
4948    simd_xor(a, b)
4949}
4950
4951/// Vector bitwise not.
4952#[inline]
4953#[target_feature(enable = "neon")]
4954#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4955#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4956#[cfg_attr(
4957    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4958    assert_instr(mvn)
4959)]
4960#[cfg_attr(
4961    not(target_arch = "arm"),
4962    stable(feature = "neon_intrinsics", since = "1.59.0")
4963)]
4964#[cfg_attr(
4965    target_arch = "arm",
4966    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4967)]
4968pub unsafe fn vmvn_u8(a: uint8x8_t) -> uint8x8_t {
4969    let b = uint8x8_t::splat(255);
4970    simd_xor(a, b)
4971}
4972
4973/// Vector bitwise not.
4974#[inline]
4975#[target_feature(enable = "neon")]
4976#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4977#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4978#[cfg_attr(
4979    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4980    assert_instr(mvn)
4981)]
4982#[cfg_attr(
4983    not(target_arch = "arm"),
4984    stable(feature = "neon_intrinsics", since = "1.59.0")
4985)]
4986#[cfg_attr(
4987    target_arch = "arm",
4988    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4989)]
4990pub unsafe fn vmvnq_u8(a: uint8x16_t) -> uint8x16_t {
4991    let b = uint8x16_t::splat(255);
4992    simd_xor(a, b)
4993}
4994
4995/// Vector bitwise not.
4996#[inline]
4997#[target_feature(enable = "neon")]
4998#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4999#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5000#[cfg_attr(
5001    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5002    assert_instr(mvn)
5003)]
5004#[cfg_attr(
5005    not(target_arch = "arm"),
5006    stable(feature = "neon_intrinsics", since = "1.59.0")
5007)]
5008#[cfg_attr(
5009    target_arch = "arm",
5010    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5011)]
5012pub unsafe fn vmvn_u16(a: uint16x4_t) -> uint16x4_t {
5013    let b = uint16x4_t::splat(65_535);
5014    simd_xor(a, b)
5015}
5016
5017/// Vector bitwise not.
5018#[inline]
5019#[target_feature(enable = "neon")]
5020#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5021#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5022#[cfg_attr(
5023    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5024    assert_instr(mvn)
5025)]
5026#[cfg_attr(
5027    not(target_arch = "arm"),
5028    stable(feature = "neon_intrinsics", since = "1.59.0")
5029)]
5030#[cfg_attr(
5031    target_arch = "arm",
5032    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5033)]
5034pub unsafe fn vmvnq_u16(a: uint16x8_t) -> uint16x8_t {
5035    let b = uint16x8_t::splat(65_535);
5036    simd_xor(a, b)
5037}
5038
5039/// Vector bitwise not.
5040#[inline]
5041#[target_feature(enable = "neon")]
5042#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5043#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5044#[cfg_attr(
5045    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5046    assert_instr(mvn)
5047)]
5048#[cfg_attr(
5049    not(target_arch = "arm"),
5050    stable(feature = "neon_intrinsics", since = "1.59.0")
5051)]
5052#[cfg_attr(
5053    target_arch = "arm",
5054    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5055)]
5056pub unsafe fn vmvn_u32(a: uint32x2_t) -> uint32x2_t {
5057    let b = uint32x2_t::splat(4_294_967_295);
5058    simd_xor(a, b)
5059}
5060
5061/// Vector bitwise not.
5062#[inline]
5063#[target_feature(enable = "neon")]
5064#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5065#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5066#[cfg_attr(
5067    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5068    assert_instr(mvn)
5069)]
5070#[cfg_attr(
5071    not(target_arch = "arm"),
5072    stable(feature = "neon_intrinsics", since = "1.59.0")
5073)]
5074#[cfg_attr(
5075    target_arch = "arm",
5076    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5077)]
5078pub unsafe fn vmvnq_u32(a: uint32x4_t) -> uint32x4_t {
5079    let b = uint32x4_t::splat(4_294_967_295);
5080    simd_xor(a, b)
5081}
5082
5083/// Vector bitwise not.
5084#[inline]
5085#[target_feature(enable = "neon")]
5086#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5087#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5088#[cfg_attr(
5089    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5090    assert_instr(mvn)
5091)]
5092#[cfg_attr(
5093    not(target_arch = "arm"),
5094    stable(feature = "neon_intrinsics", since = "1.59.0")
5095)]
5096#[cfg_attr(
5097    target_arch = "arm",
5098    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5099)]
5100pub unsafe fn vmvn_p8(a: poly8x8_t) -> poly8x8_t {
5101    let b = poly8x8_t::splat(255);
5102    simd_xor(a, b)
5103}
5104
5105/// Vector bitwise not.
5106#[inline]
5107#[target_feature(enable = "neon")]
5108#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5109#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
5110#[cfg_attr(
5111    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5112    assert_instr(mvn)
5113)]
5114#[cfg_attr(
5115    not(target_arch = "arm"),
5116    stable(feature = "neon_intrinsics", since = "1.59.0")
5117)]
5118#[cfg_attr(
5119    target_arch = "arm",
5120    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5121)]
5122pub unsafe fn vmvnq_p8(a: poly8x16_t) -> poly8x16_t {
5123    let b = poly8x16_t::splat(255);
5124    simd_xor(a, b)
5125}
5126
5127/// Vector bitwise bit clear
5128#[inline]
5129#[target_feature(enable = "neon")]
5130#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5131#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5132#[cfg_attr(
5133    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5134    assert_instr(bic)
5135)]
5136#[cfg_attr(
5137    not(target_arch = "arm"),
5138    stable(feature = "neon_intrinsics", since = "1.59.0")
5139)]
5140#[cfg_attr(
5141    target_arch = "arm",
5142    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5143)]
5144pub unsafe fn vbic_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
5145    let c = int8x8_t::splat(-1);
5146    simd_and(simd_xor(b, c), a)
5147}
5148
5149/// Vector bitwise bit clear
5150#[inline]
5151#[target_feature(enable = "neon")]
5152#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5153#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5154#[cfg_attr(
5155    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5156    assert_instr(bic)
5157)]
5158#[cfg_attr(
5159    not(target_arch = "arm"),
5160    stable(feature = "neon_intrinsics", since = "1.59.0")
5161)]
5162#[cfg_attr(
5163    target_arch = "arm",
5164    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5165)]
5166pub unsafe fn vbicq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
5167    let c = int8x16_t::splat(-1);
5168    simd_and(simd_xor(b, c), a)
5169}
5170
5171/// Vector bitwise bit clear
5172#[inline]
5173#[target_feature(enable = "neon")]
5174#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5175#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5176#[cfg_attr(
5177    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5178    assert_instr(bic)
5179)]
5180#[cfg_attr(
5181    not(target_arch = "arm"),
5182    stable(feature = "neon_intrinsics", since = "1.59.0")
5183)]
5184#[cfg_attr(
5185    target_arch = "arm",
5186    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5187)]
5188pub unsafe fn vbic_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
5189    let c = int16x4_t::splat(-1);
5190    simd_and(simd_xor(b, c), a)
5191}
5192
5193/// Vector bitwise bit clear
5194#[inline]
5195#[target_feature(enable = "neon")]
5196#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5197#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5198#[cfg_attr(
5199    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5200    assert_instr(bic)
5201)]
5202#[cfg_attr(
5203    not(target_arch = "arm"),
5204    stable(feature = "neon_intrinsics", since = "1.59.0")
5205)]
5206#[cfg_attr(
5207    target_arch = "arm",
5208    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5209)]
5210pub unsafe fn vbicq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
5211    let c = int16x8_t::splat(-1);
5212    simd_and(simd_xor(b, c), a)
5213}
5214
5215/// Vector bitwise bit clear
5216#[inline]
5217#[target_feature(enable = "neon")]
5218#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5219#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5220#[cfg_attr(
5221    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5222    assert_instr(bic)
5223)]
5224#[cfg_attr(
5225    not(target_arch = "arm"),
5226    stable(feature = "neon_intrinsics", since = "1.59.0")
5227)]
5228#[cfg_attr(
5229    target_arch = "arm",
5230    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5231)]
5232pub unsafe fn vbic_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
5233    let c = int32x2_t::splat(-1);
5234    simd_and(simd_xor(b, c), a)
5235}
5236
5237/// Vector bitwise bit clear
5238#[inline]
5239#[target_feature(enable = "neon")]
5240#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5241#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5242#[cfg_attr(
5243    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5244    assert_instr(bic)
5245)]
5246#[cfg_attr(
5247    not(target_arch = "arm"),
5248    stable(feature = "neon_intrinsics", since = "1.59.0")
5249)]
5250#[cfg_attr(
5251    target_arch = "arm",
5252    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5253)]
5254pub unsafe fn vbicq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
5255    let c = int32x4_t::splat(-1);
5256    simd_and(simd_xor(b, c), a)
5257}
5258
5259/// Vector bitwise bit clear
5260#[inline]
5261#[target_feature(enable = "neon")]
5262#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5263#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5264#[cfg_attr(
5265    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5266    assert_instr(bic)
5267)]
5268#[cfg_attr(
5269    not(target_arch = "arm"),
5270    stable(feature = "neon_intrinsics", since = "1.59.0")
5271)]
5272#[cfg_attr(
5273    target_arch = "arm",
5274    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5275)]
5276pub unsafe fn vbic_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
5277    let c = int64x1_t::splat(-1);
5278    simd_and(simd_xor(b, c), a)
5279}
5280
5281/// Vector bitwise bit clear
5282#[inline]
5283#[target_feature(enable = "neon")]
5284#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5285#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5286#[cfg_attr(
5287    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5288    assert_instr(bic)
5289)]
5290#[cfg_attr(
5291    not(target_arch = "arm"),
5292    stable(feature = "neon_intrinsics", since = "1.59.0")
5293)]
5294#[cfg_attr(
5295    target_arch = "arm",
5296    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5297)]
5298pub unsafe fn vbicq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
5299    let c = int64x2_t::splat(-1);
5300    simd_and(simd_xor(b, c), a)
5301}
5302
5303/// Vector bitwise bit clear
5304#[inline]
5305#[target_feature(enable = "neon")]
5306#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5307#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5308#[cfg_attr(
5309    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5310    assert_instr(bic)
5311)]
5312#[cfg_attr(
5313    not(target_arch = "arm"),
5314    stable(feature = "neon_intrinsics", since = "1.59.0")
5315)]
5316#[cfg_attr(
5317    target_arch = "arm",
5318    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5319)]
5320pub unsafe fn vbic_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
5321    let c = int8x8_t::splat(-1);
5322    simd_and(simd_xor(b, transmute(c)), a)
5323}
5324
5325/// Vector bitwise bit clear
5326#[inline]
5327#[target_feature(enable = "neon")]
5328#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5329#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5330#[cfg_attr(
5331    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5332    assert_instr(bic)
5333)]
5334#[cfg_attr(
5335    not(target_arch = "arm"),
5336    stable(feature = "neon_intrinsics", since = "1.59.0")
5337)]
5338#[cfg_attr(
5339    target_arch = "arm",
5340    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5341)]
5342pub unsafe fn vbicq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
5343    let c = int8x16_t::splat(-1);
5344    simd_and(simd_xor(b, transmute(c)), a)
5345}
5346
5347/// Vector bitwise bit clear
5348#[inline]
5349#[target_feature(enable = "neon")]
5350#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5351#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5352#[cfg_attr(
5353    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5354    assert_instr(bic)
5355)]
5356#[cfg_attr(
5357    not(target_arch = "arm"),
5358    stable(feature = "neon_intrinsics", since = "1.59.0")
5359)]
5360#[cfg_attr(
5361    target_arch = "arm",
5362    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5363)]
5364pub unsafe fn vbic_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
5365    let c = int16x4_t::splat(-1);
5366    simd_and(simd_xor(b, transmute(c)), a)
5367}
5368
5369/// Vector bitwise bit clear
5370#[inline]
5371#[target_feature(enable = "neon")]
5372#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5373#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5374#[cfg_attr(
5375    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5376    assert_instr(bic)
5377)]
5378#[cfg_attr(
5379    not(target_arch = "arm"),
5380    stable(feature = "neon_intrinsics", since = "1.59.0")
5381)]
5382#[cfg_attr(
5383    target_arch = "arm",
5384    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5385)]
5386pub unsafe fn vbicq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
5387    let c = int16x8_t::splat(-1);
5388    simd_and(simd_xor(b, transmute(c)), a)
5389}
5390
5391/// Vector bitwise bit clear
5392#[inline]
5393#[target_feature(enable = "neon")]
5394#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5395#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5396#[cfg_attr(
5397    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5398    assert_instr(bic)
5399)]
5400#[cfg_attr(
5401    not(target_arch = "arm"),
5402    stable(feature = "neon_intrinsics", since = "1.59.0")
5403)]
5404#[cfg_attr(
5405    target_arch = "arm",
5406    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5407)]
5408pub unsafe fn vbic_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
5409    let c = int32x2_t::splat(-1);
5410    simd_and(simd_xor(b, transmute(c)), a)
5411}
5412
5413/// Vector bitwise bit clear
5414#[inline]
5415#[target_feature(enable = "neon")]
5416#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5417#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5418#[cfg_attr(
5419    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5420    assert_instr(bic)
5421)]
5422#[cfg_attr(
5423    not(target_arch = "arm"),
5424    stable(feature = "neon_intrinsics", since = "1.59.0")
5425)]
5426#[cfg_attr(
5427    target_arch = "arm",
5428    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5429)]
5430pub unsafe fn vbicq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
5431    let c = int32x4_t::splat(-1);
5432    simd_and(simd_xor(b, transmute(c)), a)
5433}
5434
5435/// Vector bitwise bit clear
5436#[inline]
5437#[target_feature(enable = "neon")]
5438#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5439#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5440#[cfg_attr(
5441    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5442    assert_instr(bic)
5443)]
5444#[cfg_attr(
5445    not(target_arch = "arm"),
5446    stable(feature = "neon_intrinsics", since = "1.59.0")
5447)]
5448#[cfg_attr(
5449    target_arch = "arm",
5450    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5451)]
5452pub unsafe fn vbic_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
5453    let c = int64x1_t::splat(-1);
5454    simd_and(simd_xor(b, transmute(c)), a)
5455}
5456
5457/// Vector bitwise bit clear
5458#[inline]
5459#[target_feature(enable = "neon")]
5460#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5461#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
5462#[cfg_attr(
5463    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5464    assert_instr(bic)
5465)]
5466#[cfg_attr(
5467    not(target_arch = "arm"),
5468    stable(feature = "neon_intrinsics", since = "1.59.0")
5469)]
5470#[cfg_attr(
5471    target_arch = "arm",
5472    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5473)]
5474pub unsafe fn vbicq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
5475    let c = int64x2_t::splat(-1);
5476    simd_and(simd_xor(b, transmute(c)), a)
5477}
5478
5479/// Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register
5480/// to the corresponding bit from the first source SIMD&FP register when the original
5481/// destination bit was 1, otherwise from the second source SIMD&FP register.
5482
5483/// Bitwise Select.
5484#[inline]
5485#[target_feature(enable = "neon")]
5486#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5487#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5488#[cfg_attr(
5489    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5490    assert_instr(bsl)
5491)]
5492#[cfg_attr(
5493    not(target_arch = "arm"),
5494    stable(feature = "neon_intrinsics", since = "1.59.0")
5495)]
5496#[cfg_attr(
5497    target_arch = "arm",
5498    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5499)]
5500pub unsafe fn vbsl_s8(a: uint8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
5501    let not = int8x8_t::splat(-1);
5502    transmute(simd_or(
5503        simd_and(a, transmute(b)),
5504        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5505    ))
5506}
5507
5508/// Bitwise Select.
5509#[inline]
5510#[target_feature(enable = "neon")]
5511#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5512#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5513#[cfg_attr(
5514    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5515    assert_instr(bsl)
5516)]
5517#[cfg_attr(
5518    not(target_arch = "arm"),
5519    stable(feature = "neon_intrinsics", since = "1.59.0")
5520)]
5521#[cfg_attr(
5522    target_arch = "arm",
5523    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5524)]
5525pub unsafe fn vbsl_s16(a: uint16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
5526    let not = int16x4_t::splat(-1);
5527    transmute(simd_or(
5528        simd_and(a, transmute(b)),
5529        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5530    ))
5531}
5532
5533/// Bitwise Select.
5534#[inline]
5535#[target_feature(enable = "neon")]
5536#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5537#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5538#[cfg_attr(
5539    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5540    assert_instr(bsl)
5541)]
5542#[cfg_attr(
5543    not(target_arch = "arm"),
5544    stable(feature = "neon_intrinsics", since = "1.59.0")
5545)]
5546#[cfg_attr(
5547    target_arch = "arm",
5548    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5549)]
5550pub unsafe fn vbsl_s32(a: uint32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
5551    let not = int32x2_t::splat(-1);
5552    transmute(simd_or(
5553        simd_and(a, transmute(b)),
5554        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5555    ))
5556}
5557
5558/// Bitwise Select.
5559#[inline]
5560#[target_feature(enable = "neon")]
5561#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5562#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5563#[cfg_attr(
5564    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5565    assert_instr(bsl)
5566)]
5567#[cfg_attr(
5568    not(target_arch = "arm"),
5569    stable(feature = "neon_intrinsics", since = "1.59.0")
5570)]
5571#[cfg_attr(
5572    target_arch = "arm",
5573    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5574)]
5575pub unsafe fn vbsl_s64(a: uint64x1_t, b: int64x1_t, c: int64x1_t) -> int64x1_t {
5576    let not = int64x1_t::splat(-1);
5577    transmute(simd_or(
5578        simd_and(a, transmute(b)),
5579        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5580    ))
5581}
5582
5583/// Bitwise Select.
5584#[inline]
5585#[target_feature(enable = "neon")]
5586#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5587#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5588#[cfg_attr(
5589    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5590    assert_instr(bsl)
5591)]
5592#[cfg_attr(
5593    not(target_arch = "arm"),
5594    stable(feature = "neon_intrinsics", since = "1.59.0")
5595)]
5596#[cfg_attr(
5597    target_arch = "arm",
5598    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5599)]
5600pub unsafe fn vbsl_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
5601    let not = int8x8_t::splat(-1);
5602    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5603}
5604
5605/// Bitwise Select.
5606#[inline]
5607#[target_feature(enable = "neon")]
5608#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5609#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5610#[cfg_attr(
5611    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5612    assert_instr(bsl)
5613)]
5614#[cfg_attr(
5615    not(target_arch = "arm"),
5616    stable(feature = "neon_intrinsics", since = "1.59.0")
5617)]
5618#[cfg_attr(
5619    target_arch = "arm",
5620    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5621)]
5622pub unsafe fn vbsl_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
5623    let not = int16x4_t::splat(-1);
5624    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5625}
5626
5627/// Bitwise Select.
5628#[inline]
5629#[target_feature(enable = "neon")]
5630#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5631#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5632#[cfg_attr(
5633    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5634    assert_instr(bsl)
5635)]
5636#[cfg_attr(
5637    not(target_arch = "arm"),
5638    stable(feature = "neon_intrinsics", since = "1.59.0")
5639)]
5640#[cfg_attr(
5641    target_arch = "arm",
5642    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5643)]
5644pub unsafe fn vbsl_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
5645    let not = int32x2_t::splat(-1);
5646    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5647}
5648
5649/// Bitwise Select.
5650#[inline]
5651#[target_feature(enable = "neon")]
5652#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5653#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5654#[cfg_attr(
5655    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5656    assert_instr(bsl)
5657)]
5658#[cfg_attr(
5659    not(target_arch = "arm"),
5660    stable(feature = "neon_intrinsics", since = "1.59.0")
5661)]
5662#[cfg_attr(
5663    target_arch = "arm",
5664    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5665)]
5666pub unsafe fn vbsl_u64(a: uint64x1_t, b: uint64x1_t, c: uint64x1_t) -> uint64x1_t {
5667    let not = int64x1_t::splat(-1);
5668    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5669}
5670
5671/// Bitwise Select.
5672#[inline]
5673#[target_feature(enable = "neon")]
5674#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5675#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5676#[cfg_attr(
5677    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5678    assert_instr(bsl)
5679)]
5680#[cfg_attr(
5681    not(target_arch = "arm"),
5682    stable(feature = "neon_intrinsics", since = "1.59.0")
5683)]
5684#[cfg_attr(
5685    target_arch = "arm",
5686    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5687)]
5688pub unsafe fn vbsl_f32(a: uint32x2_t, b: float32x2_t, c: float32x2_t) -> float32x2_t {
5689    let not = int32x2_t::splat(-1);
5690    transmute(simd_or(
5691        simd_and(a, transmute(b)),
5692        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5693    ))
5694}
5695
5696/// Bitwise Select.
5697#[inline]
5698#[target_feature(enable = "neon")]
5699#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5700#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5701#[cfg_attr(
5702    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5703    assert_instr(bsl)
5704)]
5705#[cfg_attr(
5706    not(target_arch = "arm"),
5707    stable(feature = "neon_intrinsics", since = "1.59.0")
5708)]
5709#[cfg_attr(
5710    target_arch = "arm",
5711    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5712)]
5713pub unsafe fn vbsl_p8(a: uint8x8_t, b: poly8x8_t, c: poly8x8_t) -> poly8x8_t {
5714    let not = int8x8_t::splat(-1);
5715    transmute(simd_or(
5716        simd_and(a, transmute(b)),
5717        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5718    ))
5719}
5720
5721/// Bitwise Select.
5722#[inline]
5723#[target_feature(enable = "neon")]
5724#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5725#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5726#[cfg_attr(
5727    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5728    assert_instr(bsl)
5729)]
5730#[cfg_attr(
5731    not(target_arch = "arm"),
5732    stable(feature = "neon_intrinsics", since = "1.59.0")
5733)]
5734#[cfg_attr(
5735    target_arch = "arm",
5736    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5737)]
5738pub unsafe fn vbsl_p16(a: uint16x4_t, b: poly16x4_t, c: poly16x4_t) -> poly16x4_t {
5739    let not = int16x4_t::splat(-1);
5740    transmute(simd_or(
5741        simd_and(a, transmute(b)),
5742        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5743    ))
5744}
5745
5746/// Bitwise Select. (128-bit)
5747#[inline]
5748#[target_feature(enable = "neon")]
5749#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5750#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5751#[cfg_attr(
5752    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5753    assert_instr(bsl)
5754)]
5755#[cfg_attr(
5756    not(target_arch = "arm"),
5757    stable(feature = "neon_intrinsics", since = "1.59.0")
5758)]
5759#[cfg_attr(
5760    target_arch = "arm",
5761    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5762)]
5763pub unsafe fn vbslq_s8(a: uint8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
5764    let not = int8x16_t::splat(-1);
5765    transmute(simd_or(
5766        simd_and(a, transmute(b)),
5767        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5768    ))
5769}
5770
5771/// Bitwise Select. (128-bit)
5772#[inline]
5773#[target_feature(enable = "neon")]
5774#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5775#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5776#[cfg_attr(
5777    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5778    assert_instr(bsl)
5779)]
5780#[cfg_attr(
5781    not(target_arch = "arm"),
5782    stable(feature = "neon_intrinsics", since = "1.59.0")
5783)]
5784#[cfg_attr(
5785    target_arch = "arm",
5786    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5787)]
5788pub unsafe fn vbslq_s16(a: uint16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
5789    let not = int16x8_t::splat(-1);
5790    transmute(simd_or(
5791        simd_and(a, transmute(b)),
5792        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5793    ))
5794}
5795
5796/// Bitwise Select. (128-bit)
5797#[inline]
5798#[target_feature(enable = "neon")]
5799#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5800#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5801#[cfg_attr(
5802    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5803    assert_instr(bsl)
5804)]
5805#[cfg_attr(
5806    not(target_arch = "arm"),
5807    stable(feature = "neon_intrinsics", since = "1.59.0")
5808)]
5809#[cfg_attr(
5810    target_arch = "arm",
5811    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5812)]
5813pub unsafe fn vbslq_s32(a: uint32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
5814    let not = int32x4_t::splat(-1);
5815    transmute(simd_or(
5816        simd_and(a, transmute(b)),
5817        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5818    ))
5819}
5820
5821/// Bitwise Select. (128-bit)
5822#[inline]
5823#[target_feature(enable = "neon")]
5824#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5825#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5826#[cfg_attr(
5827    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5828    assert_instr(bsl)
5829)]
5830#[cfg_attr(
5831    not(target_arch = "arm"),
5832    stable(feature = "neon_intrinsics", since = "1.59.0")
5833)]
5834#[cfg_attr(
5835    target_arch = "arm",
5836    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5837)]
5838pub unsafe fn vbslq_s64(a: uint64x2_t, b: int64x2_t, c: int64x2_t) -> int64x2_t {
5839    let not = int64x2_t::splat(-1);
5840    transmute(simd_or(
5841        simd_and(a, transmute(b)),
5842        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5843    ))
5844}
5845
5846/// Bitwise Select. (128-bit)
5847#[inline]
5848#[target_feature(enable = "neon")]
5849#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5850#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5851#[cfg_attr(
5852    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5853    assert_instr(bsl)
5854)]
5855#[cfg_attr(
5856    not(target_arch = "arm"),
5857    stable(feature = "neon_intrinsics", since = "1.59.0")
5858)]
5859#[cfg_attr(
5860    target_arch = "arm",
5861    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5862)]
5863pub unsafe fn vbslq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
5864    let not = int8x16_t::splat(-1);
5865    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5866}
5867
5868/// Bitwise Select. (128-bit)
5869#[inline]
5870#[target_feature(enable = "neon")]
5871#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5872#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5873#[cfg_attr(
5874    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5875    assert_instr(bsl)
5876)]
5877#[cfg_attr(
5878    not(target_arch = "arm"),
5879    stable(feature = "neon_intrinsics", since = "1.59.0")
5880)]
5881#[cfg_attr(
5882    target_arch = "arm",
5883    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5884)]
5885pub unsafe fn vbslq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
5886    let not = int16x8_t::splat(-1);
5887    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5888}
5889
5890/// Bitwise Select. (128-bit)
5891#[inline]
5892#[target_feature(enable = "neon")]
5893#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5894#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5895#[cfg_attr(
5896    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5897    assert_instr(bsl)
5898)]
5899#[cfg_attr(
5900    not(target_arch = "arm"),
5901    stable(feature = "neon_intrinsics", since = "1.59.0")
5902)]
5903#[cfg_attr(
5904    target_arch = "arm",
5905    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5906)]
5907pub unsafe fn vbslq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
5908    let not = int32x4_t::splat(-1);
5909    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5910}
5911
5912/// Bitwise Select. (128-bit)
5913#[inline]
5914#[target_feature(enable = "neon")]
5915#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5916#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5917#[cfg_attr(
5918    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5919    assert_instr(bsl)
5920)]
5921#[cfg_attr(
5922    not(target_arch = "arm"),
5923    stable(feature = "neon_intrinsics", since = "1.59.0")
5924)]
5925#[cfg_attr(
5926    target_arch = "arm",
5927    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5928)]
5929pub unsafe fn vbslq_u64(a: uint64x2_t, b: uint64x2_t, c: uint64x2_t) -> uint64x2_t {
5930    let not = int64x2_t::splat(-1);
5931    simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c))
5932}
5933
5934/// Bitwise Select. (128-bit)
5935#[inline]
5936#[target_feature(enable = "neon")]
5937#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5938#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5939#[cfg_attr(
5940    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5941    assert_instr(bsl)
5942)]
5943#[cfg_attr(
5944    not(target_arch = "arm"),
5945    stable(feature = "neon_intrinsics", since = "1.59.0")
5946)]
5947#[cfg_attr(
5948    target_arch = "arm",
5949    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5950)]
5951pub unsafe fn vbslq_p8(a: uint8x16_t, b: poly8x16_t, c: poly8x16_t) -> poly8x16_t {
5952    let not = int8x16_t::splat(-1);
5953    transmute(simd_or(
5954        simd_and(a, transmute(b)),
5955        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5956    ))
5957}
5958
5959/// Bitwise Select. (128-bit)
5960#[inline]
5961#[target_feature(enable = "neon")]
5962#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5963#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5964#[cfg_attr(
5965    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5966    assert_instr(bsl)
5967)]
5968#[cfg_attr(
5969    not(target_arch = "arm"),
5970    stable(feature = "neon_intrinsics", since = "1.59.0")
5971)]
5972#[cfg_attr(
5973    target_arch = "arm",
5974    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5975)]
5976pub unsafe fn vbslq_p16(a: uint16x8_t, b: poly16x8_t, c: poly16x8_t) -> poly16x8_t {
5977    let not = int16x8_t::splat(-1);
5978    transmute(simd_or(
5979        simd_and(a, transmute(b)),
5980        simd_and(simd_xor(a, transmute(not)), transmute(c)),
5981    ))
5982}
5983
5984/// Bitwise Select. (128-bit)
5985#[inline]
5986#[target_feature(enable = "neon")]
5987#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5988#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5989#[cfg_attr(
5990    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5991    assert_instr(bsl)
5992)]
5993#[cfg_attr(
5994    not(target_arch = "arm"),
5995    stable(feature = "neon_intrinsics", since = "1.59.0")
5996)]
5997#[cfg_attr(
5998    target_arch = "arm",
5999    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6000)]
6001pub unsafe fn vbslq_f32(a: uint32x4_t, b: float32x4_t, c: float32x4_t) -> float32x4_t {
6002    let not = int32x4_t::splat(-1);
6003    transmute(simd_or(
6004        simd_and(a, transmute(b)),
6005        simd_and(simd_xor(a, transmute(not)), transmute(c)),
6006    ))
6007}
6008
6009/// Vector bitwise inclusive OR NOT
6010#[inline]
6011#[target_feature(enable = "neon")]
6012#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6013#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6014#[cfg_attr(
6015    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6016    assert_instr(orn)
6017)]
6018#[cfg_attr(
6019    not(target_arch = "arm"),
6020    stable(feature = "neon_intrinsics", since = "1.59.0")
6021)]
6022#[cfg_attr(
6023    target_arch = "arm",
6024    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6025)]
6026pub unsafe fn vorn_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
6027    let c = int8x8_t::splat(-1);
6028    simd_or(simd_xor(b, c), a)
6029}
6030
6031/// Vector bitwise inclusive OR NOT
6032#[inline]
6033#[target_feature(enable = "neon")]
6034#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6035#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6036#[cfg_attr(
6037    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6038    assert_instr(orn)
6039)]
6040#[cfg_attr(
6041    not(target_arch = "arm"),
6042    stable(feature = "neon_intrinsics", since = "1.59.0")
6043)]
6044#[cfg_attr(
6045    target_arch = "arm",
6046    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6047)]
6048pub unsafe fn vornq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
6049    let c = int8x16_t::splat(-1);
6050    simd_or(simd_xor(b, c), a)
6051}
6052
6053/// Vector bitwise inclusive OR NOT
6054#[inline]
6055#[target_feature(enable = "neon")]
6056#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6057#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6058#[cfg_attr(
6059    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6060    assert_instr(orn)
6061)]
6062#[cfg_attr(
6063    not(target_arch = "arm"),
6064    stable(feature = "neon_intrinsics", since = "1.59.0")
6065)]
6066#[cfg_attr(
6067    target_arch = "arm",
6068    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6069)]
6070pub unsafe fn vorn_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
6071    let c = int16x4_t::splat(-1);
6072    simd_or(simd_xor(b, c), a)
6073}
6074
6075/// Vector bitwise inclusive OR NOT
6076#[inline]
6077#[target_feature(enable = "neon")]
6078#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6079#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6080#[cfg_attr(
6081    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6082    assert_instr(orn)
6083)]
6084#[cfg_attr(
6085    not(target_arch = "arm"),
6086    stable(feature = "neon_intrinsics", since = "1.59.0")
6087)]
6088#[cfg_attr(
6089    target_arch = "arm",
6090    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6091)]
6092pub unsafe fn vornq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
6093    let c = int16x8_t::splat(-1);
6094    simd_or(simd_xor(b, c), a)
6095}
6096
6097/// Vector bitwise inclusive OR NOT
6098#[inline]
6099#[target_feature(enable = "neon")]
6100#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6101#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6102#[cfg_attr(
6103    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6104    assert_instr(orn)
6105)]
6106#[cfg_attr(
6107    not(target_arch = "arm"),
6108    stable(feature = "neon_intrinsics", since = "1.59.0")
6109)]
6110#[cfg_attr(
6111    target_arch = "arm",
6112    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6113)]
6114pub unsafe fn vorn_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
6115    let c = int32x2_t::splat(-1);
6116    simd_or(simd_xor(b, c), a)
6117}
6118
6119/// Vector bitwise inclusive OR NOT
6120#[inline]
6121#[target_feature(enable = "neon")]
6122#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6123#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6124#[cfg_attr(
6125    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6126    assert_instr(orn)
6127)]
6128#[cfg_attr(
6129    not(target_arch = "arm"),
6130    stable(feature = "neon_intrinsics", since = "1.59.0")
6131)]
6132#[cfg_attr(
6133    target_arch = "arm",
6134    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6135)]
6136pub unsafe fn vornq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
6137    let c = int32x4_t::splat(-1);
6138    simd_or(simd_xor(b, c), a)
6139}
6140
6141/// Vector bitwise inclusive OR NOT
6142#[inline]
6143#[target_feature(enable = "neon")]
6144#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6145#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6146#[cfg_attr(
6147    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6148    assert_instr(orn)
6149)]
6150#[cfg_attr(
6151    not(target_arch = "arm"),
6152    stable(feature = "neon_intrinsics", since = "1.59.0")
6153)]
6154#[cfg_attr(
6155    target_arch = "arm",
6156    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6157)]
6158pub unsafe fn vorn_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
6159    let c = int64x1_t::splat(-1);
6160    simd_or(simd_xor(b, c), a)
6161}
6162
6163/// Vector bitwise inclusive OR NOT
6164#[inline]
6165#[target_feature(enable = "neon")]
6166#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6167#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6168#[cfg_attr(
6169    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6170    assert_instr(orn)
6171)]
6172#[cfg_attr(
6173    not(target_arch = "arm"),
6174    stable(feature = "neon_intrinsics", since = "1.59.0")
6175)]
6176#[cfg_attr(
6177    target_arch = "arm",
6178    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6179)]
6180pub unsafe fn vornq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
6181    let c = int64x2_t::splat(-1);
6182    simd_or(simd_xor(b, c), a)
6183}
6184
6185/// Vector bitwise inclusive OR NOT
6186#[inline]
6187#[target_feature(enable = "neon")]
6188#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6189#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6190#[cfg_attr(
6191    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6192    assert_instr(orn)
6193)]
6194#[cfg_attr(
6195    not(target_arch = "arm"),
6196    stable(feature = "neon_intrinsics", since = "1.59.0")
6197)]
6198#[cfg_attr(
6199    target_arch = "arm",
6200    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6201)]
6202pub unsafe fn vorn_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
6203    let c = int8x8_t::splat(-1);
6204    simd_or(simd_xor(b, transmute(c)), a)
6205}
6206
6207/// Vector bitwise inclusive OR NOT
6208#[inline]
6209#[target_feature(enable = "neon")]
6210#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6211#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6212#[cfg_attr(
6213    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6214    assert_instr(orn)
6215)]
6216#[cfg_attr(
6217    not(target_arch = "arm"),
6218    stable(feature = "neon_intrinsics", since = "1.59.0")
6219)]
6220#[cfg_attr(
6221    target_arch = "arm",
6222    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6223)]
6224pub unsafe fn vornq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
6225    let c = int8x16_t::splat(-1);
6226    simd_or(simd_xor(b, transmute(c)), a)
6227}
6228
6229/// Vector bitwise inclusive OR NOT
6230#[inline]
6231#[target_feature(enable = "neon")]
6232#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6233#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6234#[cfg_attr(
6235    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6236    assert_instr(orn)
6237)]
6238#[cfg_attr(
6239    not(target_arch = "arm"),
6240    stable(feature = "neon_intrinsics", since = "1.59.0")
6241)]
6242#[cfg_attr(
6243    target_arch = "arm",
6244    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6245)]
6246pub unsafe fn vorn_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
6247    let c = int16x4_t::splat(-1);
6248    simd_or(simd_xor(b, transmute(c)), a)
6249}
6250
6251/// Vector bitwise inclusive OR NOT
6252#[inline]
6253#[target_feature(enable = "neon")]
6254#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6255#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6256#[cfg_attr(
6257    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6258    assert_instr(orn)
6259)]
6260#[cfg_attr(
6261    not(target_arch = "arm"),
6262    stable(feature = "neon_intrinsics", since = "1.59.0")
6263)]
6264#[cfg_attr(
6265    target_arch = "arm",
6266    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6267)]
6268pub unsafe fn vornq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
6269    let c = int16x8_t::splat(-1);
6270    simd_or(simd_xor(b, transmute(c)), a)
6271}
6272
6273/// Vector bitwise inclusive OR NOT
6274#[inline]
6275#[target_feature(enable = "neon")]
6276#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6277#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6278#[cfg_attr(
6279    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6280    assert_instr(orn)
6281)]
6282#[cfg_attr(
6283    not(target_arch = "arm"),
6284    stable(feature = "neon_intrinsics", since = "1.59.0")
6285)]
6286#[cfg_attr(
6287    target_arch = "arm",
6288    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6289)]
6290pub unsafe fn vorn_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
6291    let c = int32x2_t::splat(-1);
6292    simd_or(simd_xor(b, transmute(c)), a)
6293}
6294
6295/// Vector bitwise inclusive OR NOT
6296#[inline]
6297#[target_feature(enable = "neon")]
6298#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6299#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6300#[cfg_attr(
6301    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6302    assert_instr(orn)
6303)]
6304#[cfg_attr(
6305    not(target_arch = "arm"),
6306    stable(feature = "neon_intrinsics", since = "1.59.0")
6307)]
6308#[cfg_attr(
6309    target_arch = "arm",
6310    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6311)]
6312pub unsafe fn vornq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
6313    let c = int32x4_t::splat(-1);
6314    simd_or(simd_xor(b, transmute(c)), a)
6315}
6316
6317/// Vector bitwise inclusive OR NOT
6318#[inline]
6319#[target_feature(enable = "neon")]
6320#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6321#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6322#[cfg_attr(
6323    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6324    assert_instr(orn)
6325)]
6326#[cfg_attr(
6327    not(target_arch = "arm"),
6328    stable(feature = "neon_intrinsics", since = "1.59.0")
6329)]
6330#[cfg_attr(
6331    target_arch = "arm",
6332    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6333)]
6334pub unsafe fn vorn_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
6335    let c = int64x1_t::splat(-1);
6336    simd_or(simd_xor(b, transmute(c)), a)
6337}
6338
6339/// Vector bitwise inclusive OR NOT
6340#[inline]
6341#[target_feature(enable = "neon")]
6342#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6343#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
6344#[cfg_attr(
6345    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6346    assert_instr(orn)
6347)]
6348#[cfg_attr(
6349    not(target_arch = "arm"),
6350    stable(feature = "neon_intrinsics", since = "1.59.0")
6351)]
6352#[cfg_attr(
6353    target_arch = "arm",
6354    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6355)]
6356pub unsafe fn vornq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
6357    let c = int64x2_t::splat(-1);
6358    simd_or(simd_xor(b, transmute(c)), a)
6359}
6360
6361/// Folding minimum of adjacent pairs
6362#[inline]
6363#[target_feature(enable = "neon")]
6364#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6365#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6366#[cfg_attr(
6367    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6368    assert_instr(sminp)
6369)]
6370#[cfg_attr(
6371    not(target_arch = "arm"),
6372    stable(feature = "neon_intrinsics", since = "1.59.0")
6373)]
6374#[cfg_attr(
6375    target_arch = "arm",
6376    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6377)]
6378pub unsafe fn vpmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
6379    vpmins_v8i8(a, b)
6380}
6381
6382/// Folding minimum of adjacent pairs
6383#[inline]
6384#[target_feature(enable = "neon")]
6385#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6386#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6387#[cfg_attr(
6388    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6389    assert_instr(sminp)
6390)]
6391#[cfg_attr(
6392    not(target_arch = "arm"),
6393    stable(feature = "neon_intrinsics", since = "1.59.0")
6394)]
6395#[cfg_attr(
6396    target_arch = "arm",
6397    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6398)]
6399pub unsafe fn vpmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
6400    vpmins_v4i16(a, b)
6401}
6402
6403/// Folding minimum of adjacent pairs
6404#[inline]
6405#[target_feature(enable = "neon")]
6406#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6407#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6408#[cfg_attr(
6409    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6410    assert_instr(sminp)
6411)]
6412#[cfg_attr(
6413    not(target_arch = "arm"),
6414    stable(feature = "neon_intrinsics", since = "1.59.0")
6415)]
6416#[cfg_attr(
6417    target_arch = "arm",
6418    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6419)]
6420pub unsafe fn vpmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
6421    vpmins_v2i32(a, b)
6422}
6423
6424/// Folding minimum of adjacent pairs
6425#[inline]
6426#[target_feature(enable = "neon")]
6427#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6428#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6429#[cfg_attr(
6430    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6431    assert_instr(uminp)
6432)]
6433#[cfg_attr(
6434    not(target_arch = "arm"),
6435    stable(feature = "neon_intrinsics", since = "1.59.0")
6436)]
6437#[cfg_attr(
6438    target_arch = "arm",
6439    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6440)]
6441pub unsafe fn vpmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
6442    vpminu_v8i8(a, b)
6443}
6444
6445/// Folding minimum of adjacent pairs
6446#[inline]
6447#[target_feature(enable = "neon")]
6448#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6449#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6450#[cfg_attr(
6451    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6452    assert_instr(uminp)
6453)]
6454#[cfg_attr(
6455    not(target_arch = "arm"),
6456    stable(feature = "neon_intrinsics", since = "1.59.0")
6457)]
6458#[cfg_attr(
6459    target_arch = "arm",
6460    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6461)]
6462pub unsafe fn vpmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
6463    vpminu_v4i16(a, b)
6464}
6465
6466/// Folding minimum of adjacent pairs
6467#[inline]
6468#[target_feature(enable = "neon")]
6469#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6470#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6471#[cfg_attr(
6472    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6473    assert_instr(uminp)
6474)]
6475#[cfg_attr(
6476    not(target_arch = "arm"),
6477    stable(feature = "neon_intrinsics", since = "1.59.0")
6478)]
6479#[cfg_attr(
6480    target_arch = "arm",
6481    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6482)]
6483pub unsafe fn vpmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
6484    vpminu_v2i32(a, b)
6485}
6486
6487/// Folding minimum of adjacent pairs
6488#[inline]
6489#[target_feature(enable = "neon")]
6490#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6491#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmin))]
6492#[cfg_attr(
6493    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6494    assert_instr(fminp)
6495)]
6496#[cfg_attr(
6497    not(target_arch = "arm"),
6498    stable(feature = "neon_intrinsics", since = "1.59.0")
6499)]
6500#[cfg_attr(
6501    target_arch = "arm",
6502    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6503)]
6504pub unsafe fn vpmin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
6505    vpminf_v2f32(a, b)
6506}
6507
6508/// Folding maximum of adjacent pairs
6509#[inline]
6510#[target_feature(enable = "neon")]
6511#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6512#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6513#[cfg_attr(
6514    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6515    assert_instr(smaxp)
6516)]
6517#[cfg_attr(
6518    not(target_arch = "arm"),
6519    stable(feature = "neon_intrinsics", since = "1.59.0")
6520)]
6521#[cfg_attr(
6522    target_arch = "arm",
6523    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6524)]
6525pub unsafe fn vpmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
6526    vpmaxs_v8i8(a, b)
6527}
6528
6529/// Folding maximum of adjacent pairs
6530#[inline]
6531#[target_feature(enable = "neon")]
6532#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6533#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6534#[cfg_attr(
6535    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6536    assert_instr(smaxp)
6537)]
6538#[cfg_attr(
6539    not(target_arch = "arm"),
6540    stable(feature = "neon_intrinsics", since = "1.59.0")
6541)]
6542#[cfg_attr(
6543    target_arch = "arm",
6544    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6545)]
6546pub unsafe fn vpmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
6547    vpmaxs_v4i16(a, b)
6548}
6549
6550/// Folding maximum of adjacent pairs
6551#[inline]
6552#[target_feature(enable = "neon")]
6553#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6554#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6555#[cfg_attr(
6556    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6557    assert_instr(smaxp)
6558)]
6559#[cfg_attr(
6560    not(target_arch = "arm"),
6561    stable(feature = "neon_intrinsics", since = "1.59.0")
6562)]
6563#[cfg_attr(
6564    target_arch = "arm",
6565    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6566)]
6567pub unsafe fn vpmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
6568    vpmaxs_v2i32(a, b)
6569}
6570
6571/// Folding maximum of adjacent pairs
6572#[inline]
6573#[target_feature(enable = "neon")]
6574#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6575#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6576#[cfg_attr(
6577    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6578    assert_instr(umaxp)
6579)]
6580#[cfg_attr(
6581    not(target_arch = "arm"),
6582    stable(feature = "neon_intrinsics", since = "1.59.0")
6583)]
6584#[cfg_attr(
6585    target_arch = "arm",
6586    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6587)]
6588pub unsafe fn vpmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
6589    vpmaxu_v8i8(a, b)
6590}
6591
6592/// Folding maximum of adjacent pairs
6593#[inline]
6594#[target_feature(enable = "neon")]
6595#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6596#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6597#[cfg_attr(
6598    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6599    assert_instr(umaxp)
6600)]
6601#[cfg_attr(
6602    not(target_arch = "arm"),
6603    stable(feature = "neon_intrinsics", since = "1.59.0")
6604)]
6605#[cfg_attr(
6606    target_arch = "arm",
6607    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6608)]
6609pub unsafe fn vpmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
6610    vpmaxu_v4i16(a, b)
6611}
6612
6613/// Folding maximum of adjacent pairs
6614#[inline]
6615#[target_feature(enable = "neon")]
6616#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6617#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6618#[cfg_attr(
6619    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6620    assert_instr(umaxp)
6621)]
6622#[cfg_attr(
6623    not(target_arch = "arm"),
6624    stable(feature = "neon_intrinsics", since = "1.59.0")
6625)]
6626#[cfg_attr(
6627    target_arch = "arm",
6628    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6629)]
6630pub unsafe fn vpmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
6631    vpmaxu_v2i32(a, b)
6632}
6633
6634/// Folding maximum of adjacent pairs
6635#[inline]
6636#[target_feature(enable = "neon")]
6637#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6638#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpmax))]
6639#[cfg_attr(
6640    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6641    assert_instr(fmaxp)
6642)]
6643#[cfg_attr(
6644    not(target_arch = "arm"),
6645    stable(feature = "neon_intrinsics", since = "1.59.0")
6646)]
6647#[cfg_attr(
6648    target_arch = "arm",
6649    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6650)]
6651pub unsafe fn vpmax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
6652    vpmaxf_v2f32(a, b)
6653}
6654
6655/// Move vector element to general-purpose register
6656#[inline]
6657#[target_feature(enable = "neon")]
6658#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6659#[rustc_legacy_const_generics(1)]
6660#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
6661#[cfg_attr(
6662    not(target_arch = "arm"),
6663    stable(feature = "neon_intrinsics", since = "1.59.0")
6664)]
6665#[cfg_attr(
6666    target_arch = "arm",
6667    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6668)]
6669pub unsafe fn vgetq_lane_u64<const IMM5: i32>(v: uint64x2_t) -> u64 {
6670    static_assert_uimm_bits!(IMM5, 1);
6671    simd_extract!(v, IMM5 as u32)
6672}
6673
6674/// Move vector element to general-purpose register
6675#[inline]
6676#[target_feature(enable = "neon")]
6677#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6678#[rustc_legacy_const_generics(1)]
6679#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
6680#[cfg_attr(
6681    not(target_arch = "arm"),
6682    stable(feature = "neon_intrinsics", since = "1.59.0")
6683)]
6684#[cfg_attr(
6685    target_arch = "arm",
6686    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6687)]
6688pub unsafe fn vget_lane_u64<const IMM5: i32>(v: uint64x1_t) -> u64 {
6689    static_assert!(IMM5 == 0);
6690    simd_extract!(v, 0)
6691}
6692
6693/// Move vector element to general-purpose register
6694#[inline]
6695#[target_feature(enable = "neon")]
6696#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6697#[rustc_legacy_const_generics(1)]
6698#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6699#[cfg_attr(
6700    not(target_arch = "arm"),
6701    stable(feature = "neon_intrinsics", since = "1.59.0")
6702)]
6703#[cfg_attr(
6704    target_arch = "arm",
6705    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6706)]
6707pub unsafe fn vget_lane_u16<const IMM5: i32>(v: uint16x4_t) -> u16 {
6708    static_assert_uimm_bits!(IMM5, 2);
6709    simd_extract!(v, IMM5 as u32)
6710}
6711
6712/// Move vector element to general-purpose register
6713#[inline]
6714#[target_feature(enable = "neon")]
6715#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6716#[rustc_legacy_const_generics(1)]
6717#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6718#[cfg_attr(
6719    not(target_arch = "arm"),
6720    stable(feature = "neon_intrinsics", since = "1.59.0")
6721)]
6722#[cfg_attr(
6723    target_arch = "arm",
6724    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6725)]
6726pub unsafe fn vget_lane_s16<const IMM5: i32>(v: int16x4_t) -> i16 {
6727    static_assert_uimm_bits!(IMM5, 2);
6728    simd_extract!(v, IMM5 as u32)
6729}
6730
6731/// Move vector element to general-purpose register
6732#[inline]
6733#[target_feature(enable = "neon")]
6734#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6735#[rustc_legacy_const_generics(1)]
6736#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6737#[cfg_attr(
6738    not(target_arch = "arm"),
6739    stable(feature = "neon_intrinsics", since = "1.59.0")
6740)]
6741#[cfg_attr(
6742    target_arch = "arm",
6743    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6744)]
6745pub unsafe fn vget_lane_p16<const IMM5: i32>(v: poly16x4_t) -> p16 {
6746    static_assert_uimm_bits!(IMM5, 2);
6747    simd_extract!(v, IMM5 as u32)
6748}
6749
6750/// Move vector element to general-purpose register
6751#[inline]
6752#[target_feature(enable = "neon")]
6753#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6754#[rustc_legacy_const_generics(1)]
6755#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
6756#[cfg_attr(
6757    not(target_arch = "arm"),
6758    stable(feature = "neon_intrinsics", since = "1.59.0")
6759)]
6760#[cfg_attr(
6761    target_arch = "arm",
6762    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6763)]
6764pub unsafe fn vget_lane_u32<const IMM5: i32>(v: uint32x2_t) -> u32 {
6765    static_assert_uimm_bits!(IMM5, 1);
6766    simd_extract!(v, IMM5 as u32)
6767}
6768
6769/// Move vector element to general-purpose register
6770#[inline]
6771#[target_feature(enable = "neon")]
6772#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6773#[rustc_legacy_const_generics(1)]
6774#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
6775#[cfg_attr(
6776    not(target_arch = "arm"),
6777    stable(feature = "neon_intrinsics", since = "1.59.0")
6778)]
6779#[cfg_attr(
6780    target_arch = "arm",
6781    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6782)]
6783pub unsafe fn vget_lane_s32<const IMM5: i32>(v: int32x2_t) -> i32 {
6784    static_assert_uimm_bits!(IMM5, 1);
6785    simd_extract!(v, IMM5 as u32)
6786}
6787
6788/// Duplicate vector element to vector or scalar
6789#[inline]
6790#[target_feature(enable = "neon")]
6791#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6792#[rustc_legacy_const_generics(1)]
6793#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
6794#[cfg_attr(
6795    not(target_arch = "arm"),
6796    stable(feature = "neon_intrinsics", since = "1.59.0")
6797)]
6798#[cfg_attr(
6799    target_arch = "arm",
6800    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6801)]
6802pub unsafe fn vget_lane_f32<const IMM5: i32>(v: float32x2_t) -> f32 {
6803    static_assert_uimm_bits!(IMM5, 1);
6804    simd_extract!(v, IMM5 as u32)
6805}
6806
6807/// Duplicate vector element to vector or scalar
6808#[inline]
6809#[target_feature(enable = "neon")]
6810#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6811#[rustc_legacy_const_generics(1)]
6812#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
6813#[cfg_attr(
6814    not(target_arch = "arm"),
6815    stable(feature = "neon_intrinsics", since = "1.59.0")
6816)]
6817#[cfg_attr(
6818    target_arch = "arm",
6819    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6820)]
6821pub unsafe fn vgetq_lane_f32<const IMM5: i32>(v: float32x4_t) -> f32 {
6822    static_assert_uimm_bits!(IMM5, 2);
6823    simd_extract!(v, IMM5 as u32)
6824}
6825
6826/// Move vector element to general-purpose register
6827#[inline]
6828#[target_feature(enable = "neon")]
6829#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6830#[rustc_legacy_const_generics(1)]
6831#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
6832#[cfg_attr(
6833    not(target_arch = "arm"),
6834    stable(feature = "neon_intrinsics", since = "1.59.0")
6835)]
6836#[cfg_attr(
6837    target_arch = "arm",
6838    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6839)]
6840pub unsafe fn vget_lane_p64<const IMM5: i32>(v: poly64x1_t) -> p64 {
6841    static_assert!(IMM5 == 0);
6842    simd_extract!(v, IMM5 as u32)
6843}
6844
6845/// Move vector element to general-purpose register
6846#[inline]
6847#[target_feature(enable = "neon")]
6848#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6849#[rustc_legacy_const_generics(1)]
6850#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
6851#[cfg_attr(
6852    not(target_arch = "arm"),
6853    stable(feature = "neon_intrinsics", since = "1.59.0")
6854)]
6855#[cfg_attr(
6856    target_arch = "arm",
6857    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6858)]
6859pub unsafe fn vgetq_lane_p64<const IMM5: i32>(v: poly64x2_t) -> p64 {
6860    static_assert_uimm_bits!(IMM5, 1);
6861    simd_extract!(v, IMM5 as u32)
6862}
6863
6864/// Move vector element to general-purpose register
6865#[inline]
6866#[target_feature(enable = "neon")]
6867#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6868#[rustc_legacy_const_generics(1)]
6869#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
6870#[cfg_attr(
6871    not(target_arch = "arm"),
6872    stable(feature = "neon_intrinsics", since = "1.59.0")
6873)]
6874#[cfg_attr(
6875    target_arch = "arm",
6876    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6877)]
6878pub unsafe fn vget_lane_s64<const IMM5: i32>(v: int64x1_t) -> i64 {
6879    static_assert!(IMM5 == 0);
6880    simd_extract!(v, IMM5 as u32)
6881}
6882
6883/// Move vector element to general-purpose register
6884#[inline]
6885#[target_feature(enable = "neon")]
6886#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6887#[rustc_legacy_const_generics(1)]
6888#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
6889#[cfg_attr(
6890    not(target_arch = "arm"),
6891    stable(feature = "neon_intrinsics", since = "1.59.0")
6892)]
6893#[cfg_attr(
6894    target_arch = "arm",
6895    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6896)]
6897pub unsafe fn vgetq_lane_s64<const IMM5: i32>(v: int64x2_t) -> i64 {
6898    static_assert_uimm_bits!(IMM5, 1);
6899    simd_extract!(v, IMM5 as u32)
6900}
6901
6902/// Move vector element to general-purpose register
6903#[inline]
6904#[target_feature(enable = "neon")]
6905#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6906#[rustc_legacy_const_generics(1)]
6907#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6908#[cfg_attr(
6909    not(target_arch = "arm"),
6910    stable(feature = "neon_intrinsics", since = "1.59.0")
6911)]
6912#[cfg_attr(
6913    target_arch = "arm",
6914    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6915)]
6916pub unsafe fn vgetq_lane_u16<const IMM5: i32>(v: uint16x8_t) -> u16 {
6917    static_assert_uimm_bits!(IMM5, 3);
6918    simd_extract!(v, IMM5 as u32)
6919}
6920
6921/// Move vector element to general-purpose register
6922#[inline]
6923#[target_feature(enable = "neon")]
6924#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6925#[rustc_legacy_const_generics(1)]
6926#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6927#[cfg_attr(
6928    not(target_arch = "arm"),
6929    stable(feature = "neon_intrinsics", since = "1.59.0")
6930)]
6931#[cfg_attr(
6932    target_arch = "arm",
6933    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6934)]
6935pub unsafe fn vgetq_lane_u32<const IMM5: i32>(v: uint32x4_t) -> u32 {
6936    static_assert_uimm_bits!(IMM5, 2);
6937    simd_extract!(v, IMM5 as u32)
6938}
6939
6940/// Move vector element to general-purpose register
6941#[inline]
6942#[target_feature(enable = "neon")]
6943#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6944#[rustc_legacy_const_generics(1)]
6945#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6946#[cfg_attr(
6947    not(target_arch = "arm"),
6948    stable(feature = "neon_intrinsics", since = "1.59.0")
6949)]
6950#[cfg_attr(
6951    target_arch = "arm",
6952    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6953)]
6954pub unsafe fn vgetq_lane_s16<const IMM5: i32>(v: int16x8_t) -> i16 {
6955    static_assert_uimm_bits!(IMM5, 3);
6956    simd_extract!(v, IMM5 as u32)
6957}
6958
6959/// Move vector element to general-purpose register
6960#[inline]
6961#[target_feature(enable = "neon")]
6962#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6963#[rustc_legacy_const_generics(1)]
6964#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6965#[cfg_attr(
6966    not(target_arch = "arm"),
6967    stable(feature = "neon_intrinsics", since = "1.59.0")
6968)]
6969#[cfg_attr(
6970    target_arch = "arm",
6971    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6972)]
6973pub unsafe fn vgetq_lane_p16<const IMM5: i32>(v: poly16x8_t) -> p16 {
6974    static_assert_uimm_bits!(IMM5, 3);
6975    simd_extract!(v, IMM5 as u32)
6976}
6977
6978/// Move vector element to general-purpose register
6979#[inline]
6980#[target_feature(enable = "neon")]
6981#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6982#[rustc_legacy_const_generics(1)]
6983#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6984#[cfg_attr(
6985    not(target_arch = "arm"),
6986    stable(feature = "neon_intrinsics", since = "1.59.0")
6987)]
6988#[cfg_attr(
6989    target_arch = "arm",
6990    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6991)]
6992pub unsafe fn vgetq_lane_s32<const IMM5: i32>(v: int32x4_t) -> i32 {
6993    static_assert_uimm_bits!(IMM5, 2);
6994    simd_extract!(v, IMM5 as u32)
6995}
6996
6997/// Move vector element to general-purpose register
6998#[inline]
6999#[target_feature(enable = "neon")]
7000#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7001#[rustc_legacy_const_generics(1)]
7002#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7003#[cfg_attr(
7004    not(target_arch = "arm"),
7005    stable(feature = "neon_intrinsics", since = "1.59.0")
7006)]
7007#[cfg_attr(
7008    target_arch = "arm",
7009    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7010)]
7011pub unsafe fn vget_lane_u8<const IMM5: i32>(v: uint8x8_t) -> u8 {
7012    static_assert_uimm_bits!(IMM5, 3);
7013    simd_extract!(v, IMM5 as u32)
7014}
7015
7016/// Move vector element to general-purpose register
7017#[inline]
7018#[target_feature(enable = "neon")]
7019#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7020#[rustc_legacy_const_generics(1)]
7021#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7022#[cfg_attr(
7023    not(target_arch = "arm"),
7024    stable(feature = "neon_intrinsics", since = "1.59.0")
7025)]
7026#[cfg_attr(
7027    target_arch = "arm",
7028    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7029)]
7030pub unsafe fn vget_lane_s8<const IMM5: i32>(v: int8x8_t) -> i8 {
7031    static_assert_uimm_bits!(IMM5, 3);
7032    simd_extract!(v, IMM5 as u32)
7033}
7034
7035/// Move vector element to general-purpose register
7036#[inline]
7037#[target_feature(enable = "neon")]
7038#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7039#[rustc_legacy_const_generics(1)]
7040#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7041#[cfg_attr(
7042    not(target_arch = "arm"),
7043    stable(feature = "neon_intrinsics", since = "1.59.0")
7044)]
7045#[cfg_attr(
7046    target_arch = "arm",
7047    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7048)]
7049pub unsafe fn vget_lane_p8<const IMM5: i32>(v: poly8x8_t) -> p8 {
7050    static_assert_uimm_bits!(IMM5, 3);
7051    simd_extract!(v, IMM5 as u32)
7052}
7053
7054/// Move vector element to general-purpose register
7055#[inline]
7056#[target_feature(enable = "neon")]
7057#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7058#[rustc_legacy_const_generics(1)]
7059#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7060#[cfg_attr(
7061    not(target_arch = "arm"),
7062    stable(feature = "neon_intrinsics", since = "1.59.0")
7063)]
7064#[cfg_attr(
7065    target_arch = "arm",
7066    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7067)]
7068pub unsafe fn vgetq_lane_u8<const IMM5: i32>(v: uint8x16_t) -> u8 {
7069    static_assert_uimm_bits!(IMM5, 4);
7070    simd_extract!(v, IMM5 as u32)
7071}
7072
7073/// Move vector element to general-purpose register
7074#[inline]
7075#[target_feature(enable = "neon")]
7076#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7077#[rustc_legacy_const_generics(1)]
7078#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7079#[cfg_attr(
7080    not(target_arch = "arm"),
7081    stable(feature = "neon_intrinsics", since = "1.59.0")
7082)]
7083#[cfg_attr(
7084    target_arch = "arm",
7085    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7086)]
7087pub unsafe fn vgetq_lane_s8<const IMM5: i32>(v: int8x16_t) -> i8 {
7088    static_assert_uimm_bits!(IMM5, 4);
7089    simd_extract!(v, IMM5 as u32)
7090}
7091
7092/// Move vector element to general-purpose register
7093#[inline]
7094#[target_feature(enable = "neon")]
7095#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7096#[rustc_legacy_const_generics(1)]
7097#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
7098#[cfg_attr(
7099    not(target_arch = "arm"),
7100    stable(feature = "neon_intrinsics", since = "1.59.0")
7101)]
7102#[cfg_attr(
7103    target_arch = "arm",
7104    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7105)]
7106pub unsafe fn vgetq_lane_p8<const IMM5: i32>(v: poly8x16_t) -> p8 {
7107    static_assert_uimm_bits!(IMM5, 4);
7108    simd_extract!(v, IMM5 as u32)
7109}
7110
7111/// Duplicate vector element to vector or scalar
7112#[inline]
7113#[target_feature(enable = "neon")]
7114#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7115#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7116#[cfg_attr(
7117    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7118    assert_instr(ext)
7119)]
7120#[cfg_attr(
7121    not(target_arch = "arm"),
7122    stable(feature = "neon_intrinsics", since = "1.59.0")
7123)]
7124#[cfg_attr(
7125    target_arch = "arm",
7126    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7127)]
7128pub unsafe fn vget_high_s8(a: int8x16_t) -> int8x8_t {
7129    simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15])
7130}
7131
7132/// Duplicate vector element to vector or scalar
7133#[inline]
7134#[target_feature(enable = "neon")]
7135#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7136#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7137#[cfg_attr(
7138    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7139    assert_instr(ext)
7140)]
7141#[cfg_attr(
7142    not(target_arch = "arm"),
7143    stable(feature = "neon_intrinsics", since = "1.59.0")
7144)]
7145#[cfg_attr(
7146    target_arch = "arm",
7147    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7148)]
7149pub unsafe fn vget_high_s16(a: int16x8_t) -> int16x4_t {
7150    simd_shuffle!(a, a, [4, 5, 6, 7])
7151}
7152
7153/// Duplicate vector element to vector or scalar
7154#[inline]
7155#[target_feature(enable = "neon")]
7156#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7157#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7158#[cfg_attr(
7159    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7160    assert_instr(ext)
7161)]
7162#[cfg_attr(
7163    not(target_arch = "arm"),
7164    stable(feature = "neon_intrinsics", since = "1.59.0")
7165)]
7166#[cfg_attr(
7167    target_arch = "arm",
7168    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7169)]
7170pub unsafe fn vget_high_s32(a: int32x4_t) -> int32x2_t {
7171    simd_shuffle!(a, a, [2, 3])
7172}
7173
7174/// Duplicate vector element to vector or scalar
7175#[inline]
7176#[target_feature(enable = "neon")]
7177#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7178#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7179#[cfg_attr(
7180    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7181    assert_instr(ext)
7182)]
7183#[cfg_attr(
7184    not(target_arch = "arm"),
7185    stable(feature = "neon_intrinsics", since = "1.59.0")
7186)]
7187#[cfg_attr(
7188    target_arch = "arm",
7189    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7190)]
7191pub unsafe fn vget_high_s64(a: int64x2_t) -> int64x1_t {
7192    int64x1_t([simd_extract!(a, 1)])
7193}
7194
7195/// Duplicate vector element to vector or scalar
7196#[inline]
7197#[target_feature(enable = "neon")]
7198#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7199#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7200#[cfg_attr(
7201    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7202    assert_instr(ext)
7203)]
7204#[cfg_attr(
7205    not(target_arch = "arm"),
7206    stable(feature = "neon_intrinsics", since = "1.59.0")
7207)]
7208#[cfg_attr(
7209    target_arch = "arm",
7210    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7211)]
7212pub unsafe fn vget_high_u8(a: uint8x16_t) -> uint8x8_t {
7213    simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15])
7214}
7215
7216/// Duplicate vector element to vector or scalar
7217#[inline]
7218#[target_feature(enable = "neon")]
7219#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7220#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7221#[cfg_attr(
7222    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7223    assert_instr(ext)
7224)]
7225#[cfg_attr(
7226    not(target_arch = "arm"),
7227    stable(feature = "neon_intrinsics", since = "1.59.0")
7228)]
7229#[cfg_attr(
7230    target_arch = "arm",
7231    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7232)]
7233pub unsafe fn vget_high_u16(a: uint16x8_t) -> uint16x4_t {
7234    simd_shuffle!(a, a, [4, 5, 6, 7])
7235}
7236
7237/// Duplicate vector element to vector or scalar
7238#[inline]
7239#[target_feature(enable = "neon")]
7240#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7241#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7242#[cfg_attr(
7243    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7244    assert_instr(ext)
7245)]
7246#[cfg_attr(
7247    not(target_arch = "arm"),
7248    stable(feature = "neon_intrinsics", since = "1.59.0")
7249)]
7250#[cfg_attr(
7251    target_arch = "arm",
7252    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7253)]
7254pub unsafe fn vget_high_u32(a: uint32x4_t) -> uint32x2_t {
7255    simd_shuffle!(a, a, [2, 3])
7256}
7257
7258/// Duplicate vector element to vector or scalar
7259#[inline]
7260#[target_feature(enable = "neon")]
7261#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7262#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7263#[cfg_attr(
7264    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7265    assert_instr(ext)
7266)]
7267#[cfg_attr(
7268    not(target_arch = "arm"),
7269    stable(feature = "neon_intrinsics", since = "1.59.0")
7270)]
7271#[cfg_attr(
7272    target_arch = "arm",
7273    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7274)]
7275pub unsafe fn vget_high_u64(a: uint64x2_t) -> uint64x1_t {
7276    uint64x1_t([simd_extract!(a, 1)])
7277}
7278
7279/// Duplicate vector element to vector or scalar
7280#[inline]
7281#[target_feature(enable = "neon")]
7282#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7283#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7284#[cfg_attr(
7285    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7286    assert_instr(ext)
7287)]
7288#[cfg_attr(
7289    not(target_arch = "arm"),
7290    stable(feature = "neon_intrinsics", since = "1.59.0")
7291)]
7292#[cfg_attr(
7293    target_arch = "arm",
7294    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7295)]
7296pub unsafe fn vget_high_p8(a: poly8x16_t) -> poly8x8_t {
7297    simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15])
7298}
7299
7300/// Duplicate vector element to vector or scalar
7301#[inline]
7302#[target_feature(enable = "neon")]
7303#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7304#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7305#[cfg_attr(
7306    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7307    assert_instr(ext)
7308)]
7309#[cfg_attr(
7310    not(target_arch = "arm"),
7311    stable(feature = "neon_intrinsics", since = "1.59.0")
7312)]
7313#[cfg_attr(
7314    target_arch = "arm",
7315    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7316)]
7317pub unsafe fn vget_high_p16(a: poly16x8_t) -> poly16x4_t {
7318    simd_shuffle!(a, a, [4, 5, 6, 7])
7319}
7320
7321/// Duplicate vector element to vector or scalar
7322#[inline]
7323#[target_feature(enable = "neon")]
7324#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7325#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7326#[cfg_attr(
7327    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7328    assert_instr(ext)
7329)]
7330#[cfg_attr(
7331    not(target_arch = "arm"),
7332    stable(feature = "neon_intrinsics", since = "1.59.0")
7333)]
7334#[cfg_attr(
7335    target_arch = "arm",
7336    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7337)]
7338pub unsafe fn vget_high_f32(a: float32x4_t) -> float32x2_t {
7339    simd_shuffle!(a, a, [2, 3])
7340}
7341
7342/// Duplicate vector element to vector or scalar
7343#[inline]
7344#[target_feature(enable = "neon")]
7345#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7346#[cfg_attr(test, assert_instr(nop))]
7347#[cfg_attr(
7348    not(target_arch = "arm"),
7349    stable(feature = "vget_low_s8", since = "1.60.0")
7350)]
7351#[cfg_attr(
7352    target_arch = "arm",
7353    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7354)]
7355pub unsafe fn vget_low_s8(a: int8x16_t) -> int8x8_t {
7356    simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
7357}
7358
7359/// Duplicate vector element to vector or scalar
7360#[inline]
7361#[target_feature(enable = "neon")]
7362#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7363#[cfg_attr(test, assert_instr(nop))]
7364#[cfg_attr(
7365    not(target_arch = "arm"),
7366    stable(feature = "neon_intrinsics", since = "1.59.0")
7367)]
7368#[cfg_attr(
7369    target_arch = "arm",
7370    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7371)]
7372pub unsafe fn vget_low_s16(a: int16x8_t) -> int16x4_t {
7373    simd_shuffle!(a, a, [0, 1, 2, 3])
7374}
7375
7376/// Duplicate vector element to vector or scalar
7377#[inline]
7378#[target_feature(enable = "neon")]
7379#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7380#[cfg_attr(test, assert_instr(nop))]
7381#[cfg_attr(
7382    not(target_arch = "arm"),
7383    stable(feature = "neon_intrinsics", since = "1.59.0")
7384)]
7385#[cfg_attr(
7386    target_arch = "arm",
7387    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7388)]
7389pub unsafe fn vget_low_s32(a: int32x4_t) -> int32x2_t {
7390    simd_shuffle!(a, a, [0, 1])
7391}
7392
7393/// Duplicate vector element to vector or scalar
7394#[inline]
7395#[target_feature(enable = "neon")]
7396#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7397#[cfg_attr(test, assert_instr(nop))]
7398#[cfg_attr(
7399    not(target_arch = "arm"),
7400    stable(feature = "neon_intrinsics", since = "1.59.0")
7401)]
7402#[cfg_attr(
7403    target_arch = "arm",
7404    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7405)]
7406pub unsafe fn vget_low_s64(a: int64x2_t) -> int64x1_t {
7407    int64x1_t([simd_extract!(a, 0)])
7408}
7409
7410/// Duplicate vector element to vector or scalar
7411#[inline]
7412#[target_feature(enable = "neon")]
7413#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7414#[cfg_attr(test, assert_instr(nop))]
7415#[cfg_attr(
7416    not(target_arch = "arm"),
7417    stable(feature = "neon_intrinsics", since = "1.59.0")
7418)]
7419#[cfg_attr(
7420    target_arch = "arm",
7421    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7422)]
7423pub unsafe fn vget_low_u8(a: uint8x16_t) -> uint8x8_t {
7424    simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
7425}
7426
7427/// Duplicate vector element to vector or scalar
7428#[inline]
7429#[target_feature(enable = "neon")]
7430#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7431#[cfg_attr(test, assert_instr(nop))]
7432#[cfg_attr(
7433    not(target_arch = "arm"),
7434    stable(feature = "neon_intrinsics", since = "1.59.0")
7435)]
7436#[cfg_attr(
7437    target_arch = "arm",
7438    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7439)]
7440pub unsafe fn vget_low_u16(a: uint16x8_t) -> uint16x4_t {
7441    simd_shuffle!(a, a, [0, 1, 2, 3])
7442}
7443
7444/// Duplicate vector element to vector or scalar
7445#[inline]
7446#[target_feature(enable = "neon")]
7447#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7448#[cfg_attr(test, assert_instr(nop))]
7449#[cfg_attr(
7450    not(target_arch = "arm"),
7451    stable(feature = "neon_intrinsics", since = "1.59.0")
7452)]
7453#[cfg_attr(
7454    target_arch = "arm",
7455    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7456)]
7457pub unsafe fn vget_low_u32(a: uint32x4_t) -> uint32x2_t {
7458    simd_shuffle!(a, a, [0, 1])
7459}
7460
7461/// Duplicate vector element to vector or scalar
7462#[inline]
7463#[target_feature(enable = "neon")]
7464#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7465#[cfg_attr(test, assert_instr(nop))]
7466#[cfg_attr(
7467    not(target_arch = "arm"),
7468    stable(feature = "neon_intrinsics", since = "1.59.0")
7469)]
7470#[cfg_attr(
7471    target_arch = "arm",
7472    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7473)]
7474pub unsafe fn vget_low_u64(a: uint64x2_t) -> uint64x1_t {
7475    uint64x1_t([simd_extract!(a, 0)])
7476}
7477
7478/// Duplicate vector element to vector or scalar
7479#[inline]
7480#[target_feature(enable = "neon")]
7481#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7482#[cfg_attr(test, assert_instr(nop))]
7483#[cfg_attr(
7484    not(target_arch = "arm"),
7485    stable(feature = "neon_intrinsics", since = "1.59.0")
7486)]
7487#[cfg_attr(
7488    target_arch = "arm",
7489    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7490)]
7491pub unsafe fn vget_low_p8(a: poly8x16_t) -> poly8x8_t {
7492    simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
7493}
7494
7495/// Duplicate vector element to vector or scalar
7496#[inline]
7497#[target_feature(enable = "neon")]
7498#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7499#[cfg_attr(test, assert_instr(nop))]
7500#[cfg_attr(
7501    not(target_arch = "arm"),
7502    stable(feature = "neon_intrinsics", since = "1.59.0")
7503)]
7504#[cfg_attr(
7505    target_arch = "arm",
7506    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7507)]
7508pub unsafe fn vget_low_p16(a: poly16x8_t) -> poly16x4_t {
7509    simd_shuffle!(a, a, [0, 1, 2, 3])
7510}
7511
7512/// Duplicate vector element to vector or scalar
7513#[inline]
7514#[target_feature(enable = "neon")]
7515#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7516#[cfg_attr(test, assert_instr(nop))]
7517#[cfg_attr(
7518    not(target_arch = "arm"),
7519    stable(feature = "neon_intrinsics", since = "1.59.0")
7520)]
7521#[cfg_attr(
7522    target_arch = "arm",
7523    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7524)]
7525pub unsafe fn vget_low_f32(a: float32x4_t) -> float32x2_t {
7526    simd_shuffle!(a, a, [0, 1])
7527}
7528
7529/// Duplicate vector element to vector or scalar
7530#[inline]
7531#[target_feature(enable = "neon")]
7532#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7533#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7534#[cfg_attr(
7535    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7536    assert_instr(dup)
7537)]
7538#[cfg_attr(
7539    not(target_arch = "arm"),
7540    stable(feature = "neon_intrinsics", since = "1.59.0")
7541)]
7542#[cfg_attr(
7543    target_arch = "arm",
7544    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7545)]
7546pub unsafe fn vdupq_n_s8(value: i8) -> int8x16_t {
7547    int8x16_t::splat(value)
7548}
7549
7550/// Duplicate vector element to vector or scalar
7551#[inline]
7552#[target_feature(enable = "neon")]
7553#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7554#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7555#[cfg_attr(
7556    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7557    assert_instr(dup)
7558)]
7559#[cfg_attr(
7560    not(target_arch = "arm"),
7561    stable(feature = "neon_intrinsics", since = "1.59.0")
7562)]
7563#[cfg_attr(
7564    target_arch = "arm",
7565    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7566)]
7567pub unsafe fn vdupq_n_s16(value: i16) -> int16x8_t {
7568    int16x8_t::splat(value)
7569}
7570
7571/// Duplicate vector element to vector or scalar
7572#[inline]
7573#[target_feature(enable = "neon")]
7574#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7575#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7576#[cfg_attr(
7577    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7578    assert_instr(dup)
7579)]
7580#[cfg_attr(
7581    not(target_arch = "arm"),
7582    stable(feature = "neon_intrinsics", since = "1.59.0")
7583)]
7584#[cfg_attr(
7585    target_arch = "arm",
7586    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7587)]
7588pub unsafe fn vdupq_n_s32(value: i32) -> int32x4_t {
7589    int32x4_t::splat(value)
7590}
7591
7592/// Duplicate vector element to vector or scalar
7593#[inline]
7594#[target_feature(enable = "neon")]
7595#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7596#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7597#[cfg_attr(
7598    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7599    assert_instr(dup)
7600)]
7601#[cfg_attr(
7602    not(target_arch = "arm"),
7603    stable(feature = "neon_intrinsics", since = "1.59.0")
7604)]
7605#[cfg_attr(
7606    target_arch = "arm",
7607    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7608)]
7609pub unsafe fn vdupq_n_s64(value: i64) -> int64x2_t {
7610    int64x2_t::splat(value)
7611}
7612
7613/// Duplicate vector element to vector or scalar
7614#[inline]
7615#[target_feature(enable = "neon")]
7616#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7617#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7618#[cfg_attr(
7619    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7620    assert_instr(dup)
7621)]
7622#[cfg_attr(
7623    not(target_arch = "arm"),
7624    stable(feature = "neon_intrinsics", since = "1.59.0")
7625)]
7626#[cfg_attr(
7627    target_arch = "arm",
7628    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7629)]
7630pub unsafe fn vdupq_n_u8(value: u8) -> uint8x16_t {
7631    uint8x16_t::splat(value)
7632}
7633
7634/// Duplicate vector element to vector or scalar
7635#[inline]
7636#[target_feature(enable = "neon")]
7637#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7638#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7639#[cfg_attr(
7640    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7641    assert_instr(dup)
7642)]
7643#[cfg_attr(
7644    not(target_arch = "arm"),
7645    stable(feature = "neon_intrinsics", since = "1.59.0")
7646)]
7647#[cfg_attr(
7648    target_arch = "arm",
7649    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7650)]
7651pub unsafe fn vdupq_n_u16(value: u16) -> uint16x8_t {
7652    uint16x8_t::splat(value)
7653}
7654
7655/// Duplicate vector element to vector or scalar
7656#[inline]
7657#[target_feature(enable = "neon")]
7658#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7659#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7660#[cfg_attr(
7661    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7662    assert_instr(dup)
7663)]
7664#[cfg_attr(
7665    not(target_arch = "arm"),
7666    stable(feature = "neon_intrinsics", since = "1.59.0")
7667)]
7668#[cfg_attr(
7669    target_arch = "arm",
7670    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7671)]
7672pub unsafe fn vdupq_n_u32(value: u32) -> uint32x4_t {
7673    uint32x4_t::splat(value)
7674}
7675
7676/// Duplicate vector element to vector or scalar
7677#[inline]
7678#[target_feature(enable = "neon")]
7679#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7680#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7681#[cfg_attr(
7682    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7683    assert_instr(dup)
7684)]
7685#[cfg_attr(
7686    not(target_arch = "arm"),
7687    stable(feature = "neon_intrinsics", since = "1.59.0")
7688)]
7689#[cfg_attr(
7690    target_arch = "arm",
7691    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7692)]
7693pub unsafe fn vdupq_n_u64(value: u64) -> uint64x2_t {
7694    uint64x2_t::splat(value)
7695}
7696
7697/// Duplicate vector element to vector or scalar
7698#[inline]
7699#[target_feature(enable = "neon")]
7700#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7701#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7702#[cfg_attr(
7703    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7704    assert_instr(dup)
7705)]
7706#[cfg_attr(
7707    not(target_arch = "arm"),
7708    stable(feature = "neon_intrinsics", since = "1.59.0")
7709)]
7710#[cfg_attr(
7711    target_arch = "arm",
7712    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7713)]
7714pub unsafe fn vdupq_n_p8(value: p8) -> poly8x16_t {
7715    poly8x16_t::splat(value)
7716}
7717
7718/// Duplicate vector element to vector or scalar
7719#[inline]
7720#[target_feature(enable = "neon")]
7721#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7722#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7723#[cfg_attr(
7724    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7725    assert_instr(dup)
7726)]
7727#[cfg_attr(
7728    not(target_arch = "arm"),
7729    stable(feature = "neon_intrinsics", since = "1.59.0")
7730)]
7731#[cfg_attr(
7732    target_arch = "arm",
7733    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7734)]
7735pub unsafe fn vdupq_n_p16(value: p16) -> poly16x8_t {
7736    poly16x8_t::splat(value)
7737}
7738
7739/// Duplicate vector element to vector or scalar
7740#[inline]
7741#[target_feature(enable = "neon")]
7742#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7743#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7744#[cfg_attr(
7745    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7746    assert_instr(dup)
7747)]
7748#[cfg_attr(
7749    not(target_arch = "arm"),
7750    stable(feature = "neon_intrinsics", since = "1.59.0")
7751)]
7752#[cfg_attr(
7753    target_arch = "arm",
7754    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7755)]
7756pub unsafe fn vdupq_n_f32(value: f32) -> float32x4_t {
7757    float32x4_t::splat(value)
7758}
7759
7760/// Duplicate vector element to vector or scalar
7761///
7762/// Private vfp4 version used by FMA intriniscs because LLVM does
7763/// not inline the non-vfp4 version in vfp4 functions.
7764#[inline]
7765#[target_feature(enable = "neon")]
7766#[cfg_attr(target_arch = "arm", target_feature(enable = "vfp4"))]
7767#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7768#[cfg_attr(
7769    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7770    assert_instr(dup)
7771)]
7772#[cfg_attr(
7773    not(target_arch = "arm"),
7774    stable(feature = "neon_intrinsics", since = "1.59.0")
7775)]
7776unsafe fn vdupq_n_f32_vfp4(value: f32) -> float32x4_t {
7777    float32x4_t::splat(value)
7778}
7779
7780/// Duplicate vector element to vector or scalar
7781#[inline]
7782#[target_feature(enable = "neon")]
7783#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7784#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7785#[cfg_attr(
7786    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7787    assert_instr(dup)
7788)]
7789#[cfg_attr(
7790    not(target_arch = "arm"),
7791    stable(feature = "neon_intrinsics", since = "1.59.0")
7792)]
7793#[cfg_attr(
7794    target_arch = "arm",
7795    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7796)]
7797pub unsafe fn vdup_n_s8(value: i8) -> int8x8_t {
7798    int8x8_t::splat(value)
7799}
7800
7801/// Duplicate vector element to vector or scalar
7802#[inline]
7803#[target_feature(enable = "neon")]
7804#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7805#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7806#[cfg_attr(
7807    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7808    assert_instr(dup)
7809)]
7810#[cfg_attr(
7811    not(target_arch = "arm"),
7812    stable(feature = "neon_intrinsics", since = "1.59.0")
7813)]
7814#[cfg_attr(
7815    target_arch = "arm",
7816    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7817)]
7818pub unsafe fn vdup_n_s16(value: i16) -> int16x4_t {
7819    int16x4_t::splat(value)
7820}
7821
7822/// Duplicate vector element to vector or scalar
7823#[inline]
7824#[target_feature(enable = "neon")]
7825#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7826#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7827#[cfg_attr(
7828    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7829    assert_instr(dup)
7830)]
7831#[cfg_attr(
7832    not(target_arch = "arm"),
7833    stable(feature = "neon_intrinsics", since = "1.59.0")
7834)]
7835#[cfg_attr(
7836    target_arch = "arm",
7837    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7838)]
7839pub unsafe fn vdup_n_s32(value: i32) -> int32x2_t {
7840    int32x2_t::splat(value)
7841}
7842
7843/// Duplicate vector element to vector or scalar
7844#[inline]
7845#[target_feature(enable = "neon")]
7846#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7847#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7848#[cfg_attr(
7849    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7850    assert_instr(fmov)
7851)]
7852#[cfg_attr(
7853    not(target_arch = "arm"),
7854    stable(feature = "neon_intrinsics", since = "1.59.0")
7855)]
7856#[cfg_attr(
7857    target_arch = "arm",
7858    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7859)]
7860pub unsafe fn vdup_n_s64(value: i64) -> int64x1_t {
7861    int64x1_t::splat(value)
7862}
7863
7864/// Duplicate vector element to vector or scalar
7865#[inline]
7866#[target_feature(enable = "neon")]
7867#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7868#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7869#[cfg_attr(
7870    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7871    assert_instr(dup)
7872)]
7873#[cfg_attr(
7874    not(target_arch = "arm"),
7875    stable(feature = "neon_intrinsics", since = "1.59.0")
7876)]
7877#[cfg_attr(
7878    target_arch = "arm",
7879    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7880)]
7881pub unsafe fn vdup_n_u8(value: u8) -> uint8x8_t {
7882    uint8x8_t::splat(value)
7883}
7884
7885/// Duplicate vector element to vector or scalar
7886#[inline]
7887#[target_feature(enable = "neon")]
7888#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7889#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7890#[cfg_attr(
7891    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7892    assert_instr(dup)
7893)]
7894#[cfg_attr(
7895    not(target_arch = "arm"),
7896    stable(feature = "neon_intrinsics", since = "1.59.0")
7897)]
7898#[cfg_attr(
7899    target_arch = "arm",
7900    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7901)]
7902pub unsafe fn vdup_n_u16(value: u16) -> uint16x4_t {
7903    uint16x4_t::splat(value)
7904}
7905
7906/// Duplicate vector element to vector or scalar
7907#[inline]
7908#[target_feature(enable = "neon")]
7909#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7910#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7911#[cfg_attr(
7912    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7913    assert_instr(dup)
7914)]
7915#[cfg_attr(
7916    not(target_arch = "arm"),
7917    stable(feature = "neon_intrinsics", since = "1.59.0")
7918)]
7919#[cfg_attr(
7920    target_arch = "arm",
7921    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7922)]
7923pub unsafe fn vdup_n_u32(value: u32) -> uint32x2_t {
7924    uint32x2_t::splat(value)
7925}
7926
7927/// Duplicate vector element to vector or scalar
7928#[inline]
7929#[target_feature(enable = "neon")]
7930#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7931#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7932#[cfg_attr(
7933    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7934    assert_instr(fmov)
7935)]
7936#[cfg_attr(
7937    not(target_arch = "arm"),
7938    stable(feature = "neon_intrinsics", since = "1.59.0")
7939)]
7940#[cfg_attr(
7941    target_arch = "arm",
7942    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7943)]
7944pub unsafe fn vdup_n_u64(value: u64) -> uint64x1_t {
7945    uint64x1_t::splat(value)
7946}
7947
7948/// Duplicate vector element to vector or scalar
7949#[inline]
7950#[target_feature(enable = "neon")]
7951#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7952#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7953#[cfg_attr(
7954    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7955    assert_instr(dup)
7956)]
7957#[cfg_attr(
7958    not(target_arch = "arm"),
7959    stable(feature = "neon_intrinsics", since = "1.59.0")
7960)]
7961#[cfg_attr(
7962    target_arch = "arm",
7963    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7964)]
7965pub unsafe fn vdup_n_p8(value: p8) -> poly8x8_t {
7966    poly8x8_t::splat(value)
7967}
7968
7969/// Duplicate vector element to vector or scalar
7970#[inline]
7971#[target_feature(enable = "neon")]
7972#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7973#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7974#[cfg_attr(
7975    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7976    assert_instr(dup)
7977)]
7978#[cfg_attr(
7979    not(target_arch = "arm"),
7980    stable(feature = "neon_intrinsics", since = "1.59.0")
7981)]
7982#[cfg_attr(
7983    target_arch = "arm",
7984    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7985)]
7986pub unsafe fn vdup_n_p16(value: p16) -> poly16x4_t {
7987    poly16x4_t::splat(value)
7988}
7989
7990/// Duplicate vector element to vector or scalar
7991#[inline]
7992#[target_feature(enable = "neon")]
7993#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7994#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7995#[cfg_attr(
7996    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7997    assert_instr(dup)
7998)]
7999#[cfg_attr(
8000    not(target_arch = "arm"),
8001    stable(feature = "neon_intrinsics", since = "1.59.0")
8002)]
8003#[cfg_attr(
8004    target_arch = "arm",
8005    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8006)]
8007pub unsafe fn vdup_n_f32(value: f32) -> float32x2_t {
8008    float32x2_t::splat(value)
8009}
8010
8011/// Duplicate vector element to vector or scalar
8012///
8013/// Private vfp4 version used by FMA intriniscs because LLVM does
8014/// not inline the non-vfp4 version in vfp4 functions.
8015#[inline]
8016#[target_feature(enable = "neon")]
8017#[cfg_attr(target_arch = "arm", target_feature(enable = "vfp4"))]
8018#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8019#[cfg_attr(
8020    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8021    assert_instr(dup)
8022)]
8023#[cfg_attr(
8024    not(target_arch = "arm"),
8025    stable(feature = "neon_intrinsics", since = "1.59.0")
8026)]
8027unsafe fn vdup_n_f32_vfp4(value: f32) -> float32x2_t {
8028    float32x2_t::splat(value)
8029}
8030
8031/// Load SIMD&FP register (immediate offset)
8032#[inline]
8033#[target_feature(enable = "neon")]
8034#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8035#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
8036#[cfg_attr(
8037    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8038    assert_instr(nop)
8039)]
8040#[cfg_attr(
8041    not(target_arch = "arm"),
8042    stable(feature = "neon_intrinsics", since = "1.59.0")
8043)]
8044#[cfg_attr(
8045    target_arch = "arm",
8046    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8047)]
8048pub unsafe fn vldrq_p128(a: *const p128) -> p128 {
8049    *a
8050}
8051
8052/// Store SIMD&FP register (immediate offset)
8053#[inline]
8054#[target_feature(enable = "neon")]
8055#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8056#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
8057#[cfg_attr(
8058    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8059    assert_instr(nop)
8060)]
8061#[cfg_attr(
8062    not(target_arch = "arm"),
8063    stable(feature = "neon_intrinsics", since = "1.59.0")
8064)]
8065#[cfg_attr(
8066    target_arch = "arm",
8067    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8068)]
8069pub unsafe fn vstrq_p128(a: *mut p128, b: p128) {
8070    *a = b;
8071}
8072
8073/// Duplicate vector element to vector or scalar
8074#[inline]
8075#[target_feature(enable = "neon")]
8076#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8077#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8078#[cfg_attr(
8079    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8080    assert_instr(dup)
8081)]
8082#[cfg_attr(
8083    not(target_arch = "arm"),
8084    stable(feature = "neon_intrinsics", since = "1.59.0")
8085)]
8086#[cfg_attr(
8087    target_arch = "arm",
8088    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8089)]
8090pub unsafe fn vmov_n_s8(value: i8) -> int8x8_t {
8091    vdup_n_s8(value)
8092}
8093
8094/// Duplicate vector element to vector or scalar
8095#[inline]
8096#[target_feature(enable = "neon")]
8097#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8098#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8099#[cfg_attr(
8100    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8101    assert_instr(dup)
8102)]
8103#[cfg_attr(
8104    not(target_arch = "arm"),
8105    stable(feature = "neon_intrinsics", since = "1.59.0")
8106)]
8107#[cfg_attr(
8108    target_arch = "arm",
8109    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8110)]
8111pub unsafe fn vmov_n_s16(value: i16) -> int16x4_t {
8112    vdup_n_s16(value)
8113}
8114
8115/// Duplicate vector element to vector or scalar
8116#[inline]
8117#[target_feature(enable = "neon")]
8118#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8119#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8120#[cfg_attr(
8121    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8122    assert_instr(dup)
8123)]
8124#[cfg_attr(
8125    not(target_arch = "arm"),
8126    stable(feature = "neon_intrinsics", since = "1.59.0")
8127)]
8128#[cfg_attr(
8129    target_arch = "arm",
8130    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8131)]
8132pub unsafe fn vmov_n_s32(value: i32) -> int32x2_t {
8133    vdup_n_s32(value)
8134}
8135
8136/// Duplicate vector element to vector or scalar
8137#[inline]
8138#[target_feature(enable = "neon")]
8139#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8140#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
8141#[cfg_attr(
8142    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8143    assert_instr(fmov)
8144)]
8145#[cfg_attr(
8146    not(target_arch = "arm"),
8147    stable(feature = "neon_intrinsics", since = "1.59.0")
8148)]
8149#[cfg_attr(
8150    target_arch = "arm",
8151    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8152)]
8153pub unsafe fn vmov_n_s64(value: i64) -> int64x1_t {
8154    vdup_n_s64(value)
8155}
8156
8157/// Duplicate vector element to vector or scalar
8158#[inline]
8159#[target_feature(enable = "neon")]
8160#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8161#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8162#[cfg_attr(
8163    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8164    assert_instr(dup)
8165)]
8166#[cfg_attr(
8167    not(target_arch = "arm"),
8168    stable(feature = "neon_intrinsics", since = "1.59.0")
8169)]
8170#[cfg_attr(
8171    target_arch = "arm",
8172    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8173)]
8174pub unsafe fn vmov_n_u8(value: u8) -> uint8x8_t {
8175    vdup_n_u8(value)
8176}
8177
8178/// Duplicate vector element to vector or scalar
8179#[inline]
8180#[target_feature(enable = "neon")]
8181#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8182#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8183#[cfg_attr(
8184    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8185    assert_instr(dup)
8186)]
8187#[cfg_attr(
8188    not(target_arch = "arm"),
8189    stable(feature = "neon_intrinsics", since = "1.59.0")
8190)]
8191#[cfg_attr(
8192    target_arch = "arm",
8193    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8194)]
8195pub unsafe fn vmov_n_u16(value: u16) -> uint16x4_t {
8196    vdup_n_u16(value)
8197}
8198
8199/// Duplicate vector element to vector or scalar
8200#[inline]
8201#[target_feature(enable = "neon")]
8202#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8203#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8204#[cfg_attr(
8205    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8206    assert_instr(dup)
8207)]
8208#[cfg_attr(
8209    not(target_arch = "arm"),
8210    stable(feature = "neon_intrinsics", since = "1.59.0")
8211)]
8212#[cfg_attr(
8213    target_arch = "arm",
8214    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8215)]
8216pub unsafe fn vmov_n_u32(value: u32) -> uint32x2_t {
8217    vdup_n_u32(value)
8218}
8219
8220/// Duplicate vector element to vector or scalar
8221#[inline]
8222#[target_feature(enable = "neon")]
8223#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8224#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
8225#[cfg_attr(
8226    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8227    assert_instr(fmov)
8228)]
8229#[cfg_attr(
8230    not(target_arch = "arm"),
8231    stable(feature = "neon_intrinsics", since = "1.59.0")
8232)]
8233#[cfg_attr(
8234    target_arch = "arm",
8235    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8236)]
8237pub unsafe fn vmov_n_u64(value: u64) -> uint64x1_t {
8238    vdup_n_u64(value)
8239}
8240
8241/// Duplicate vector element to vector or scalar
8242#[inline]
8243#[target_feature(enable = "neon")]
8244#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8245#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8246#[cfg_attr(
8247    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8248    assert_instr(dup)
8249)]
8250#[cfg_attr(
8251    not(target_arch = "arm"),
8252    stable(feature = "neon_intrinsics", since = "1.59.0")
8253)]
8254#[cfg_attr(
8255    target_arch = "arm",
8256    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8257)]
8258pub unsafe fn vmov_n_p8(value: p8) -> poly8x8_t {
8259    vdup_n_p8(value)
8260}
8261
8262/// Duplicate vector element to vector or scalar
8263#[inline]
8264#[target_feature(enable = "neon")]
8265#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8266#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8267#[cfg_attr(
8268    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8269    assert_instr(dup)
8270)]
8271#[cfg_attr(
8272    not(target_arch = "arm"),
8273    stable(feature = "neon_intrinsics", since = "1.59.0")
8274)]
8275#[cfg_attr(
8276    target_arch = "arm",
8277    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8278)]
8279pub unsafe fn vmov_n_p16(value: p16) -> poly16x4_t {
8280    vdup_n_p16(value)
8281}
8282
8283/// Duplicate vector element to vector or scalar
8284#[inline]
8285#[target_feature(enable = "neon")]
8286#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8287#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8288#[cfg_attr(
8289    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8290    assert_instr(dup)
8291)]
8292#[cfg_attr(
8293    not(target_arch = "arm"),
8294    stable(feature = "neon_intrinsics", since = "1.59.0")
8295)]
8296#[cfg_attr(
8297    target_arch = "arm",
8298    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8299)]
8300pub unsafe fn vmov_n_f32(value: f32) -> float32x2_t {
8301    vdup_n_f32(value)
8302}
8303
8304/// Duplicate vector element to vector or scalar
8305#[inline]
8306#[target_feature(enable = "neon")]
8307#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8308#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8309#[cfg_attr(
8310    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8311    assert_instr(dup)
8312)]
8313#[cfg_attr(
8314    not(target_arch = "arm"),
8315    stable(feature = "neon_intrinsics", since = "1.59.0")
8316)]
8317#[cfg_attr(
8318    target_arch = "arm",
8319    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8320)]
8321pub unsafe fn vmovq_n_s8(value: i8) -> int8x16_t {
8322    vdupq_n_s8(value)
8323}
8324
8325/// Duplicate vector element to vector or scalar
8326#[inline]
8327#[target_feature(enable = "neon")]
8328#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8329#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8330#[cfg_attr(
8331    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8332    assert_instr(dup)
8333)]
8334#[cfg_attr(
8335    not(target_arch = "arm"),
8336    stable(feature = "neon_intrinsics", since = "1.59.0")
8337)]
8338#[cfg_attr(
8339    target_arch = "arm",
8340    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8341)]
8342pub unsafe fn vmovq_n_s16(value: i16) -> int16x8_t {
8343    vdupq_n_s16(value)
8344}
8345
8346/// Duplicate vector element to vector or scalar
8347#[inline]
8348#[target_feature(enable = "neon")]
8349#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8350#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8351#[cfg_attr(
8352    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8353    assert_instr(dup)
8354)]
8355#[cfg_attr(
8356    not(target_arch = "arm"),
8357    stable(feature = "neon_intrinsics", since = "1.59.0")
8358)]
8359#[cfg_attr(
8360    target_arch = "arm",
8361    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8362)]
8363pub unsafe fn vmovq_n_s32(value: i32) -> int32x4_t {
8364    vdupq_n_s32(value)
8365}
8366
8367/// Duplicate vector element to vector or scalar
8368#[inline]
8369#[target_feature(enable = "neon")]
8370#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8371#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
8372#[cfg_attr(
8373    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8374    assert_instr(dup)
8375)]
8376#[cfg_attr(
8377    not(target_arch = "arm"),
8378    stable(feature = "neon_intrinsics", since = "1.59.0")
8379)]
8380#[cfg_attr(
8381    target_arch = "arm",
8382    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8383)]
8384pub unsafe fn vmovq_n_s64(value: i64) -> int64x2_t {
8385    vdupq_n_s64(value)
8386}
8387
8388/// Duplicate vector element to vector or scalar
8389#[inline]
8390#[target_feature(enable = "neon")]
8391#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8392#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8393#[cfg_attr(
8394    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8395    assert_instr(dup)
8396)]
8397#[cfg_attr(
8398    not(target_arch = "arm"),
8399    stable(feature = "neon_intrinsics", since = "1.59.0")
8400)]
8401#[cfg_attr(
8402    target_arch = "arm",
8403    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8404)]
8405pub unsafe fn vmovq_n_u8(value: u8) -> uint8x16_t {
8406    vdupq_n_u8(value)
8407}
8408
8409/// Duplicate vector element to vector or scalar
8410#[inline]
8411#[target_feature(enable = "neon")]
8412#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8413#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8414#[cfg_attr(
8415    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8416    assert_instr(dup)
8417)]
8418#[cfg_attr(
8419    not(target_arch = "arm"),
8420    stable(feature = "neon_intrinsics", since = "1.59.0")
8421)]
8422#[cfg_attr(
8423    target_arch = "arm",
8424    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8425)]
8426pub unsafe fn vmovq_n_u16(value: u16) -> uint16x8_t {
8427    vdupq_n_u16(value)
8428}
8429
8430/// Duplicate vector element to vector or scalar
8431#[inline]
8432#[target_feature(enable = "neon")]
8433#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8434#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8435#[cfg_attr(
8436    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8437    assert_instr(dup)
8438)]
8439#[cfg_attr(
8440    not(target_arch = "arm"),
8441    stable(feature = "neon_intrinsics", since = "1.59.0")
8442)]
8443#[cfg_attr(
8444    target_arch = "arm",
8445    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8446)]
8447pub unsafe fn vmovq_n_u32(value: u32) -> uint32x4_t {
8448    vdupq_n_u32(value)
8449}
8450
8451/// Duplicate vector element to vector or scalar
8452#[inline]
8453#[target_feature(enable = "neon")]
8454#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8455#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
8456#[cfg_attr(
8457    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8458    assert_instr(dup)
8459)]
8460#[cfg_attr(
8461    not(target_arch = "arm"),
8462    stable(feature = "neon_intrinsics", since = "1.59.0")
8463)]
8464#[cfg_attr(
8465    target_arch = "arm",
8466    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8467)]
8468pub unsafe fn vmovq_n_u64(value: u64) -> uint64x2_t {
8469    vdupq_n_u64(value)
8470}
8471
8472/// Duplicate vector element to vector or scalar
8473#[inline]
8474#[target_feature(enable = "neon")]
8475#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8476#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
8477#[cfg_attr(
8478    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8479    assert_instr(dup)
8480)]
8481#[cfg_attr(
8482    not(target_arch = "arm"),
8483    stable(feature = "neon_intrinsics", since = "1.59.0")
8484)]
8485#[cfg_attr(
8486    target_arch = "arm",
8487    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8488)]
8489pub unsafe fn vmovq_n_p8(value: p8) -> poly8x16_t {
8490    vdupq_n_p8(value)
8491}
8492
8493/// Duplicate vector element to vector or scalar
8494#[inline]
8495#[target_feature(enable = "neon")]
8496#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8497#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
8498#[cfg_attr(
8499    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8500    assert_instr(dup)
8501)]
8502#[cfg_attr(
8503    not(target_arch = "arm"),
8504    stable(feature = "neon_intrinsics", since = "1.59.0")
8505)]
8506#[cfg_attr(
8507    target_arch = "arm",
8508    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8509)]
8510pub unsafe fn vmovq_n_p16(value: p16) -> poly16x8_t {
8511    vdupq_n_p16(value)
8512}
8513
8514/// Duplicate vector element to vector or scalar
8515#[inline]
8516#[target_feature(enable = "neon")]
8517#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8518#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
8519#[cfg_attr(
8520    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8521    assert_instr(dup)
8522)]
8523#[cfg_attr(
8524    not(target_arch = "arm"),
8525    stable(feature = "neon_intrinsics", since = "1.59.0")
8526)]
8527#[cfg_attr(
8528    target_arch = "arm",
8529    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8530)]
8531pub unsafe fn vmovq_n_f32(value: f32) -> float32x4_t {
8532    vdupq_n_f32(value)
8533}
8534
8535/// Extract vector from pair of vectors
8536#[inline]
8537#[target_feature(enable = "neon")]
8538#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8539#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop", N = 0))]
8540#[cfg_attr(
8541    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8542    assert_instr("nop", N = 0)
8543)]
8544#[rustc_legacy_const_generics(2)]
8545#[cfg_attr(
8546    not(target_arch = "arm"),
8547    stable(feature = "neon_intrinsics", since = "1.59.0")
8548)]
8549#[cfg_attr(
8550    target_arch = "arm",
8551    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8552)]
8553pub unsafe fn vext_s64<const N: i32>(a: int64x1_t, _b: int64x1_t) -> int64x1_t {
8554    static_assert!(N == 0);
8555    a
8556}
8557
8558/// Extract vector from pair of vectors
8559#[inline]
8560#[target_feature(enable = "neon")]
8561#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8562#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop", N = 0))]
8563#[cfg_attr(
8564    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8565    assert_instr("nop", N = 0)
8566)]
8567#[rustc_legacy_const_generics(2)]
8568#[cfg_attr(
8569    not(target_arch = "arm"),
8570    stable(feature = "neon_intrinsics", since = "1.59.0")
8571)]
8572#[cfg_attr(
8573    target_arch = "arm",
8574    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8575)]
8576pub unsafe fn vext_u64<const N: i32>(a: uint64x1_t, _b: uint64x1_t) -> uint64x1_t {
8577    static_assert!(N == 0);
8578    a
8579}
8580
8581/// Population count per byte.
8582#[inline]
8583#[target_feature(enable = "neon")]
8584#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8585#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8586#[cfg_attr(
8587    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8588    assert_instr(cnt)
8589)]
8590#[cfg_attr(
8591    not(target_arch = "arm"),
8592    stable(feature = "neon_intrinsics", since = "1.59.0")
8593)]
8594#[cfg_attr(
8595    target_arch = "arm",
8596    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8597)]
8598pub unsafe fn vcnt_s8(a: int8x8_t) -> int8x8_t {
8599    vcnt_s8_(a)
8600}
8601/// Population count per byte.
8602#[inline]
8603#[target_feature(enable = "neon")]
8604#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8605#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8606#[cfg_attr(
8607    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8608    assert_instr(cnt)
8609)]
8610#[cfg_attr(
8611    not(target_arch = "arm"),
8612    stable(feature = "neon_intrinsics", since = "1.59.0")
8613)]
8614#[cfg_attr(
8615    target_arch = "arm",
8616    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8617)]
8618pub unsafe fn vcntq_s8(a: int8x16_t) -> int8x16_t {
8619    vcntq_s8_(a)
8620}
8621/// Population count per byte.
8622#[inline]
8623#[target_feature(enable = "neon")]
8624#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8625#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8626#[cfg_attr(
8627    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8628    assert_instr(cnt)
8629)]
8630#[cfg_attr(
8631    not(target_arch = "arm"),
8632    stable(feature = "neon_intrinsics", since = "1.59.0")
8633)]
8634#[cfg_attr(
8635    target_arch = "arm",
8636    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8637)]
8638pub unsafe fn vcnt_u8(a: uint8x8_t) -> uint8x8_t {
8639    transmute(vcnt_s8_(transmute(a)))
8640}
8641/// Population count per byte.
8642#[inline]
8643#[target_feature(enable = "neon")]
8644#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8645#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8646#[cfg_attr(
8647    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8648    assert_instr(cnt)
8649)]
8650#[cfg_attr(
8651    not(target_arch = "arm"),
8652    stable(feature = "neon_intrinsics", since = "1.59.0")
8653)]
8654#[cfg_attr(
8655    target_arch = "arm",
8656    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8657)]
8658pub unsafe fn vcntq_u8(a: uint8x16_t) -> uint8x16_t {
8659    transmute(vcntq_s8_(transmute(a)))
8660}
8661/// Population count per byte.
8662#[inline]
8663#[target_feature(enable = "neon")]
8664#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8665#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8666#[cfg_attr(
8667    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8668    assert_instr(cnt)
8669)]
8670#[cfg_attr(
8671    not(target_arch = "arm"),
8672    stable(feature = "neon_intrinsics", since = "1.59.0")
8673)]
8674#[cfg_attr(
8675    target_arch = "arm",
8676    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8677)]
8678pub unsafe fn vcnt_p8(a: poly8x8_t) -> poly8x8_t {
8679    transmute(vcnt_s8_(transmute(a)))
8680}
8681/// Population count per byte.
8682#[inline]
8683#[target_feature(enable = "neon")]
8684#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8685#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vcnt))]
8686#[cfg_attr(
8687    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8688    assert_instr(cnt)
8689)]
8690#[cfg_attr(
8691    not(target_arch = "arm"),
8692    stable(feature = "neon_intrinsics", since = "1.59.0")
8693)]
8694#[cfg_attr(
8695    target_arch = "arm",
8696    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8697)]
8698pub unsafe fn vcntq_p8(a: poly8x16_t) -> poly8x16_t {
8699    transmute(vcntq_s8_(transmute(a)))
8700}
8701
8702/// Reversing vector elements (swap endianness)
8703#[inline]
8704#[target_feature(enable = "neon")]
8705#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8706#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8707#[cfg_attr(
8708    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8709    assert_instr(rev16)
8710)]
8711#[cfg_attr(
8712    not(target_arch = "arm"),
8713    stable(feature = "neon_intrinsics", since = "1.59.0")
8714)]
8715#[cfg_attr(
8716    target_arch = "arm",
8717    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8718)]
8719pub unsafe fn vrev16_s8(a: int8x8_t) -> int8x8_t {
8720    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
8721}
8722
8723/// Reversing vector elements (swap endianness)
8724#[inline]
8725#[target_feature(enable = "neon")]
8726#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8727#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8728#[cfg_attr(
8729    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8730    assert_instr(rev16)
8731)]
8732#[cfg_attr(
8733    not(target_arch = "arm"),
8734    stable(feature = "neon_intrinsics", since = "1.59.0")
8735)]
8736#[cfg_attr(
8737    target_arch = "arm",
8738    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8739)]
8740pub unsafe fn vrev16q_s8(a: int8x16_t) -> int8x16_t {
8741    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14])
8742}
8743
8744/// Reversing vector elements (swap endianness)
8745#[inline]
8746#[target_feature(enable = "neon")]
8747#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8748#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8749#[cfg_attr(
8750    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8751    assert_instr(rev16)
8752)]
8753#[cfg_attr(
8754    not(target_arch = "arm"),
8755    stable(feature = "neon_intrinsics", since = "1.59.0")
8756)]
8757#[cfg_attr(
8758    target_arch = "arm",
8759    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8760)]
8761pub unsafe fn vrev16_u8(a: uint8x8_t) -> uint8x8_t {
8762    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
8763}
8764
8765/// Reversing vector elements (swap endianness)
8766#[inline]
8767#[target_feature(enable = "neon")]
8768#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8769#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8770#[cfg_attr(
8771    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8772    assert_instr(rev16)
8773)]
8774#[cfg_attr(
8775    not(target_arch = "arm"),
8776    stable(feature = "neon_intrinsics", since = "1.59.0")
8777)]
8778#[cfg_attr(
8779    target_arch = "arm",
8780    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8781)]
8782pub unsafe fn vrev16q_u8(a: uint8x16_t) -> uint8x16_t {
8783    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14])
8784}
8785
8786/// Reversing vector elements (swap endianness)
8787#[inline]
8788#[target_feature(enable = "neon")]
8789#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8790#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8791#[cfg_attr(
8792    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8793    assert_instr(rev16)
8794)]
8795#[cfg_attr(
8796    not(target_arch = "arm"),
8797    stable(feature = "neon_intrinsics", since = "1.59.0")
8798)]
8799#[cfg_attr(
8800    target_arch = "arm",
8801    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8802)]
8803pub unsafe fn vrev16_p8(a: poly8x8_t) -> poly8x8_t {
8804    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
8805}
8806
8807/// Reversing vector elements (swap endianness)
8808#[inline]
8809#[target_feature(enable = "neon")]
8810#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8811#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
8812#[cfg_attr(
8813    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8814    assert_instr(rev16)
8815)]
8816#[cfg_attr(
8817    not(target_arch = "arm"),
8818    stable(feature = "neon_intrinsics", since = "1.59.0")
8819)]
8820#[cfg_attr(
8821    target_arch = "arm",
8822    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8823)]
8824pub unsafe fn vrev16q_p8(a: poly8x16_t) -> poly8x16_t {
8825    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14])
8826}
8827
8828/// Reversing vector elements (swap endianness)
8829#[inline]
8830#[target_feature(enable = "neon")]
8831#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8832#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
8833#[cfg_attr(
8834    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8835    assert_instr(rev32)
8836)]
8837#[cfg_attr(
8838    not(target_arch = "arm"),
8839    stable(feature = "neon_intrinsics", since = "1.59.0")
8840)]
8841#[cfg_attr(
8842    target_arch = "arm",
8843    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8844)]
8845pub unsafe fn vrev32_s8(a: int8x8_t) -> int8x8_t {
8846    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
8847}
8848
8849/// Reversing vector elements (swap endianness)
8850#[inline]
8851#[target_feature(enable = "neon")]
8852#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8853#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
8854#[cfg_attr(
8855    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8856    assert_instr(rev32)
8857)]
8858#[cfg_attr(
8859    not(target_arch = "arm"),
8860    stable(feature = "neon_intrinsics", since = "1.59.0")
8861)]
8862#[cfg_attr(
8863    target_arch = "arm",
8864    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8865)]
8866pub unsafe fn vrev32q_s8(a: int8x16_t) -> int8x16_t {
8867    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12])
8868}
8869
8870/// Reversing vector elements (swap endianness)
8871#[inline]
8872#[target_feature(enable = "neon")]
8873#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8874#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
8875#[cfg_attr(
8876    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8877    assert_instr(rev32)
8878)]
8879#[cfg_attr(
8880    not(target_arch = "arm"),
8881    stable(feature = "neon_intrinsics", since = "1.59.0")
8882)]
8883#[cfg_attr(
8884    target_arch = "arm",
8885    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8886)]
8887pub unsafe fn vrev32_u8(a: uint8x8_t) -> uint8x8_t {
8888    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
8889}
8890
8891/// Reversing vector elements (swap endianness)
8892#[inline]
8893#[target_feature(enable = "neon")]
8894#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8895#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
8896#[cfg_attr(
8897    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8898    assert_instr(rev32)
8899)]
8900#[cfg_attr(
8901    not(target_arch = "arm"),
8902    stable(feature = "neon_intrinsics", since = "1.59.0")
8903)]
8904#[cfg_attr(
8905    target_arch = "arm",
8906    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8907)]
8908pub unsafe fn vrev32q_u8(a: uint8x16_t) -> uint8x16_t {
8909    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12])
8910}
8911
8912/// Reversing vector elements (swap endianness)
8913#[inline]
8914#[target_feature(enable = "neon")]
8915#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8916#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
8917#[cfg_attr(
8918    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8919    assert_instr(rev32)
8920)]
8921#[cfg_attr(
8922    not(target_arch = "arm"),
8923    stable(feature = "neon_intrinsics", since = "1.59.0")
8924)]
8925#[cfg_attr(
8926    target_arch = "arm",
8927    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8928)]
8929pub unsafe fn vrev32_s16(a: int16x4_t) -> int16x4_t {
8930    simd_shuffle!(a, a, [1, 0, 3, 2])
8931}
8932
8933/// Reversing vector elements (swap endianness)
8934#[inline]
8935#[target_feature(enable = "neon")]
8936#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8937#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
8938#[cfg_attr(
8939    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8940    assert_instr(rev32)
8941)]
8942#[cfg_attr(
8943    not(target_arch = "arm"),
8944    stable(feature = "neon_intrinsics", since = "1.59.0")
8945)]
8946#[cfg_attr(
8947    target_arch = "arm",
8948    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8949)]
8950pub unsafe fn vrev32q_s16(a: int16x8_t) -> int16x8_t {
8951    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
8952}
8953
8954/// Reversing vector elements (swap endianness)
8955#[inline]
8956#[target_feature(enable = "neon")]
8957#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8958#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
8959#[cfg_attr(
8960    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8961    assert_instr(rev32)
8962)]
8963#[cfg_attr(
8964    not(target_arch = "arm"),
8965    stable(feature = "neon_intrinsics", since = "1.59.0")
8966)]
8967#[cfg_attr(
8968    target_arch = "arm",
8969    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8970)]
8971pub unsafe fn vrev32_p16(a: poly16x4_t) -> poly16x4_t {
8972    simd_shuffle!(a, a, [1, 0, 3, 2])
8973}
8974
8975/// Reversing vector elements (swap endianness)
8976#[inline]
8977#[target_feature(enable = "neon")]
8978#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8979#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
8980#[cfg_attr(
8981    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8982    assert_instr(rev32)
8983)]
8984#[cfg_attr(
8985    not(target_arch = "arm"),
8986    stable(feature = "neon_intrinsics", since = "1.59.0")
8987)]
8988#[cfg_attr(
8989    target_arch = "arm",
8990    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8991)]
8992pub unsafe fn vrev32q_p16(a: poly16x8_t) -> poly16x8_t {
8993    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
8994}
8995
8996/// Reversing vector elements (swap endianness)
8997#[inline]
8998#[target_feature(enable = "neon")]
8999#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9000#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
9001#[cfg_attr(
9002    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9003    assert_instr(rev32)
9004)]
9005#[cfg_attr(
9006    not(target_arch = "arm"),
9007    stable(feature = "neon_intrinsics", since = "1.59.0")
9008)]
9009#[cfg_attr(
9010    target_arch = "arm",
9011    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9012)]
9013pub unsafe fn vrev32_u16(a: uint16x4_t) -> uint16x4_t {
9014    simd_shuffle!(a, a, [1, 0, 3, 2])
9015}
9016
9017/// Reversing vector elements (swap endianness)
9018#[inline]
9019#[target_feature(enable = "neon")]
9020#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9021#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
9022#[cfg_attr(
9023    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9024    assert_instr(rev32)
9025)]
9026#[cfg_attr(
9027    not(target_arch = "arm"),
9028    stable(feature = "neon_intrinsics", since = "1.59.0")
9029)]
9030#[cfg_attr(
9031    target_arch = "arm",
9032    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9033)]
9034pub unsafe fn vrev32q_u16(a: uint16x8_t) -> uint16x8_t {
9035    simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6])
9036}
9037
9038/// Reversing vector elements (swap endianness)
9039#[inline]
9040#[target_feature(enable = "neon")]
9041#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9042#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
9043#[cfg_attr(
9044    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9045    assert_instr(rev32)
9046)]
9047#[cfg_attr(
9048    not(target_arch = "arm"),
9049    stable(feature = "neon_intrinsics", since = "1.59.0")
9050)]
9051#[cfg_attr(
9052    target_arch = "arm",
9053    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9054)]
9055pub unsafe fn vrev32_p8(a: poly8x8_t) -> poly8x8_t {
9056    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
9057}
9058
9059/// Reversing vector elements (swap endianness)
9060#[inline]
9061#[target_feature(enable = "neon")]
9062#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9063#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
9064#[cfg_attr(
9065    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9066    assert_instr(rev32)
9067)]
9068#[cfg_attr(
9069    not(target_arch = "arm"),
9070    stable(feature = "neon_intrinsics", since = "1.59.0")
9071)]
9072#[cfg_attr(
9073    target_arch = "arm",
9074    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9075)]
9076pub unsafe fn vrev32q_p8(a: poly8x16_t) -> poly8x16_t {
9077    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12])
9078}
9079
9080/// Reversing vector elements (swap endianness)
9081#[inline]
9082#[target_feature(enable = "neon")]
9083#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9084#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9085#[cfg_attr(
9086    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9087    assert_instr(rev64)
9088)]
9089#[cfg_attr(
9090    not(target_arch = "arm"),
9091    stable(feature = "neon_intrinsics", since = "1.59.0")
9092)]
9093#[cfg_attr(
9094    target_arch = "arm",
9095    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9096)]
9097pub unsafe fn vrev64_s8(a: int8x8_t) -> int8x8_t {
9098    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0])
9099}
9100
9101/// Reversing vector elements (swap endianness)
9102#[inline]
9103#[target_feature(enable = "neon")]
9104#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9105#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9106#[cfg_attr(
9107    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9108    assert_instr(rev64)
9109)]
9110#[cfg_attr(
9111    not(target_arch = "arm"),
9112    stable(feature = "neon_intrinsics", since = "1.59.0")
9113)]
9114#[cfg_attr(
9115    target_arch = "arm",
9116    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9117)]
9118pub unsafe fn vrev64q_s8(a: int8x16_t) -> int8x16_t {
9119    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8])
9120}
9121
9122/// Reversing vector elements (swap endianness)
9123#[inline]
9124#[target_feature(enable = "neon")]
9125#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9126#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9127#[cfg_attr(
9128    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9129    assert_instr(rev64)
9130)]
9131#[cfg_attr(
9132    not(target_arch = "arm"),
9133    stable(feature = "neon_intrinsics", since = "1.59.0")
9134)]
9135#[cfg_attr(
9136    target_arch = "arm",
9137    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9138)]
9139pub unsafe fn vrev64_s16(a: int16x4_t) -> int16x4_t {
9140    simd_shuffle!(a, a, [3, 2, 1, 0])
9141}
9142
9143/// Reversing vector elements (swap endianness)
9144#[inline]
9145#[target_feature(enable = "neon")]
9146#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9147#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9148#[cfg_attr(
9149    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9150    assert_instr(rev64)
9151)]
9152#[cfg_attr(
9153    not(target_arch = "arm"),
9154    stable(feature = "neon_intrinsics", since = "1.59.0")
9155)]
9156#[cfg_attr(
9157    target_arch = "arm",
9158    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9159)]
9160pub unsafe fn vrev64q_s16(a: int16x8_t) -> int16x8_t {
9161    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
9162}
9163
9164/// Reversing vector elements (swap endianness)
9165#[inline]
9166#[target_feature(enable = "neon")]
9167#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9168#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9169#[cfg_attr(
9170    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9171    assert_instr(rev64)
9172)]
9173#[cfg_attr(
9174    not(target_arch = "arm"),
9175    stable(feature = "neon_intrinsics", since = "1.59.0")
9176)]
9177#[cfg_attr(
9178    target_arch = "arm",
9179    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9180)]
9181pub unsafe fn vrev64_s32(a: int32x2_t) -> int32x2_t {
9182    simd_shuffle!(a, a, [1, 0])
9183}
9184
9185/// Reversing vector elements (swap endianness)
9186#[inline]
9187#[target_feature(enable = "neon")]
9188#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9189#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9190#[cfg_attr(
9191    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9192    assert_instr(rev64)
9193)]
9194#[cfg_attr(
9195    not(target_arch = "arm"),
9196    stable(feature = "neon_intrinsics", since = "1.59.0")
9197)]
9198#[cfg_attr(
9199    target_arch = "arm",
9200    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9201)]
9202pub unsafe fn vrev64q_s32(a: int32x4_t) -> int32x4_t {
9203    simd_shuffle!(a, a, [1, 0, 3, 2])
9204}
9205
9206/// Reversing vector elements (swap endianness)
9207#[inline]
9208#[target_feature(enable = "neon")]
9209#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9210#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9211#[cfg_attr(
9212    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9213    assert_instr(rev64)
9214)]
9215#[cfg_attr(
9216    not(target_arch = "arm"),
9217    stable(feature = "neon_intrinsics", since = "1.59.0")
9218)]
9219#[cfg_attr(
9220    target_arch = "arm",
9221    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9222)]
9223pub unsafe fn vrev64_u8(a: uint8x8_t) -> uint8x8_t {
9224    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0])
9225}
9226
9227/// Reversing vector elements (swap endianness)
9228#[inline]
9229#[target_feature(enable = "neon")]
9230#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9231#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9232#[cfg_attr(
9233    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9234    assert_instr(rev64)
9235)]
9236#[cfg_attr(
9237    not(target_arch = "arm"),
9238    stable(feature = "neon_intrinsics", since = "1.59.0")
9239)]
9240#[cfg_attr(
9241    target_arch = "arm",
9242    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9243)]
9244pub unsafe fn vrev64q_u8(a: uint8x16_t) -> uint8x16_t {
9245    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8])
9246}
9247
9248/// Reversing vector elements (swap endianness)
9249#[inline]
9250#[target_feature(enable = "neon")]
9251#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9252#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9253#[cfg_attr(
9254    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9255    assert_instr(rev64)
9256)]
9257#[cfg_attr(
9258    not(target_arch = "arm"),
9259    stable(feature = "neon_intrinsics", since = "1.59.0")
9260)]
9261#[cfg_attr(
9262    target_arch = "arm",
9263    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9264)]
9265pub unsafe fn vrev64_u16(a: uint16x4_t) -> uint16x4_t {
9266    simd_shuffle!(a, a, [3, 2, 1, 0])
9267}
9268
9269/// Reversing vector elements (swap endianness)
9270#[inline]
9271#[target_feature(enable = "neon")]
9272#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9273#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9274#[cfg_attr(
9275    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9276    assert_instr(rev64)
9277)]
9278#[cfg_attr(
9279    not(target_arch = "arm"),
9280    stable(feature = "neon_intrinsics", since = "1.59.0")
9281)]
9282#[cfg_attr(
9283    target_arch = "arm",
9284    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9285)]
9286pub unsafe fn vrev64q_u16(a: uint16x8_t) -> uint16x8_t {
9287    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
9288}
9289
9290/// Reversing vector elements (swap endianness)
9291#[inline]
9292#[target_feature(enable = "neon")]
9293#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9294#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9295#[cfg_attr(
9296    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9297    assert_instr(rev64)
9298)]
9299#[cfg_attr(
9300    not(target_arch = "arm"),
9301    stable(feature = "neon_intrinsics", since = "1.59.0")
9302)]
9303#[cfg_attr(
9304    target_arch = "arm",
9305    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9306)]
9307pub unsafe fn vrev64_u32(a: uint32x2_t) -> uint32x2_t {
9308    simd_shuffle!(a, a, [1, 0])
9309}
9310
9311/// Reversing vector elements (swap endianness)
9312#[inline]
9313#[target_feature(enable = "neon")]
9314#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9315#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9316#[cfg_attr(
9317    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9318    assert_instr(rev64)
9319)]
9320#[cfg_attr(
9321    not(target_arch = "arm"),
9322    stable(feature = "neon_intrinsics", since = "1.59.0")
9323)]
9324#[cfg_attr(
9325    target_arch = "arm",
9326    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9327)]
9328pub unsafe fn vrev64q_u32(a: uint32x4_t) -> uint32x4_t {
9329    simd_shuffle!(a, a, [1, 0, 3, 2])
9330}
9331
9332/// Reversing vector elements (swap endianness)
9333#[inline]
9334#[target_feature(enable = "neon")]
9335#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9336#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9337#[cfg_attr(
9338    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9339    assert_instr(rev64)
9340)]
9341#[cfg_attr(
9342    not(target_arch = "arm"),
9343    stable(feature = "neon_intrinsics", since = "1.59.0")
9344)]
9345#[cfg_attr(
9346    target_arch = "arm",
9347    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9348)]
9349pub unsafe fn vrev64_f32(a: float32x2_t) -> float32x2_t {
9350    simd_shuffle!(a, a, [1, 0])
9351}
9352
9353/// Reversing vector elements (swap endianness)
9354#[inline]
9355#[target_feature(enable = "neon")]
9356#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9357#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
9358#[cfg_attr(
9359    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9360    assert_instr(rev64)
9361)]
9362#[cfg_attr(
9363    not(target_arch = "arm"),
9364    stable(feature = "neon_intrinsics", since = "1.59.0")
9365)]
9366#[cfg_attr(
9367    target_arch = "arm",
9368    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9369)]
9370pub unsafe fn vrev64q_f32(a: float32x4_t) -> float32x4_t {
9371    simd_shuffle!(a, a, [1, 0, 3, 2])
9372}
9373
9374/// Reversing vector elements (swap endianness)
9375#[inline]
9376#[target_feature(enable = "neon")]
9377#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9378#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9379#[cfg_attr(
9380    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9381    assert_instr(rev64)
9382)]
9383#[cfg_attr(
9384    not(target_arch = "arm"),
9385    stable(feature = "neon_intrinsics", since = "1.59.0")
9386)]
9387#[cfg_attr(
9388    target_arch = "arm",
9389    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9390)]
9391pub unsafe fn vrev64_p8(a: poly8x8_t) -> poly8x8_t {
9392    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0])
9393}
9394
9395/// Reversing vector elements (swap endianness)
9396#[inline]
9397#[target_feature(enable = "neon")]
9398#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9399#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
9400#[cfg_attr(
9401    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9402    assert_instr(rev64)
9403)]
9404#[cfg_attr(
9405    not(target_arch = "arm"),
9406    stable(feature = "neon_intrinsics", since = "1.59.0")
9407)]
9408#[cfg_attr(
9409    target_arch = "arm",
9410    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9411)]
9412pub unsafe fn vrev64q_p8(a: poly8x16_t) -> poly8x16_t {
9413    simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8])
9414}
9415
9416/// Reversing vector elements (swap endianness)
9417#[inline]
9418#[target_feature(enable = "neon")]
9419#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9420#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9421#[cfg_attr(
9422    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9423    assert_instr(rev64)
9424)]
9425#[cfg_attr(
9426    not(target_arch = "arm"),
9427    stable(feature = "neon_intrinsics", since = "1.59.0")
9428)]
9429#[cfg_attr(
9430    target_arch = "arm",
9431    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9432)]
9433pub unsafe fn vrev64_p16(a: poly16x4_t) -> poly16x4_t {
9434    simd_shuffle!(a, a, [3, 2, 1, 0])
9435}
9436
9437/// Reversing vector elements (swap endianness)
9438#[inline]
9439#[target_feature(enable = "neon")]
9440#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9441#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
9442#[cfg_attr(
9443    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9444    assert_instr(rev64)
9445)]
9446#[cfg_attr(
9447    not(target_arch = "arm"),
9448    stable(feature = "neon_intrinsics", since = "1.59.0")
9449)]
9450#[cfg_attr(
9451    target_arch = "arm",
9452    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9453)]
9454pub unsafe fn vrev64q_p16(a: poly16x8_t) -> poly16x8_t {
9455    simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4])
9456}
9457
9458/// Signed Add and Accumulate Long Pairwise.
9459#[inline]
9460#[target_feature(enable = "neon")]
9461#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9462#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s8))]
9463#[cfg_attr(
9464    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9465    assert_instr(sadalp)
9466)]
9467#[cfg_attr(
9468    not(target_arch = "arm"),
9469    stable(feature = "neon_intrinsics", since = "1.59.0")
9470)]
9471#[cfg_attr(
9472    target_arch = "arm",
9473    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9474)]
9475pub unsafe fn vpadal_s8(a: int16x4_t, b: int8x8_t) -> int16x4_t {
9476    #[cfg(target_arch = "arm")]
9477    {
9478        crate::core_arch::arm::neon::vpadal_s8_(a, b)
9479    }
9480    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9481    {
9482        simd_add(vpaddl_s8_(b), a)
9483    }
9484}
9485
9486/// Signed Add and Accumulate Long Pairwise.
9487#[inline]
9488#[target_feature(enable = "neon")]
9489#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9490#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s16))]
9491#[cfg_attr(
9492    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9493    assert_instr(sadalp)
9494)]
9495#[cfg_attr(
9496    not(target_arch = "arm"),
9497    stable(feature = "neon_intrinsics", since = "1.59.0")
9498)]
9499#[cfg_attr(
9500    target_arch = "arm",
9501    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9502)]
9503pub unsafe fn vpadal_s16(a: int32x2_t, b: int16x4_t) -> int32x2_t {
9504    #[cfg(target_arch = "arm")]
9505    {
9506        crate::core_arch::arm::neon::vpadal_s16_(a, b)
9507    }
9508    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9509    {
9510        simd_add(vpaddl_s16_(b), a)
9511    }
9512}
9513
9514/// Signed Add and Accumulate Long Pairwise.
9515#[inline]
9516#[target_feature(enable = "neon")]
9517#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9518#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s32))]
9519#[cfg_attr(
9520    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9521    assert_instr(sadalp)
9522)]
9523#[cfg_attr(
9524    not(target_arch = "arm"),
9525    stable(feature = "neon_intrinsics", since = "1.59.0")
9526)]
9527#[cfg_attr(
9528    target_arch = "arm",
9529    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9530)]
9531pub unsafe fn vpadal_s32(a: int64x1_t, b: int32x2_t) -> int64x1_t {
9532    #[cfg(target_arch = "arm")]
9533    {
9534        crate::core_arch::arm::neon::vpadal_s32_(a, b)
9535    }
9536    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9537    {
9538        simd_add(vpaddl_s32_(b), a)
9539    }
9540}
9541
9542/// Signed Add and Accumulate Long Pairwise.
9543#[inline]
9544#[target_feature(enable = "neon")]
9545#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9546#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s8))]
9547#[cfg_attr(
9548    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9549    assert_instr(sadalp)
9550)]
9551#[cfg_attr(
9552    not(target_arch = "arm"),
9553    stable(feature = "neon_intrinsics", since = "1.59.0")
9554)]
9555#[cfg_attr(
9556    target_arch = "arm",
9557    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9558)]
9559pub unsafe fn vpadalq_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t {
9560    #[cfg(target_arch = "arm")]
9561    {
9562        crate::core_arch::arm::neon::vpadalq_s8_(a, b)
9563    }
9564    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9565    {
9566        simd_add(vpaddlq_s8_(b), a)
9567    }
9568}
9569
9570/// Signed Add and Accumulate Long Pairwise.
9571#[inline]
9572#[target_feature(enable = "neon")]
9573#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9574#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s16))]
9575#[cfg_attr(
9576    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9577    assert_instr(sadalp)
9578)]
9579#[cfg_attr(
9580    not(target_arch = "arm"),
9581    stable(feature = "neon_intrinsics", since = "1.59.0")
9582)]
9583#[cfg_attr(
9584    target_arch = "arm",
9585    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9586)]
9587pub unsafe fn vpadalq_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t {
9588    #[cfg(target_arch = "arm")]
9589    {
9590        crate::core_arch::arm::neon::vpadalq_s16_(a, b)
9591    }
9592    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9593    {
9594        simd_add(vpaddlq_s16_(b), a)
9595    }
9596}
9597
9598/// Signed Add and Accumulate Long Pairwise.
9599#[inline]
9600#[target_feature(enable = "neon")]
9601#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9602#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.s32))]
9603#[cfg_attr(
9604    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9605    assert_instr(sadalp)
9606)]
9607#[cfg_attr(
9608    not(target_arch = "arm"),
9609    stable(feature = "neon_intrinsics", since = "1.59.0")
9610)]
9611#[cfg_attr(
9612    target_arch = "arm",
9613    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9614)]
9615pub unsafe fn vpadalq_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t {
9616    #[cfg(target_arch = "arm")]
9617    {
9618        crate::core_arch::arm::neon::vpadalq_s32_(a, b)
9619    }
9620    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9621    {
9622        simd_add(vpaddlq_s32_(b), a)
9623    }
9624}
9625
9626/// Unsigned Add and Accumulate Long Pairwise.
9627#[inline]
9628#[target_feature(enable = "neon")]
9629#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9630#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u8))]
9631#[cfg_attr(
9632    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9633    assert_instr(uadalp)
9634)]
9635#[cfg_attr(
9636    not(target_arch = "arm"),
9637    stable(feature = "neon_intrinsics", since = "1.59.0")
9638)]
9639#[cfg_attr(
9640    target_arch = "arm",
9641    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9642)]
9643pub unsafe fn vpadal_u8(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t {
9644    #[cfg(target_arch = "arm")]
9645    {
9646        crate::core_arch::arm::neon::vpadal_u8_(a, b)
9647    }
9648    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9649    {
9650        simd_add(vpaddl_u8_(b), a)
9651    }
9652}
9653
9654/// Unsigned Add and Accumulate Long Pairwise.
9655#[inline]
9656#[target_feature(enable = "neon")]
9657#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9658#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u16))]
9659#[cfg_attr(
9660    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9661    assert_instr(uadalp)
9662)]
9663#[cfg_attr(
9664    not(target_arch = "arm"),
9665    stable(feature = "neon_intrinsics", since = "1.59.0")
9666)]
9667#[cfg_attr(
9668    target_arch = "arm",
9669    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9670)]
9671pub unsafe fn vpadal_u16(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t {
9672    #[cfg(target_arch = "arm")]
9673    {
9674        crate::core_arch::arm::neon::vpadal_u16_(a, b)
9675    }
9676    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9677    {
9678        simd_add(vpaddl_u16_(b), a)
9679    }
9680}
9681
9682/// Unsigned Add and Accumulate Long Pairwise.
9683#[inline]
9684#[target_feature(enable = "neon")]
9685#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9686#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u32))]
9687#[cfg_attr(
9688    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9689    assert_instr(uadalp)
9690)]
9691#[cfg_attr(
9692    not(target_arch = "arm"),
9693    stable(feature = "neon_intrinsics", since = "1.59.0")
9694)]
9695#[cfg_attr(
9696    target_arch = "arm",
9697    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9698)]
9699pub unsafe fn vpadal_u32(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t {
9700    #[cfg(target_arch = "arm")]
9701    {
9702        crate::core_arch::arm::neon::vpadal_u32_(a, b)
9703    }
9704    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9705    {
9706        simd_add(vpaddl_u32_(b), a)
9707    }
9708}
9709
9710/// Unsigned Add and Accumulate Long Pairwise.
9711#[inline]
9712#[target_feature(enable = "neon")]
9713#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9714#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u8))]
9715#[cfg_attr(
9716    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9717    assert_instr(uadalp)
9718)]
9719#[cfg_attr(
9720    not(target_arch = "arm"),
9721    stable(feature = "neon_intrinsics", since = "1.59.0")
9722)]
9723#[cfg_attr(
9724    target_arch = "arm",
9725    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9726)]
9727pub unsafe fn vpadalq_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t {
9728    #[cfg(target_arch = "arm")]
9729    {
9730        crate::core_arch::arm::neon::vpadalq_u8_(a, b)
9731    }
9732    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9733    {
9734        simd_add(vpaddlq_u8_(b), a)
9735    }
9736}
9737
9738/// Unsigned Add and Accumulate Long Pairwise.
9739#[inline]
9740#[target_feature(enable = "neon")]
9741#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9742#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u16))]
9743#[cfg_attr(
9744    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9745    assert_instr(uadalp)
9746)]
9747#[cfg_attr(
9748    not(target_arch = "arm"),
9749    stable(feature = "neon_intrinsics", since = "1.59.0")
9750)]
9751#[cfg_attr(
9752    target_arch = "arm",
9753    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9754)]
9755pub unsafe fn vpadalq_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t {
9756    #[cfg(target_arch = "arm")]
9757    {
9758        crate::core_arch::arm::neon::vpadalq_u16_(a, b)
9759    }
9760    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9761    {
9762        simd_add(vpaddlq_u16_(b), a)
9763    }
9764}
9765
9766/// Unsigned Add and Accumulate Long Pairwise.
9767#[inline]
9768#[target_feature(enable = "neon")]
9769#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9770#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vpadal.u32))]
9771#[cfg_attr(
9772    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9773    assert_instr(uadalp)
9774)]
9775#[cfg_attr(
9776    not(target_arch = "arm"),
9777    stable(feature = "neon_intrinsics", since = "1.59.0")
9778)]
9779#[cfg_attr(
9780    target_arch = "arm",
9781    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9782)]
9783pub unsafe fn vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
9784    #[cfg(target_arch = "arm")]
9785    {
9786        crate::core_arch::arm::neon::vpadalq_u32_(a, b)
9787    }
9788    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
9789    {
9790        simd_add(vpaddlq_u32_(b), a)
9791    }
9792}
9793
9794/// 8-bit integer matrix multiply-accumulate
9795#[inline]
9796#[target_feature(enable = "neon,i8mm")]
9797#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
9798#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
9799#[cfg_attr(
9800    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9801    assert_instr(smmla)
9802)]
9803#[cfg_attr(
9804    target_arch = "arm",
9805    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9806)]
9807#[cfg_attr(
9808    not(target_arch = "arm"),
9809    unstable(feature = "stdarch_neon_i8mm", issue = "117223")
9810)]
9811pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t {
9812    #[allow(improper_ctypes)]
9813    extern "unadjusted" {
9814        #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.smmla.v4i32.v16i8")]
9815        #[cfg_attr(
9816            any(target_arch = "aarch64", target_arch = "arm64ec"),
9817            link_name = "llvm.aarch64.neon.smmla.v4i32.v16i8"
9818        )]
9819        fn vmmlaq_s32_(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t;
9820    }
9821    vmmlaq_s32_(a, b, c)
9822}
9823
9824/// 8-bit integer matrix multiply-accumulate
9825#[inline]
9826#[target_feature(enable = "neon,i8mm")]
9827#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
9828#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
9829#[cfg_attr(
9830    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9831    assert_instr(ummla)
9832)]
9833#[cfg_attr(
9834    target_arch = "arm",
9835    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9836)]
9837#[cfg_attr(
9838    not(target_arch = "arm"),
9839    unstable(feature = "stdarch_neon_i8mm", issue = "117223")
9840)]
9841pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t {
9842    #[allow(improper_ctypes)]
9843    extern "unadjusted" {
9844        #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.ummla.v4i32.v16i8")]
9845        #[cfg_attr(
9846            any(target_arch = "aarch64", target_arch = "arm64ec"),
9847            link_name = "llvm.aarch64.neon.ummla.v4i32.v16i8"
9848        )]
9849        fn vmmlaq_u32_(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t;
9850    }
9851    vmmlaq_u32_(a, b, c)
9852}
9853
9854/// Unsigned and signed 8-bit integer matrix multiply-accumulate
9855#[inline]
9856#[target_feature(enable = "neon,i8mm")]
9857#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
9858#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
9859#[cfg_attr(
9860    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
9861    assert_instr(usmmla)
9862)]
9863#[cfg_attr(
9864    target_arch = "arm",
9865    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9866)]
9867#[cfg_attr(
9868    not(target_arch = "arm"),
9869    unstable(feature = "stdarch_neon_i8mm", issue = "117223")
9870)]
9871pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t {
9872    #[allow(improper_ctypes)]
9873    extern "unadjusted" {
9874        #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.usmmla.v4i32.v16i8")]
9875        #[cfg_attr(
9876            any(target_arch = "aarch64", target_arch = "arm64ec"),
9877            link_name = "llvm.aarch64.neon.usmmla.v4i32.v16i8"
9878        )]
9879        fn vusmmlaq_s32_(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t;
9880    }
9881    vusmmlaq_s32_(a, b, c)
9882}
9883
9884/* FIXME: 16-bit float
9885/// Vector combine
9886#[inline]
9887#[target_feature(enable = "neon")]
9888#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9889#[cfg_attr(test, assert_instr(nop))]
9890#[cfg_attr(
9891    target_arch = "arm",
9892    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9893)] pub unsafe fn vcombine_f16 ( low: float16x4_t,  high: float16x4_t) -> float16x8_t {
9894    simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
9895}
9896*/
9897
9898/// Vector combine
9899#[inline]
9900#[target_feature(enable = "neon")]
9901#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9902#[cfg_attr(test, assert_instr(nop))]
9903#[cfg_attr(
9904    not(target_arch = "arm"),
9905    stable(feature = "neon_intrinsics", since = "1.59.0")
9906)]
9907#[cfg_attr(
9908    target_arch = "arm",
9909    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9910)]
9911pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t {
9912    simd_shuffle!(low, high, [0, 1, 2, 3])
9913}
9914
9915/// Vector combine
9916#[inline]
9917#[target_feature(enable = "neon")]
9918#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9919#[cfg_attr(test, assert_instr(nop))]
9920#[cfg_attr(
9921    not(target_arch = "arm"),
9922    stable(feature = "neon_intrinsics", since = "1.59.0")
9923)]
9924#[cfg_attr(
9925    target_arch = "arm",
9926    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9927)]
9928pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t {
9929    simd_shuffle!(
9930        low,
9931        high,
9932        [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
9933    )
9934}
9935
9936/// Vector combine
9937#[inline]
9938#[target_feature(enable = "neon")]
9939#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9940#[cfg_attr(test, assert_instr(nop))]
9941#[cfg_attr(
9942    not(target_arch = "arm"),
9943    stable(feature = "neon_intrinsics", since = "1.59.0")
9944)]
9945#[cfg_attr(
9946    target_arch = "arm",
9947    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9948)]
9949pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t {
9950    simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
9951}
9952
9953/// Vector combine
9954#[inline]
9955#[target_feature(enable = "neon")]
9956#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9957#[cfg_attr(test, assert_instr(nop))]
9958#[cfg_attr(
9959    not(target_arch = "arm"),
9960    stable(feature = "neon_intrinsics", since = "1.59.0")
9961)]
9962#[cfg_attr(
9963    target_arch = "arm",
9964    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9965)]
9966pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t {
9967    simd_shuffle!(
9968        low,
9969        high,
9970        [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
9971    )
9972}
9973
9974/// Vector combine
9975#[inline]
9976#[target_feature(enable = "neon")]
9977#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9978#[cfg_attr(test, assert_instr(nop))]
9979#[cfg_attr(
9980    not(target_arch = "arm"),
9981    stable(feature = "neon_intrinsics", since = "1.59.0")
9982)]
9983#[cfg_attr(
9984    target_arch = "arm",
9985    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
9986)]
9987pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t {
9988    simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
9989}
9990
9991/// Vector combine
9992#[inline]
9993#[target_feature(enable = "neon")]
9994#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
9995#[cfg_attr(test, assert_instr(nop))]
9996#[cfg_attr(
9997    not(target_arch = "arm"),
9998    stable(feature = "neon_intrinsics", since = "1.59.0")
9999)]
10000#[cfg_attr(
10001    target_arch = "arm",
10002    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10003)]
10004pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t {
10005    simd_shuffle!(low, high, [0, 1, 2, 3])
10006}
10007
10008/// Vector combine
10009#[inline]
10010#[target_feature(enable = "neon")]
10011#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10012#[cfg_attr(test, assert_instr(nop))]
10013#[cfg_attr(
10014    not(target_arch = "arm"),
10015    stable(feature = "neon_intrinsics", since = "1.59.0")
10016)]
10017#[cfg_attr(
10018    target_arch = "arm",
10019    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10020)]
10021pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t {
10022    simd_shuffle!(low, high, [0, 1])
10023}
10024
10025/// Vector combine
10026#[inline]
10027#[target_feature(enable = "neon")]
10028#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10029#[cfg_attr(test, assert_instr(nop))]
10030#[cfg_attr(
10031    not(target_arch = "arm"),
10032    stable(feature = "neon_intrinsics", since = "1.59.0")
10033)]
10034#[cfg_attr(
10035    target_arch = "arm",
10036    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10037)]
10038pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t {
10039    simd_shuffle!(
10040        low,
10041        high,
10042        [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
10043    )
10044}
10045
10046/// Vector combine
10047#[inline]
10048#[target_feature(enable = "neon")]
10049#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10050#[cfg_attr(test, assert_instr(nop))]
10051#[cfg_attr(
10052    not(target_arch = "arm"),
10053    stable(feature = "neon_intrinsics", since = "1.59.0")
10054)]
10055#[cfg_attr(
10056    target_arch = "arm",
10057    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10058)]
10059pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t {
10060    simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
10061}
10062
10063/// Vector combine
10064#[inline]
10065#[target_feature(enable = "neon")]
10066#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10067#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
10068#[cfg_attr(
10069    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10070    assert_instr(mov)
10071)]
10072#[cfg_attr(
10073    not(target_arch = "arm"),
10074    stable(feature = "neon_intrinsics", since = "1.59.0")
10075)]
10076#[cfg_attr(
10077    target_arch = "arm",
10078    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10079)]
10080pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t {
10081    simd_shuffle!(low, high, [0, 1, 2, 3])
10082}
10083
10084/// Vector combine
10085#[inline]
10086#[target_feature(enable = "neon")]
10087#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10088#[cfg_attr(test, assert_instr(nop))]
10089#[cfg_attr(
10090    not(target_arch = "arm"),
10091    stable(feature = "neon_intrinsics", since = "1.59.0")
10092)]
10093#[cfg_attr(
10094    target_arch = "arm",
10095    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10096)]
10097pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t {
10098    simd_shuffle!(low, high, [0, 1])
10099}
10100
10101/// Vector combine
10102#[inline]
10103#[target_feature(enable = "neon")]
10104#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10105#[cfg_attr(test, assert_instr(nop))]
10106#[cfg_attr(
10107    not(target_arch = "arm"),
10108    stable(feature = "neon_intrinsics", since = "1.59.0")
10109)]
10110#[cfg_attr(
10111    target_arch = "arm",
10112    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
10113)]
10114pub unsafe fn vcombine_p64(low: poly64x1_t, high: poly64x1_t) -> poly64x2_t {
10115    simd_shuffle!(low, high, [0, 1])
10116}
10117
10118#[cfg(test)]
10119mod tests {
10120    use super::*;
10121    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
10122    use crate::core_arch::aarch64::*;
10123    #[cfg(target_arch = "arm")]
10124    use crate::core_arch::arm::*;
10125    use crate::core_arch::arm_shared::test_support::*;
10126    use crate::core_arch::simd::*;
10127    use std::{mem::transmute, vec::Vec};
10128    use stdarch_test::simd_test;
10129
10130    #[simd_test(enable = "neon")]
10131    unsafe fn test_vld1_lane_s8() {
10132        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10133        let elem: i8 = 42;
10134        let e = i8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10135        let r: i8x8 = transmute(vld1_lane_s8::<7>(&elem, transmute(a)));
10136        assert_eq!(r, e)
10137    }
10138
10139    #[simd_test(enable = "neon")]
10140    unsafe fn test_vld1q_lane_s8() {
10141        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10142        let elem: i8 = 42;
10143        let e = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
10144        let r: i8x16 = transmute(vld1q_lane_s8::<15>(&elem, transmute(a)));
10145        assert_eq!(r, e)
10146    }
10147
10148    #[simd_test(enable = "neon")]
10149    unsafe fn test_vld1_lane_s16() {
10150        let a = i16x4::new(0, 1, 2, 3);
10151        let elem: i16 = 42;
10152        let e = i16x4::new(0, 1, 2, 42);
10153        let r: i16x4 = transmute(vld1_lane_s16::<3>(&elem, transmute(a)));
10154        assert_eq!(r, e)
10155    }
10156
10157    #[simd_test(enable = "neon")]
10158    unsafe fn test_vld1q_lane_s16() {
10159        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10160        let elem: i16 = 42;
10161        let e = i16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10162        let r: i16x8 = transmute(vld1q_lane_s16::<7>(&elem, transmute(a)));
10163        assert_eq!(r, e)
10164    }
10165
10166    #[simd_test(enable = "neon")]
10167    unsafe fn test_vld1_lane_s32() {
10168        let a = i32x2::new(0, 1);
10169        let elem: i32 = 42;
10170        let e = i32x2::new(0, 42);
10171        let r: i32x2 = transmute(vld1_lane_s32::<1>(&elem, transmute(a)));
10172        assert_eq!(r, e)
10173    }
10174
10175    #[simd_test(enable = "neon")]
10176    unsafe fn test_vld1q_lane_s32() {
10177        let a = i32x4::new(0, 1, 2, 3);
10178        let elem: i32 = 42;
10179        let e = i32x4::new(0, 1, 2, 42);
10180        let r: i32x4 = transmute(vld1q_lane_s32::<3>(&elem, transmute(a)));
10181        assert_eq!(r, e)
10182    }
10183
10184    #[simd_test(enable = "neon")]
10185    unsafe fn test_vld1_lane_s64() {
10186        let a = i64x1::new(0);
10187        let elem: i64 = 42;
10188        let e = i64x1::new(42);
10189        let r: i64x1 = transmute(vld1_lane_s64::<0>(&elem, transmute(a)));
10190        assert_eq!(r, e)
10191    }
10192
10193    #[simd_test(enable = "neon")]
10194    unsafe fn test_vld1q_lane_s64() {
10195        let a = i64x2::new(0, 1);
10196        let elem: i64 = 42;
10197        let e = i64x2::new(0, 42);
10198        let r: i64x2 = transmute(vld1q_lane_s64::<1>(&elem, transmute(a)));
10199        assert_eq!(r, e)
10200    }
10201
10202    #[simd_test(enable = "neon")]
10203    unsafe fn test_vld1_lane_u8() {
10204        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10205        let elem: u8 = 42;
10206        let e = u8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10207        let r: u8x8 = transmute(vld1_lane_u8::<7>(&elem, transmute(a)));
10208        assert_eq!(r, e)
10209    }
10210
10211    #[simd_test(enable = "neon")]
10212    unsafe fn test_vld1q_lane_u8() {
10213        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10214        let elem: u8 = 42;
10215        let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
10216        let r: u8x16 = transmute(vld1q_lane_u8::<15>(&elem, transmute(a)));
10217        assert_eq!(r, e)
10218    }
10219
10220    #[simd_test(enable = "neon")]
10221    unsafe fn test_vld1_lane_u16() {
10222        let a = u16x4::new(0, 1, 2, 3);
10223        let elem: u16 = 42;
10224        let e = u16x4::new(0, 1, 2, 42);
10225        let r: u16x4 = transmute(vld1_lane_u16::<3>(&elem, transmute(a)));
10226        assert_eq!(r, e)
10227    }
10228
10229    #[simd_test(enable = "neon")]
10230    unsafe fn test_vld1q_lane_u16() {
10231        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10232        let elem: u16 = 42;
10233        let e = u16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10234        let r: u16x8 = transmute(vld1q_lane_u16::<7>(&elem, transmute(a)));
10235        assert_eq!(r, e)
10236    }
10237
10238    #[simd_test(enable = "neon")]
10239    unsafe fn test_vld1_lane_u32() {
10240        let a = u32x2::new(0, 1);
10241        let elem: u32 = 42;
10242        let e = u32x2::new(0, 42);
10243        let r: u32x2 = transmute(vld1_lane_u32::<1>(&elem, transmute(a)));
10244        assert_eq!(r, e)
10245    }
10246
10247    #[simd_test(enable = "neon")]
10248    unsafe fn test_vld1q_lane_u32() {
10249        let a = u32x4::new(0, 1, 2, 3);
10250        let elem: u32 = 42;
10251        let e = u32x4::new(0, 1, 2, 42);
10252        let r: u32x4 = transmute(vld1q_lane_u32::<3>(&elem, transmute(a)));
10253        assert_eq!(r, e)
10254    }
10255
10256    #[simd_test(enable = "neon")]
10257    unsafe fn test_vld1_lane_u64() {
10258        let a = u64x1::new(0);
10259        let elem: u64 = 42;
10260        let e = u64x1::new(42);
10261        let r: u64x1 = transmute(vld1_lane_u64::<0>(&elem, transmute(a)));
10262        assert_eq!(r, e)
10263    }
10264
10265    #[simd_test(enable = "neon")]
10266    unsafe fn test_vld1q_lane_u64() {
10267        let a = u64x2::new(0, 1);
10268        let elem: u64 = 42;
10269        let e = u64x2::new(0, 42);
10270        let r: u64x2 = transmute(vld1q_lane_u64::<1>(&elem, transmute(a)));
10271        assert_eq!(r, e)
10272    }
10273
10274    #[simd_test(enable = "neon")]
10275    unsafe fn test_vld1_lane_p8() {
10276        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10277        let elem: p8 = 42;
10278        let e = u8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10279        let r: u8x8 = transmute(vld1_lane_p8::<7>(&elem, transmute(a)));
10280        assert_eq!(r, e)
10281    }
10282
10283    #[simd_test(enable = "neon")]
10284    unsafe fn test_vld1q_lane_p8() {
10285        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10286        let elem: p8 = 42;
10287        let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
10288        let r: u8x16 = transmute(vld1q_lane_p8::<15>(&elem, transmute(a)));
10289        assert_eq!(r, e)
10290    }
10291
10292    #[simd_test(enable = "neon")]
10293    unsafe fn test_vld1_lane_p16() {
10294        let a = u16x4::new(0, 1, 2, 3);
10295        let elem: p16 = 42;
10296        let e = u16x4::new(0, 1, 2, 42);
10297        let r: u16x4 = transmute(vld1_lane_p16::<3>(&elem, transmute(a)));
10298        assert_eq!(r, e)
10299    }
10300
10301    #[simd_test(enable = "neon")]
10302    unsafe fn test_vld1q_lane_p16() {
10303        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10304        let elem: p16 = 42;
10305        let e = u16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
10306        let r: u16x8 = transmute(vld1q_lane_p16::<7>(&elem, transmute(a)));
10307        assert_eq!(r, e)
10308    }
10309
10310    #[simd_test(enable = "neon,aes")]
10311    unsafe fn test_vld1_lane_p64() {
10312        let a = u64x1::new(0);
10313        let elem: u64 = 42;
10314        let e = u64x1::new(42);
10315        let r: u64x1 = transmute(vld1_lane_p64::<0>(&elem, transmute(a)));
10316        assert_eq!(r, e)
10317    }
10318
10319    #[simd_test(enable = "neon,aes")]
10320    unsafe fn test_vld1q_lane_p64() {
10321        let a = u64x2::new(0, 1);
10322        let elem: u64 = 42;
10323        let e = u64x2::new(0, 42);
10324        let r: u64x2 = transmute(vld1q_lane_p64::<1>(&elem, transmute(a)));
10325        assert_eq!(r, e)
10326    }
10327
10328    #[simd_test(enable = "neon")]
10329    unsafe fn test_vld1_lane_f32() {
10330        let a = f32x2::new(0., 1.);
10331        let elem: f32 = 42.;
10332        let e = f32x2::new(0., 42.);
10333        let r: f32x2 = transmute(vld1_lane_f32::<1>(&elem, transmute(a)));
10334        assert_eq!(r, e)
10335    }
10336
10337    #[simd_test(enable = "neon")]
10338    unsafe fn test_vld1q_lane_f32() {
10339        let a = f32x4::new(0., 1., 2., 3.);
10340        let elem: f32 = 42.;
10341        let e = f32x4::new(0., 1., 2., 42.);
10342        let r: f32x4 = transmute(vld1q_lane_f32::<3>(&elem, transmute(a)));
10343        assert_eq!(r, e)
10344    }
10345
10346    #[simd_test(enable = "neon")]
10347    unsafe fn test_vld1_dup_s8() {
10348        let elem: i8 = 42;
10349        let e = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10350        let r: i8x8 = transmute(vld1_dup_s8(&elem));
10351        assert_eq!(r, e)
10352    }
10353
10354    #[simd_test(enable = "neon")]
10355    unsafe fn test_vld1q_dup_s8() {
10356        let elem: i8 = 42;
10357        let e = i8x16::new(
10358            42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
10359        );
10360        let r: i8x16 = transmute(vld1q_dup_s8(&elem));
10361        assert_eq!(r, e)
10362    }
10363
10364    #[simd_test(enable = "neon")]
10365    unsafe fn test_vld1_dup_s16() {
10366        let elem: i16 = 42;
10367        let e = i16x4::new(42, 42, 42, 42);
10368        let r: i16x4 = transmute(vld1_dup_s16(&elem));
10369        assert_eq!(r, e)
10370    }
10371
10372    #[simd_test(enable = "neon")]
10373    unsafe fn test_vld1q_dup_s16() {
10374        let elem: i16 = 42;
10375        let e = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10376        let r: i16x8 = transmute(vld1q_dup_s16(&elem));
10377        assert_eq!(r, e)
10378    }
10379
10380    #[simd_test(enable = "neon")]
10381    unsafe fn test_vld1_dup_s32() {
10382        let elem: i32 = 42;
10383        let e = i32x2::new(42, 42);
10384        let r: i32x2 = transmute(vld1_dup_s32(&elem));
10385        assert_eq!(r, e)
10386    }
10387
10388    #[simd_test(enable = "neon")]
10389    unsafe fn test_vld1q_dup_s32() {
10390        let elem: i32 = 42;
10391        let e = i32x4::new(42, 42, 42, 42);
10392        let r: i32x4 = transmute(vld1q_dup_s32(&elem));
10393        assert_eq!(r, e)
10394    }
10395
10396    #[simd_test(enable = "neon")]
10397    unsafe fn test_vld1_dup_s64() {
10398        let elem: i64 = 42;
10399        let e = i64x1::new(42);
10400        let r: i64x1 = transmute(vld1_dup_s64(&elem));
10401        assert_eq!(r, e)
10402    }
10403
10404    #[simd_test(enable = "neon")]
10405    unsafe fn test_vld1q_dup_s64() {
10406        let elem: i64 = 42;
10407        let e = i64x2::new(42, 42);
10408        let r: i64x2 = transmute(vld1q_dup_s64(&elem));
10409        assert_eq!(r, e)
10410    }
10411
10412    #[simd_test(enable = "neon")]
10413    unsafe fn test_vld1_dup_u8() {
10414        let elem: u8 = 42;
10415        let e = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10416        let r: u8x8 = transmute(vld1_dup_u8(&elem));
10417        assert_eq!(r, e)
10418    }
10419
10420    #[simd_test(enable = "neon")]
10421    unsafe fn test_vld1q_dup_u8() {
10422        let elem: u8 = 42;
10423        let e = u8x16::new(
10424            42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
10425        );
10426        let r: u8x16 = transmute(vld1q_dup_u8(&elem));
10427        assert_eq!(r, e)
10428    }
10429
10430    #[simd_test(enable = "neon")]
10431    unsafe fn test_vld1_dup_u16() {
10432        let elem: u16 = 42;
10433        let e = u16x4::new(42, 42, 42, 42);
10434        let r: u16x4 = transmute(vld1_dup_u16(&elem));
10435        assert_eq!(r, e)
10436    }
10437
10438    #[simd_test(enable = "neon")]
10439    unsafe fn test_vld1q_dup_u16() {
10440        let elem: u16 = 42;
10441        let e = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10442        let r: u16x8 = transmute(vld1q_dup_u16(&elem));
10443        assert_eq!(r, e)
10444    }
10445
10446    #[simd_test(enable = "neon")]
10447    unsafe fn test_vld1_dup_u32() {
10448        let elem: u32 = 42;
10449        let e = u32x2::new(42, 42);
10450        let r: u32x2 = transmute(vld1_dup_u32(&elem));
10451        assert_eq!(r, e)
10452    }
10453
10454    #[simd_test(enable = "neon")]
10455    unsafe fn test_vld1q_dup_u32() {
10456        let elem: u32 = 42;
10457        let e = u32x4::new(42, 42, 42, 42);
10458        let r: u32x4 = transmute(vld1q_dup_u32(&elem));
10459        assert_eq!(r, e)
10460    }
10461
10462    #[simd_test(enable = "neon")]
10463    unsafe fn test_vld1_dup_u64() {
10464        let elem: u64 = 42;
10465        let e = u64x1::new(42);
10466        let r: u64x1 = transmute(vld1_dup_u64(&elem));
10467        assert_eq!(r, e)
10468    }
10469
10470    #[simd_test(enable = "neon")]
10471    unsafe fn test_vld1q_dup_u64() {
10472        let elem: u64 = 42;
10473        let e = u64x2::new(42, 42);
10474        let r: u64x2 = transmute(vld1q_dup_u64(&elem));
10475        assert_eq!(r, e)
10476    }
10477
10478    #[simd_test(enable = "neon")]
10479    unsafe fn test_vld1_dup_p8() {
10480        let elem: p8 = 42;
10481        let e = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10482        let r: u8x8 = transmute(vld1_dup_p8(&elem));
10483        assert_eq!(r, e)
10484    }
10485
10486    #[simd_test(enable = "neon")]
10487    unsafe fn test_vld1q_dup_p8() {
10488        let elem: p8 = 42;
10489        let e = u8x16::new(
10490            42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
10491        );
10492        let r: u8x16 = transmute(vld1q_dup_p8(&elem));
10493        assert_eq!(r, e)
10494    }
10495
10496    #[simd_test(enable = "neon")]
10497    unsafe fn test_vld1_dup_p16() {
10498        let elem: p16 = 42;
10499        let e = u16x4::new(42, 42, 42, 42);
10500        let r: u16x4 = transmute(vld1_dup_p16(&elem));
10501        assert_eq!(r, e)
10502    }
10503
10504    #[simd_test(enable = "neon")]
10505    unsafe fn test_vld1q_dup_p16() {
10506        let elem: p16 = 42;
10507        let e = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
10508        let r: u16x8 = transmute(vld1q_dup_p16(&elem));
10509        assert_eq!(r, e)
10510    }
10511
10512    #[simd_test(enable = "neon,aes")]
10513    unsafe fn test_vld1_dup_p64() {
10514        let elem: u64 = 42;
10515        let e = u64x1::new(42);
10516        let r: u64x1 = transmute(vld1_dup_p64(&elem));
10517        assert_eq!(r, e)
10518    }
10519
10520    #[simd_test(enable = "neon,aes")]
10521    unsafe fn test_vld1q_dup_p64() {
10522        let elem: u64 = 42;
10523        let e = u64x2::new(42, 42);
10524        let r: u64x2 = transmute(vld1q_dup_p64(&elem));
10525        assert_eq!(r, e)
10526    }
10527
10528    #[simd_test(enable = "neon")]
10529    unsafe fn test_vld1_dup_f32() {
10530        let elem: f32 = 42.;
10531        let e = f32x2::new(42., 42.);
10532        let r: f32x2 = transmute(vld1_dup_f32(&elem));
10533        assert_eq!(r, e)
10534    }
10535
10536    #[simd_test(enable = "neon")]
10537    unsafe fn test_vld1q_dup_f32() {
10538        let elem: f32 = 42.;
10539        let e = f32x4::new(42., 42., 42., 42.);
10540        let r: f32x4 = transmute(vld1q_dup_f32(&elem));
10541        assert_eq!(r, e)
10542    }
10543
10544    #[simd_test(enable = "neon")]
10545    unsafe fn test_vget_lane_u8() {
10546        let v = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10547        let r = vget_lane_u8::<1>(transmute(v));
10548        assert_eq!(r, 2);
10549    }
10550
10551    #[simd_test(enable = "neon")]
10552    unsafe fn test_vgetq_lane_u32() {
10553        let v = i32x4::new(1, 2, 3, 4);
10554        let r = vgetq_lane_u32::<1>(transmute(v));
10555        assert_eq!(r, 2);
10556    }
10557
10558    #[simd_test(enable = "neon")]
10559    unsafe fn test_vgetq_lane_s32() {
10560        let v = i32x4::new(1, 2, 3, 4);
10561        let r = vgetq_lane_s32::<1>(transmute(v));
10562        assert_eq!(r, 2);
10563    }
10564
10565    #[simd_test(enable = "neon")]
10566    unsafe fn test_vget_lane_u64() {
10567        let v: u64 = 1;
10568        let r = vget_lane_u64::<0>(transmute(v));
10569        assert_eq!(r, 1);
10570    }
10571
10572    #[simd_test(enable = "neon")]
10573    unsafe fn test_vgetq_lane_u16() {
10574        let v = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10575        let r = vgetq_lane_u16::<1>(transmute(v));
10576        assert_eq!(r, 2);
10577    }
10578
10579    #[simd_test(enable = "neon")]
10580    unsafe fn test_vget_lane_s8() {
10581        let v = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10582        let r = vget_lane_s8::<2>(transmute(v));
10583        assert_eq!(r, 2);
10584        let r = vget_lane_s8::<4>(transmute(v));
10585        assert_eq!(r, 4);
10586        let r = vget_lane_s8::<5>(transmute(v));
10587        assert_eq!(r, 5);
10588    }
10589    #[simd_test(enable = "neon")]
10590    unsafe fn test_vget_lane_p8() {
10591        let v = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10592        let r = vget_lane_p8::<2>(transmute(v));
10593        assert_eq!(r, 2);
10594        let r = vget_lane_p8::<3>(transmute(v));
10595        assert_eq!(r, 3);
10596        let r = vget_lane_p8::<5>(transmute(v));
10597        assert_eq!(r, 5);
10598    }
10599
10600    #[simd_test(enable = "neon")]
10601    unsafe fn test_vget_lane_p16() {
10602        let v = u16x4::new(0, 1, 2, 3);
10603        let r = vget_lane_p16::<2>(transmute(v));
10604        assert_eq!(r, 2);
10605        let r = vget_lane_p16::<3>(transmute(v));
10606        assert_eq!(r, 3);
10607        let r = vget_lane_p16::<0>(transmute(v));
10608        assert_eq!(r, 0);
10609        let r = vget_lane_p16::<1>(transmute(v));
10610        assert_eq!(r, 1);
10611    }
10612
10613    #[simd_test(enable = "neon")]
10614    unsafe fn test_vget_lane_s16() {
10615        let v = i16x4::new(0, 1, 2, 3);
10616        let r = vget_lane_s16::<2>(transmute(v));
10617        assert_eq!(r, 2);
10618        let r = vget_lane_s16::<3>(transmute(v));
10619        assert_eq!(r, 3);
10620        let r = vget_lane_s16::<0>(transmute(v));
10621        assert_eq!(r, 0);
10622        let r = vget_lane_s16::<1>(transmute(v));
10623        assert_eq!(r, 1);
10624    }
10625
10626    #[simd_test(enable = "neon")]
10627    unsafe fn test_vget_lane_u16() {
10628        let v = u16x4::new(0, 1, 2, 3);
10629        let r = vget_lane_u16::<2>(transmute(v));
10630        assert_eq!(r, 2);
10631        let r = vget_lane_u16::<3>(transmute(v));
10632        assert_eq!(r, 3);
10633        let r = vget_lane_u16::<0>(transmute(v));
10634        assert_eq!(r, 0);
10635        let r = vget_lane_u16::<1>(transmute(v));
10636        assert_eq!(r, 1);
10637    }
10638    #[simd_test(enable = "neon")]
10639    unsafe fn test_vget_lane_f32() {
10640        let v = f32x2::new(0.0, 1.0);
10641        let r = vget_lane_f32::<1>(transmute(v));
10642        assert_eq!(r, 1.0);
10643        let r = vget_lane_f32::<0>(transmute(v));
10644        assert_eq!(r, 0.0);
10645    }
10646
10647    #[simd_test(enable = "neon")]
10648    unsafe fn test_vget_lane_s32() {
10649        let v = i32x2::new(0, 1);
10650        let r = vget_lane_s32::<1>(transmute(v));
10651        assert_eq!(r, 1);
10652        let r = vget_lane_s32::<0>(transmute(v));
10653        assert_eq!(r, 0);
10654    }
10655
10656    #[simd_test(enable = "neon")]
10657    unsafe fn test_vget_lane_u32() {
10658        let v = u32x2::new(0, 1);
10659        let r = vget_lane_u32::<1>(transmute(v));
10660        assert_eq!(r, 1);
10661        let r = vget_lane_u32::<0>(transmute(v));
10662        assert_eq!(r, 0);
10663    }
10664
10665    #[simd_test(enable = "neon")]
10666    unsafe fn test_vget_lane_s64() {
10667        let v = i64x1::new(1);
10668        let r = vget_lane_s64::<0>(transmute(v));
10669        assert_eq!(r, 1);
10670    }
10671
10672    #[simd_test(enable = "neon")]
10673    unsafe fn test_vget_lane_p64() {
10674        let v = u64x1::new(1);
10675        let r = vget_lane_p64::<0>(transmute(v));
10676        assert_eq!(r, 1);
10677    }
10678
10679    #[simd_test(enable = "neon")]
10680    unsafe fn test_vgetq_lane_s8() {
10681        let v = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10682        let r = vgetq_lane_s8::<7>(transmute(v));
10683        assert_eq!(r, 7);
10684        let r = vgetq_lane_s8::<13>(transmute(v));
10685        assert_eq!(r, 13);
10686        let r = vgetq_lane_s8::<3>(transmute(v));
10687        assert_eq!(r, 3);
10688        let r = vgetq_lane_s8::<0>(transmute(v));
10689        assert_eq!(r, 0);
10690    }
10691
10692    #[simd_test(enable = "neon")]
10693    unsafe fn test_vgetq_lane_p8() {
10694        let v = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10695        let r = vgetq_lane_p8::<7>(transmute(v));
10696        assert_eq!(r, 7);
10697        let r = vgetq_lane_p8::<13>(transmute(v));
10698        assert_eq!(r, 13);
10699        let r = vgetq_lane_p8::<3>(transmute(v));
10700        assert_eq!(r, 3);
10701        let r = vgetq_lane_p8::<0>(transmute(v));
10702        assert_eq!(r, 0);
10703    }
10704
10705    #[simd_test(enable = "neon")]
10706    unsafe fn test_vgetq_lane_u8() {
10707        let v = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10708        let r = vgetq_lane_u8::<7>(transmute(v));
10709        assert_eq!(r, 7);
10710        let r = vgetq_lane_u8::<13>(transmute(v));
10711        assert_eq!(r, 13);
10712        let r = vgetq_lane_u8::<3>(transmute(v));
10713        assert_eq!(r, 3);
10714        let r = vgetq_lane_u8::<0>(transmute(v));
10715        assert_eq!(r, 0);
10716    }
10717
10718    #[simd_test(enable = "neon")]
10719    unsafe fn test_vgetq_lane_s16() {
10720        let v = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10721        let r = vgetq_lane_s16::<3>(transmute(v));
10722        assert_eq!(r, 3);
10723        let r = vgetq_lane_s16::<6>(transmute(v));
10724        assert_eq!(r, 6);
10725        let r = vgetq_lane_s16::<0>(transmute(v));
10726        assert_eq!(r, 0);
10727    }
10728
10729    #[simd_test(enable = "neon")]
10730    unsafe fn test_vgetq_lane_p16() {
10731        let v = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10732        let r = vgetq_lane_p16::<3>(transmute(v));
10733        assert_eq!(r, 3);
10734        let r = vgetq_lane_p16::<7>(transmute(v));
10735        assert_eq!(r, 7);
10736        let r = vgetq_lane_p16::<1>(transmute(v));
10737        assert_eq!(r, 1);
10738    }
10739    #[simd_test(enable = "neon")]
10740    unsafe fn test_vgetq_lane_f32() {
10741        let v = f32x4::new(0.0, 1.0, 2.0, 3.0);
10742        let r = vgetq_lane_f32::<3>(transmute(v));
10743        assert_eq!(r, 3.0);
10744        let r = vgetq_lane_f32::<0>(transmute(v));
10745        assert_eq!(r, 0.0);
10746        let r = vgetq_lane_f32::<2>(transmute(v));
10747        assert_eq!(r, 2.0);
10748        let r = vgetq_lane_f32::<1>(transmute(v));
10749        assert_eq!(r, 1.0);
10750    }
10751
10752    #[simd_test(enable = "neon")]
10753    unsafe fn test_vgetq_lane_s64() {
10754        let v = i64x2::new(0, 1);
10755        let r = vgetq_lane_s64::<1>(transmute(v));
10756        assert_eq!(r, 1);
10757        let r = vgetq_lane_s64::<0>(transmute(v));
10758        assert_eq!(r, 0);
10759    }
10760
10761    #[simd_test(enable = "neon")]
10762    unsafe fn test_vgetq_lane_p64() {
10763        let v = u64x2::new(0, 1);
10764        let r = vgetq_lane_p64::<1>(transmute(v));
10765        assert_eq!(r, 1);
10766        let r = vgetq_lane_p64::<0>(transmute(v));
10767        assert_eq!(r, 0);
10768    }
10769
10770    #[simd_test(enable = "neon")]
10771    unsafe fn test_vext_s64() {
10772        let a: i64x1 = i64x1::new(0);
10773        let b: i64x1 = i64x1::new(1);
10774        let e: i64x1 = i64x1::new(0);
10775        let r: i64x1 = transmute(vext_s64::<0>(transmute(a), transmute(b)));
10776        assert_eq!(r, e);
10777    }
10778
10779    #[simd_test(enable = "neon")]
10780    unsafe fn test_vext_u64() {
10781        let a: u64x1 = u64x1::new(0);
10782        let b: u64x1 = u64x1::new(1);
10783        let e: u64x1 = u64x1::new(0);
10784        let r: u64x1 = transmute(vext_u64::<0>(transmute(a), transmute(b)));
10785        assert_eq!(r, e);
10786    }
10787
10788    #[simd_test(enable = "neon")]
10789    unsafe fn test_vget_high_s8() {
10790        let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10791        let e = i8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
10792        let r: i8x8 = transmute(vget_high_s8(transmute(a)));
10793        assert_eq!(r, e);
10794    }
10795
10796    #[simd_test(enable = "neon")]
10797    unsafe fn test_vget_high_s16() {
10798        let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10799        let e = i16x4::new(5, 6, 7, 8);
10800        let r: i16x4 = transmute(vget_high_s16(transmute(a)));
10801        assert_eq!(r, e);
10802    }
10803
10804    #[simd_test(enable = "neon")]
10805    unsafe fn test_vget_high_s32() {
10806        let a = i32x4::new(1, 2, 3, 4);
10807        let e = i32x2::new(3, 4);
10808        let r: i32x2 = transmute(vget_high_s32(transmute(a)));
10809        assert_eq!(r, e);
10810    }
10811
10812    #[simd_test(enable = "neon")]
10813    unsafe fn test_vget_high_s64() {
10814        let a = i64x2::new(1, 2);
10815        let e = i64x1::new(2);
10816        let r: i64x1 = transmute(vget_high_s64(transmute(a)));
10817        assert_eq!(r, e);
10818    }
10819
10820    #[simd_test(enable = "neon")]
10821    unsafe fn test_vget_high_u8() {
10822        let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10823        let e = u8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
10824        let r: u8x8 = transmute(vget_high_u8(transmute(a)));
10825        assert_eq!(r, e);
10826    }
10827
10828    #[simd_test(enable = "neon")]
10829    unsafe fn test_vget_high_u16() {
10830        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10831        let e = u16x4::new(5, 6, 7, 8);
10832        let r: u16x4 = transmute(vget_high_u16(transmute(a)));
10833        assert_eq!(r, e);
10834    }
10835
10836    #[simd_test(enable = "neon")]
10837    unsafe fn test_vget_high_u32() {
10838        let a = u32x4::new(1, 2, 3, 4);
10839        let e = u32x2::new(3, 4);
10840        let r: u32x2 = transmute(vget_high_u32(transmute(a)));
10841        assert_eq!(r, e);
10842    }
10843
10844    #[simd_test(enable = "neon")]
10845    unsafe fn test_vget_high_u64() {
10846        let a = u64x2::new(1, 2);
10847        let e = u64x1::new(2);
10848        let r: u64x1 = transmute(vget_high_u64(transmute(a)));
10849        assert_eq!(r, e);
10850    }
10851
10852    #[simd_test(enable = "neon")]
10853    unsafe fn test_vget_high_p8() {
10854        let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10855        let e = u8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
10856        let r: u8x8 = transmute(vget_high_p8(transmute(a)));
10857        assert_eq!(r, e);
10858    }
10859
10860    #[simd_test(enable = "neon")]
10861    unsafe fn test_vget_high_p16() {
10862        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10863        let e = u16x4::new(5, 6, 7, 8);
10864        let r: u16x4 = transmute(vget_high_p16(transmute(a)));
10865        assert_eq!(r, e);
10866    }
10867
10868    #[simd_test(enable = "neon")]
10869    unsafe fn test_vget_high_f32() {
10870        let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
10871        let e = f32x2::new(3.0, 4.0);
10872        let r: f32x2 = transmute(vget_high_f32(transmute(a)));
10873        assert_eq!(r, e);
10874    }
10875
10876    #[simd_test(enable = "neon")]
10877    unsafe fn test_vget_low_s8() {
10878        let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10879        let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10880        let r: i8x8 = transmute(vget_low_s8(transmute(a)));
10881        assert_eq!(r, e);
10882    }
10883
10884    #[simd_test(enable = "neon")]
10885    unsafe fn test_vget_low_s16() {
10886        let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10887        let e = i16x4::new(1, 2, 3, 4);
10888        let r: i16x4 = transmute(vget_low_s16(transmute(a)));
10889        assert_eq!(r, e);
10890    }
10891
10892    #[simd_test(enable = "neon")]
10893    unsafe fn test_vget_low_s32() {
10894        let a = i32x4::new(1, 2, 3, 4);
10895        let e = i32x2::new(1, 2);
10896        let r: i32x2 = transmute(vget_low_s32(transmute(a)));
10897        assert_eq!(r, e);
10898    }
10899
10900    #[simd_test(enable = "neon")]
10901    unsafe fn test_vget_low_s64() {
10902        let a = i64x2::new(1, 2);
10903        let e = i64x1::new(1);
10904        let r: i64x1 = transmute(vget_low_s64(transmute(a)));
10905        assert_eq!(r, e);
10906    }
10907
10908    #[simd_test(enable = "neon")]
10909    unsafe fn test_vget_low_u8() {
10910        let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10911        let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10912        let r: u8x8 = transmute(vget_low_u8(transmute(a)));
10913        assert_eq!(r, e);
10914    }
10915
10916    #[simd_test(enable = "neon")]
10917    unsafe fn test_vget_low_u16() {
10918        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10919        let e = u16x4::new(1, 2, 3, 4);
10920        let r: u16x4 = transmute(vget_low_u16(transmute(a)));
10921        assert_eq!(r, e);
10922    }
10923
10924    #[simd_test(enable = "neon")]
10925    unsafe fn test_vget_low_u32() {
10926        let a = u32x4::new(1, 2, 3, 4);
10927        let e = u32x2::new(1, 2);
10928        let r: u32x2 = transmute(vget_low_u32(transmute(a)));
10929        assert_eq!(r, e);
10930    }
10931
10932    #[simd_test(enable = "neon")]
10933    unsafe fn test_vget_low_u64() {
10934        let a = u64x2::new(1, 2);
10935        let e = u64x1::new(1);
10936        let r: u64x1 = transmute(vget_low_u64(transmute(a)));
10937        assert_eq!(r, e);
10938    }
10939
10940    #[simd_test(enable = "neon")]
10941    unsafe fn test_vget_low_p8() {
10942        let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
10943        let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10944        let r: u8x8 = transmute(vget_low_p8(transmute(a)));
10945        assert_eq!(r, e);
10946    }
10947
10948    #[simd_test(enable = "neon")]
10949    unsafe fn test_vget_low_p16() {
10950        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10951        let e = u16x4::new(1, 2, 3, 4);
10952        let r: u16x4 = transmute(vget_low_p16(transmute(a)));
10953        assert_eq!(r, e);
10954    }
10955
10956    #[simd_test(enable = "neon")]
10957    unsafe fn test_vget_low_f32() {
10958        let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
10959        let e = f32x2::new(1.0, 2.0);
10960        let r: f32x2 = transmute(vget_low_f32(transmute(a)));
10961        assert_eq!(r, e);
10962    }
10963
10964    #[simd_test(enable = "neon")]
10965    unsafe fn test_vdupq_n_s8() {
10966        let v: i8 = 42;
10967        let e = i8x16::new(
10968            42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
10969        );
10970        let r: i8x16 = transmute(vdupq_n_s8(v));
10971        assert_eq!(r, e);
10972    }
10973
10974    #[simd_test(enable = "neon")]
10975    unsafe fn test_vdupq_n_s16() {
10976        let v: i16 = 64;
10977        let e = i16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
10978        let r: i16x8 = transmute(vdupq_n_s16(v));
10979        assert_eq!(r, e);
10980    }
10981
10982    #[simd_test(enable = "neon")]
10983    unsafe fn test_vdupq_n_s32() {
10984        let v: i32 = 64;
10985        let e = i32x4::new(64, 64, 64, 64);
10986        let r: i32x4 = transmute(vdupq_n_s32(v));
10987        assert_eq!(r, e);
10988    }
10989
10990    #[simd_test(enable = "neon")]
10991    unsafe fn test_vdupq_n_s64() {
10992        let v: i64 = 64;
10993        let e = i64x2::new(64, 64);
10994        let r: i64x2 = transmute(vdupq_n_s64(v));
10995        assert_eq!(r, e);
10996    }
10997
10998    #[simd_test(enable = "neon")]
10999    unsafe fn test_vdupq_n_u8() {
11000        let v: u8 = 64;
11001        let e = u8x16::new(
11002            64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
11003        );
11004        let r: u8x16 = transmute(vdupq_n_u8(v));
11005        assert_eq!(r, e);
11006    }
11007
11008    #[simd_test(enable = "neon")]
11009    unsafe fn test_vdupq_n_u16() {
11010        let v: u16 = 64;
11011        let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11012        let r: u16x8 = transmute(vdupq_n_u16(v));
11013        assert_eq!(r, e);
11014    }
11015
11016    #[simd_test(enable = "neon")]
11017    unsafe fn test_vdupq_n_u32() {
11018        let v: u32 = 64;
11019        let e = u32x4::new(64, 64, 64, 64);
11020        let r: u32x4 = transmute(vdupq_n_u32(v));
11021        assert_eq!(r, e);
11022    }
11023
11024    #[simd_test(enable = "neon")]
11025    unsafe fn test_vdupq_n_u64() {
11026        let v: u64 = 64;
11027        let e = u64x2::new(64, 64);
11028        let r: u64x2 = transmute(vdupq_n_u64(v));
11029        assert_eq!(r, e);
11030    }
11031
11032    #[simd_test(enable = "neon")]
11033    unsafe fn test_vdupq_n_p8() {
11034        let v: p8 = 64;
11035        let e = u8x16::new(
11036            64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
11037        );
11038        let r: u8x16 = transmute(vdupq_n_p8(v));
11039        assert_eq!(r, e);
11040    }
11041
11042    #[simd_test(enable = "neon")]
11043    unsafe fn test_vdupq_n_p16() {
11044        let v: p16 = 64;
11045        let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11046        let r: u16x8 = transmute(vdupq_n_p16(v));
11047        assert_eq!(r, e);
11048    }
11049
11050    #[simd_test(enable = "neon")]
11051    unsafe fn test_vdupq_n_f32() {
11052        let v: f32 = 64.0;
11053        let e = f32x4::new(64.0, 64.0, 64.0, 64.0);
11054        let r: f32x4 = transmute(vdupq_n_f32(v));
11055        assert_eq!(r, e);
11056    }
11057
11058    #[simd_test(enable = "neon")]
11059    unsafe fn test_vdup_n_s8() {
11060        let v: i8 = 64;
11061        let e = i8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11062        let r: i8x8 = transmute(vdup_n_s8(v));
11063        assert_eq!(r, e);
11064    }
11065
11066    #[simd_test(enable = "neon")]
11067    unsafe fn test_vdup_n_s16() {
11068        let v: i16 = 64;
11069        let e = i16x4::new(64, 64, 64, 64);
11070        let r: i16x4 = transmute(vdup_n_s16(v));
11071        assert_eq!(r, e);
11072    }
11073
11074    #[simd_test(enable = "neon")]
11075    unsafe fn test_vdup_n_s32() {
11076        let v: i32 = 64;
11077        let e = i32x2::new(64, 64);
11078        let r: i32x2 = transmute(vdup_n_s32(v));
11079        assert_eq!(r, e);
11080    }
11081
11082    #[simd_test(enable = "neon")]
11083    unsafe fn test_vdup_n_s64() {
11084        let v: i64 = 64;
11085        let e = i64x1::new(64);
11086        let r: i64x1 = transmute(vdup_n_s64(v));
11087        assert_eq!(r, e);
11088    }
11089
11090    #[simd_test(enable = "neon")]
11091    unsafe fn test_vdup_n_u8() {
11092        let v: u8 = 64;
11093        let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11094        let r: u8x8 = transmute(vdup_n_u8(v));
11095        assert_eq!(r, e);
11096    }
11097
11098    #[simd_test(enable = "neon")]
11099    unsafe fn test_vdup_n_u16() {
11100        let v: u16 = 64;
11101        let e = u16x4::new(64, 64, 64, 64);
11102        let r: u16x4 = transmute(vdup_n_u16(v));
11103        assert_eq!(r, e);
11104    }
11105
11106    #[simd_test(enable = "neon")]
11107    unsafe fn test_vdup_n_u32() {
11108        let v: u32 = 64;
11109        let e = u32x2::new(64, 64);
11110        let r: u32x2 = transmute(vdup_n_u32(v));
11111        assert_eq!(r, e);
11112    }
11113
11114    #[simd_test(enable = "neon")]
11115    unsafe fn test_vdup_n_u64() {
11116        let v: u64 = 64;
11117        let e = u64x1::new(64);
11118        let r: u64x1 = transmute(vdup_n_u64(v));
11119        assert_eq!(r, e);
11120    }
11121
11122    #[simd_test(enable = "neon")]
11123    unsafe fn test_vdup_n_p8() {
11124        let v: p8 = 64;
11125        let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11126        let r: u8x8 = transmute(vdup_n_p8(v));
11127        assert_eq!(r, e);
11128    }
11129
11130    #[simd_test(enable = "neon")]
11131    unsafe fn test_vdup_n_p16() {
11132        let v: p16 = 64;
11133        let e = u16x4::new(64, 64, 64, 64);
11134        let r: u16x4 = transmute(vdup_n_p16(v));
11135        assert_eq!(r, e);
11136    }
11137
11138    #[simd_test(enable = "neon")]
11139    unsafe fn test_vdup_n_f32() {
11140        let v: f32 = 64.0;
11141        let e = f32x2::new(64.0, 64.0);
11142        let r: f32x2 = transmute(vdup_n_f32(v));
11143        assert_eq!(r, e);
11144    }
11145
11146    #[simd_test(enable = "neon")]
11147    unsafe fn test_vldrq_p128() {
11148        let v: [p128; 2] = [1, 2];
11149        let e: p128 = 2;
11150        let r: p128 = vldrq_p128(v[1..].as_ptr());
11151        assert_eq!(r, e);
11152    }
11153
11154    #[simd_test(enable = "neon")]
11155    unsafe fn test_vstrq_p128() {
11156        let v: [p128; 2] = [1, 2];
11157        let e: p128 = 2;
11158        let mut r: p128 = 1;
11159        vstrq_p128(&mut r, v[1]);
11160        assert_eq!(r, e);
11161    }
11162
11163    #[simd_test(enable = "neon")]
11164    unsafe fn test_vmov_n_s8() {
11165        let v: i8 = 64;
11166        let e = i8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11167        let r: i8x8 = transmute(vmov_n_s8(v));
11168        assert_eq!(r, e);
11169    }
11170
11171    #[simd_test(enable = "neon")]
11172    unsafe fn test_vmov_n_s16() {
11173        let v: i16 = 64;
11174        let e = i16x4::new(64, 64, 64, 64);
11175        let r: i16x4 = transmute(vmov_n_s16(v));
11176        assert_eq!(r, e);
11177    }
11178
11179    #[simd_test(enable = "neon")]
11180    unsafe fn test_vmov_n_s32() {
11181        let v: i32 = 64;
11182        let e = i32x2::new(64, 64);
11183        let r: i32x2 = transmute(vmov_n_s32(v));
11184        assert_eq!(r, e);
11185    }
11186
11187    #[simd_test(enable = "neon")]
11188    unsafe fn test_vmov_n_s64() {
11189        let v: i64 = 64;
11190        let e = i64x1::new(64);
11191        let r: i64x1 = transmute(vmov_n_s64(v));
11192        assert_eq!(r, e);
11193    }
11194
11195    #[simd_test(enable = "neon")]
11196    unsafe fn test_vmov_n_u8() {
11197        let v: u8 = 64;
11198        let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11199        let r: u8x8 = transmute(vmov_n_u8(v));
11200        assert_eq!(r, e);
11201    }
11202
11203    #[simd_test(enable = "neon")]
11204    unsafe fn test_vmov_n_u16() {
11205        let v: u16 = 64;
11206        let e = u16x4::new(64, 64, 64, 64);
11207        let r: u16x4 = transmute(vmov_n_u16(v));
11208        assert_eq!(r, e);
11209    }
11210
11211    #[simd_test(enable = "neon")]
11212    unsafe fn test_vmov_n_u32() {
11213        let v: u32 = 64;
11214        let e = u32x2::new(64, 64);
11215        let r: u32x2 = transmute(vmov_n_u32(v));
11216        assert_eq!(r, e);
11217    }
11218
11219    #[simd_test(enable = "neon")]
11220    unsafe fn test_vmov_n_u64() {
11221        let v: u64 = 64;
11222        let e = u64x1::new(64);
11223        let r: u64x1 = transmute(vmov_n_u64(v));
11224        assert_eq!(r, e);
11225    }
11226
11227    #[simd_test(enable = "neon")]
11228    unsafe fn test_vmov_n_p8() {
11229        let v: p8 = 64;
11230        let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11231        let r: u8x8 = transmute(vmov_n_p8(v));
11232        assert_eq!(r, e);
11233    }
11234
11235    #[simd_test(enable = "neon")]
11236    unsafe fn test_vmov_n_p16() {
11237        let v: p16 = 64;
11238        let e = u16x4::new(64, 64, 64, 64);
11239        let r: u16x4 = transmute(vmov_n_p16(v));
11240        assert_eq!(r, e);
11241    }
11242
11243    #[simd_test(enable = "neon")]
11244    unsafe fn test_vmov_n_f32() {
11245        let v: f32 = 64.0;
11246        let e = f32x2::new(64.0, 64.0);
11247        let r: f32x2 = transmute(vmov_n_f32(v));
11248        assert_eq!(r, e);
11249    }
11250
11251    #[simd_test(enable = "neon")]
11252    unsafe fn test_vmovq_n_s8() {
11253        let v: i8 = 64;
11254        let e = i8x16::new(
11255            64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
11256        );
11257        let r: i8x16 = transmute(vmovq_n_s8(v));
11258        assert_eq!(r, e);
11259    }
11260
11261    #[simd_test(enable = "neon")]
11262    unsafe fn test_vmovq_n_s16() {
11263        let v: i16 = 64;
11264        let e = i16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11265        let r: i16x8 = transmute(vmovq_n_s16(v));
11266        assert_eq!(r, e);
11267    }
11268
11269    #[simd_test(enable = "neon")]
11270    unsafe fn test_vmovq_n_s32() {
11271        let v: i32 = 64;
11272        let e = i32x4::new(64, 64, 64, 64);
11273        let r: i32x4 = transmute(vmovq_n_s32(v));
11274        assert_eq!(r, e);
11275    }
11276
11277    #[simd_test(enable = "neon")]
11278    unsafe fn test_vmovq_n_s64() {
11279        let v: i64 = 64;
11280        let e = i64x2::new(64, 64);
11281        let r: i64x2 = transmute(vmovq_n_s64(v));
11282        assert_eq!(r, e);
11283    }
11284
11285    #[simd_test(enable = "neon")]
11286    unsafe fn test_vmovq_n_u8() {
11287        let v: u8 = 64;
11288        let e = u8x16::new(
11289            64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
11290        );
11291        let r: u8x16 = transmute(vmovq_n_u8(v));
11292        assert_eq!(r, e);
11293    }
11294
11295    #[simd_test(enable = "neon")]
11296    unsafe fn test_vmovq_n_u16() {
11297        let v: u16 = 64;
11298        let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11299        let r: u16x8 = transmute(vmovq_n_u16(v));
11300        assert_eq!(r, e);
11301    }
11302
11303    #[simd_test(enable = "neon")]
11304    unsafe fn test_vmovq_n_u32() {
11305        let v: u32 = 64;
11306        let e = u32x4::new(64, 64, 64, 64);
11307        let r: u32x4 = transmute(vmovq_n_u32(v));
11308        assert_eq!(r, e);
11309    }
11310
11311    #[simd_test(enable = "neon")]
11312    unsafe fn test_vmovq_n_u64() {
11313        let v: u64 = 64;
11314        let e = u64x2::new(64, 64);
11315        let r: u64x2 = transmute(vmovq_n_u64(v));
11316        assert_eq!(r, e);
11317    }
11318
11319    #[simd_test(enable = "neon")]
11320    unsafe fn test_vmovq_n_p8() {
11321        let v: p8 = 64;
11322        let e = u8x16::new(
11323            64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
11324        );
11325        let r: u8x16 = transmute(vmovq_n_p8(v));
11326        assert_eq!(r, e);
11327    }
11328
11329    #[simd_test(enable = "neon")]
11330    unsafe fn test_vmovq_n_p16() {
11331        let v: p16 = 64;
11332        let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
11333        let r: u16x8 = transmute(vmovq_n_p16(v));
11334        assert_eq!(r, e);
11335    }
11336
11337    #[simd_test(enable = "neon")]
11338    unsafe fn test_vmovq_n_f32() {
11339        let v: f32 = 64.0;
11340        let e = f32x4::new(64.0, 64.0, 64.0, 64.0);
11341        let r: f32x4 = transmute(vmovq_n_f32(v));
11342        assert_eq!(r, e);
11343    }
11344
11345    #[simd_test(enable = "neon")]
11346    unsafe fn test_vgetq_lane_u64() {
11347        let v = i64x2::new(1, 2);
11348        let r = vgetq_lane_u64::<1>(transmute(v));
11349        assert_eq!(r, 2);
11350    }
11351
11352    #[simd_test(enable = "neon")]
11353    unsafe fn test_vadd_s8() {
11354        test_ari_s8(
11355            |i, j| vadd_s8(i, j),
11356            |a: i8, b: i8| -> i8 { a.overflowing_add(b).0 },
11357        );
11358    }
11359    #[simd_test(enable = "neon")]
11360    unsafe fn test_vaddq_s8() {
11361        testq_ari_s8(
11362            |i, j| vaddq_s8(i, j),
11363            |a: i8, b: i8| -> i8 { a.overflowing_add(b).0 },
11364        );
11365    }
11366    #[simd_test(enable = "neon")]
11367    unsafe fn test_vadd_s16() {
11368        test_ari_s16(
11369            |i, j| vadd_s16(i, j),
11370            |a: i16, b: i16| -> i16 { a.overflowing_add(b).0 },
11371        );
11372    }
11373    #[simd_test(enable = "neon")]
11374    unsafe fn test_vaddq_s16() {
11375        testq_ari_s16(
11376            |i, j| vaddq_s16(i, j),
11377            |a: i16, b: i16| -> i16 { a.overflowing_add(b).0 },
11378        );
11379    }
11380    #[simd_test(enable = "neon")]
11381    unsafe fn test_vadd_s32() {
11382        test_ari_s32(
11383            |i, j| vadd_s32(i, j),
11384            |a: i32, b: i32| -> i32 { a.overflowing_add(b).0 },
11385        );
11386    }
11387    #[simd_test(enable = "neon")]
11388    unsafe fn test_vaddq_s32() {
11389        testq_ari_s32(
11390            |i, j| vaddq_s32(i, j),
11391            |a: i32, b: i32| -> i32 { a.overflowing_add(b).0 },
11392        );
11393    }
11394
11395    #[simd_test(enable = "neon")]
11396    unsafe fn test_vadd_u8() {
11397        test_ari_u8(
11398            |i, j| vadd_u8(i, j),
11399            |a: u8, b: u8| -> u8 { a.overflowing_add(b).0 },
11400        );
11401    }
11402    #[simd_test(enable = "neon")]
11403    unsafe fn test_vaddq_u8() {
11404        testq_ari_u8(
11405            |i, j| vaddq_u8(i, j),
11406            |a: u8, b: u8| -> u8 { a.overflowing_add(b).0 },
11407        );
11408    }
11409    #[simd_test(enable = "neon")]
11410    unsafe fn test_vadd_u16() {
11411        test_ari_u16(
11412            |i, j| vadd_u16(i, j),
11413            |a: u16, b: u16| -> u16 { a.overflowing_add(b).0 },
11414        );
11415    }
11416    #[simd_test(enable = "neon")]
11417    unsafe fn test_vaddq_u16() {
11418        testq_ari_u16(
11419            |i, j| vaddq_u16(i, j),
11420            |a: u16, b: u16| -> u16 { a.overflowing_add(b).0 },
11421        );
11422    }
11423    #[simd_test(enable = "neon")]
11424    unsafe fn test_vadd_u32() {
11425        test_ari_u32(
11426            |i, j| vadd_u32(i, j),
11427            |a: u32, b: u32| -> u32 { a.overflowing_add(b).0 },
11428        );
11429    }
11430    #[simd_test(enable = "neon")]
11431    unsafe fn test_vaddq_u32() {
11432        testq_ari_u32(
11433            |i, j| vaddq_u32(i, j),
11434            |a: u32, b: u32| -> u32 { a.overflowing_add(b).0 },
11435        );
11436    }
11437
11438    #[simd_test(enable = "neon")]
11439    unsafe fn test_vadd_f32() {
11440        test_ari_f32(|i, j| vadd_f32(i, j), |a: f32, b: f32| -> f32 { a + b });
11441    }
11442    #[simd_test(enable = "neon")]
11443    unsafe fn test_vaddq_f32() {
11444        testq_ari_f32(|i, j| vaddq_f32(i, j), |a: f32, b: f32| -> f32 { a + b });
11445    }
11446
11447    #[simd_test(enable = "neon")]
11448    unsafe fn test_vaddl_s8() {
11449        let v = i8::MAX;
11450        let a = i8x8::new(v, v, v, v, v, v, v, v);
11451        let v = 2 * (v as i16);
11452        let e = i16x8::new(v, v, v, v, v, v, v, v);
11453        let r: i16x8 = transmute(vaddl_s8(transmute(a), transmute(a)));
11454        assert_eq!(r, e);
11455    }
11456
11457    #[simd_test(enable = "neon")]
11458    unsafe fn test_vaddl_s16() {
11459        let v = i16::MAX;
11460        let a = i16x4::new(v, v, v, v);
11461        let v = 2 * (v as i32);
11462        let e = i32x4::new(v, v, v, v);
11463        let r: i32x4 = transmute(vaddl_s16(transmute(a), transmute(a)));
11464        assert_eq!(r, e);
11465    }
11466
11467    #[simd_test(enable = "neon")]
11468    unsafe fn test_vaddl_s32() {
11469        let v = i32::MAX;
11470        let a = i32x2::new(v, v);
11471        let v = 2 * (v as i64);
11472        let e = i64x2::new(v, v);
11473        let r: i64x2 = transmute(vaddl_s32(transmute(a), transmute(a)));
11474        assert_eq!(r, e);
11475    }
11476
11477    #[simd_test(enable = "neon")]
11478    unsafe fn test_vaddl_u8() {
11479        let v = u8::MAX;
11480        let a = u8x8::new(v, v, v, v, v, v, v, v);
11481        let v = 2 * (v as u16);
11482        let e = u16x8::new(v, v, v, v, v, v, v, v);
11483        let r: u16x8 = transmute(vaddl_u8(transmute(a), transmute(a)));
11484        assert_eq!(r, e);
11485    }
11486
11487    #[simd_test(enable = "neon")]
11488    unsafe fn test_vaddl_u16() {
11489        let v = u16::MAX;
11490        let a = u16x4::new(v, v, v, v);
11491        let v = 2 * (v as u32);
11492        let e = u32x4::new(v, v, v, v);
11493        let r: u32x4 = transmute(vaddl_u16(transmute(a), transmute(a)));
11494        assert_eq!(r, e);
11495    }
11496
11497    #[simd_test(enable = "neon")]
11498    unsafe fn test_vaddl_u32() {
11499        let v = u32::MAX;
11500        let a = u32x2::new(v, v);
11501        let v = 2 * (v as u64);
11502        let e = u64x2::new(v, v);
11503        let r: u64x2 = transmute(vaddl_u32(transmute(a), transmute(a)));
11504        assert_eq!(r, e);
11505    }
11506
11507    #[simd_test(enable = "neon")]
11508    unsafe fn test_vaddl_high_s8() {
11509        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
11510        let x = i8::MAX;
11511        let b = i8x16::new(x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
11512        let x = x as i16;
11513        let e = i16x8::new(x + 8, x + 9, x + 10, x + 11, x + 12, x + 13, x + 14, x + 15);
11514        let r: i16x8 = transmute(vaddl_high_s8(transmute(a), transmute(b)));
11515        assert_eq!(r, e);
11516    }
11517
11518    #[simd_test(enable = "neon")]
11519    unsafe fn test_vaddl_high_s16() {
11520        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
11521        let x = i16::MAX;
11522        let b = i16x8::new(x, x, x, x, x, x, x, x);
11523        let x = x as i32;
11524        let e = i32x4::new(x + 4, x + 5, x + 6, x + 7);
11525        let r: i32x4 = transmute(vaddl_high_s16(transmute(a), transmute(b)));
11526        assert_eq!(r, e);
11527    }
11528
11529    #[simd_test(enable = "neon")]
11530    unsafe fn test_vaddl_high_s32() {
11531        let a = i32x4::new(0, 1, 2, 3);
11532        let x = i32::MAX;
11533        let b = i32x4::new(x, x, x, x);
11534        let x = x as i64;
11535        let e = i64x2::new(x + 2, x + 3);
11536        let r: i64x2 = transmute(vaddl_high_s32(transmute(a), transmute(b)));
11537        assert_eq!(r, e);
11538    }
11539
11540    #[simd_test(enable = "neon")]
11541    unsafe fn test_vaddl_high_u8() {
11542        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
11543        let x = u8::MAX;
11544        let b = u8x16::new(x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
11545        let x = x as u16;
11546        let e = u16x8::new(x + 8, x + 9, x + 10, x + 11, x + 12, x + 13, x + 14, x + 15);
11547        let r: u16x8 = transmute(vaddl_high_u8(transmute(a), transmute(b)));
11548        assert_eq!(r, e);
11549    }
11550
11551    #[simd_test(enable = "neon")]
11552    unsafe fn test_vaddl_high_u16() {
11553        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
11554        let x = u16::MAX;
11555        let b = u16x8::new(x, x, x, x, x, x, x, x);
11556        let x = x as u32;
11557        let e = u32x4::new(x + 4, x + 5, x + 6, x + 7);
11558        let r: u32x4 = transmute(vaddl_high_u16(transmute(a), transmute(b)));
11559        assert_eq!(r, e);
11560    }
11561
11562    #[simd_test(enable = "neon")]
11563    unsafe fn test_vaddl_high_u32() {
11564        let a = u32x4::new(0, 1, 2, 3);
11565        let x = u32::MAX;
11566        let b = u32x4::new(x, x, x, x);
11567        let x = x as u64;
11568        let e = u64x2::new(x + 2, x + 3);
11569        let r: u64x2 = transmute(vaddl_high_u32(transmute(a), transmute(b)));
11570        assert_eq!(r, e);
11571    }
11572
11573    #[simd_test(enable = "neon")]
11574    unsafe fn test_vaddw_s8() {
11575        let x = i16::MAX;
11576        let a = i16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
11577        let y = i8::MAX;
11578        let b = i8x8::new(y, y, y, y, y, y, y, y);
11579        let y = y as i16;
11580        let e = i16x8::new(
11581            x.wrapping_add(y),
11582            1 + y,
11583            2 + y,
11584            3 + y,
11585            4 + y,
11586            5 + y,
11587            6 + y,
11588            7 + y,
11589        );
11590        let r: i16x8 = transmute(vaddw_s8(transmute(a), transmute(b)));
11591        assert_eq!(r, e);
11592    }
11593
11594    #[simd_test(enable = "neon")]
11595    unsafe fn test_vaddw_s16() {
11596        let x = i32::MAX;
11597        let a = i32x4::new(x, 1, 2, 3);
11598        let y = i16::MAX;
11599        let b = i16x4::new(y, y, y, y);
11600        let y = y as i32;
11601        let e = i32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
11602        let r: i32x4 = transmute(vaddw_s16(transmute(a), transmute(b)));
11603        assert_eq!(r, e);
11604    }
11605
11606    #[simd_test(enable = "neon")]
11607    unsafe fn test_vaddw_s32() {
11608        let x = i64::MAX;
11609        let a = i64x2::new(x, 1);
11610        let y = i32::MAX;
11611        let b = i32x2::new(y, y);
11612        let y = y as i64;
11613        let e = i64x2::new(x.wrapping_add(y), 1 + y);
11614        let r: i64x2 = transmute(vaddw_s32(transmute(a), transmute(b)));
11615        assert_eq!(r, e);
11616    }
11617
11618    #[simd_test(enable = "neon")]
11619    unsafe fn test_vaddw_u8() {
11620        let x = u16::MAX;
11621        let a = u16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
11622        let y = u8::MAX;
11623        let b = u8x8::new(y, y, y, y, y, y, y, y);
11624        let y = y as u16;
11625        let e = u16x8::new(
11626            x.wrapping_add(y),
11627            1 + y,
11628            2 + y,
11629            3 + y,
11630            4 + y,
11631            5 + y,
11632            6 + y,
11633            7 + y,
11634        );
11635        let r: u16x8 = transmute(vaddw_u8(transmute(a), transmute(b)));
11636        assert_eq!(r, e);
11637    }
11638
11639    #[simd_test(enable = "neon")]
11640    unsafe fn test_vaddw_u16() {
11641        let x = u32::MAX;
11642        let a = u32x4::new(x, 1, 2, 3);
11643        let y = u16::MAX;
11644        let b = u16x4::new(y, y, y, y);
11645        let y = y as u32;
11646        let e = u32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
11647        let r: u32x4 = transmute(vaddw_u16(transmute(a), transmute(b)));
11648        assert_eq!(r, e);
11649    }
11650
11651    #[simd_test(enable = "neon")]
11652    unsafe fn test_vaddw_u32() {
11653        let x = u64::MAX;
11654        let a = u64x2::new(x, 1);
11655        let y = u32::MAX;
11656        let b = u32x2::new(y, y);
11657        let y = y as u64;
11658        let e = u64x2::new(x.wrapping_add(y), 1 + y);
11659        let r: u64x2 = transmute(vaddw_u32(transmute(a), transmute(b)));
11660        assert_eq!(r, e);
11661    }
11662
11663    #[simd_test(enable = "neon")]
11664    unsafe fn test_vaddw_high_s8() {
11665        let x = i16::MAX;
11666        let a = i16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
11667        let y = i8::MAX;
11668        let b = i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, y, y, y, y, y, y, y, y);
11669        let y = y as i16;
11670        let e = i16x8::new(
11671            x.wrapping_add(y),
11672            1 + y,
11673            2 + y,
11674            3 + y,
11675            4 + y,
11676            5 + y,
11677            6 + y,
11678            7 + y,
11679        );
11680        let r: i16x8 = transmute(vaddw_high_s8(transmute(a), transmute(b)));
11681        assert_eq!(r, e);
11682    }
11683
11684    #[simd_test(enable = "neon")]
11685    unsafe fn test_vaddw_high_s16() {
11686        let x = i32::MAX;
11687        let a = i32x4::new(x, 1, 2, 3);
11688        let y = i16::MAX;
11689        let b = i16x8::new(0, 0, 0, 0, y, y, y, y);
11690        let y = y as i32;
11691        let e = i32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
11692        let r: i32x4 = transmute(vaddw_high_s16(transmute(a), transmute(b)));
11693        assert_eq!(r, e);
11694    }
11695
11696    #[simd_test(enable = "neon")]
11697    unsafe fn test_vaddw_high_s32() {
11698        let x = i64::MAX;
11699        let a = i64x2::new(x, 1);
11700        let y = i32::MAX;
11701        let b = i32x4::new(0, 0, y, y);
11702        let y = y as i64;
11703        let e = i64x2::new(x.wrapping_add(y), 1 + y);
11704        let r: i64x2 = transmute(vaddw_high_s32(transmute(a), transmute(b)));
11705        assert_eq!(r, e);
11706    }
11707
11708    #[simd_test(enable = "neon")]
11709    unsafe fn test_vaddw_high_u8() {
11710        let x = u16::MAX;
11711        let a = u16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
11712        let y = u8::MAX;
11713        let b = u8x16::new(0, 0, 0, 0, 0, 0, 0, 0, y, y, y, y, y, y, y, y);
11714        let y = y as u16;
11715        let e = u16x8::new(
11716            x.wrapping_add(y),
11717            1 + y,
11718            2 + y,
11719            3 + y,
11720            4 + y,
11721            5 + y,
11722            6 + y,
11723            7 + y,
11724        );
11725        let r: u16x8 = transmute(vaddw_high_u8(transmute(a), transmute(b)));
11726        assert_eq!(r, e);
11727    }
11728
11729    #[simd_test(enable = "neon")]
11730    unsafe fn test_vaddw_high_u16() {
11731        let x = u32::MAX;
11732        let a = u32x4::new(x, 1, 2, 3);
11733        let y = u16::MAX;
11734        let b = u16x8::new(0, 0, 0, 0, y, y, y, y);
11735        let y = y as u32;
11736        let e = u32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
11737        let r: u32x4 = transmute(vaddw_high_u16(transmute(a), transmute(b)));
11738        assert_eq!(r, e);
11739    }
11740
11741    #[simd_test(enable = "neon")]
11742    unsafe fn test_vaddw_high_u32() {
11743        let x = u64::MAX;
11744        let a = u64x2::new(x, 1);
11745        let y = u32::MAX;
11746        let b = u32x4::new(0, 0, y, y);
11747        let y = y as u64;
11748        let e = u64x2::new(x.wrapping_add(y), 1 + y);
11749        let r: u64x2 = transmute(vaddw_high_u32(transmute(a), transmute(b)));
11750        assert_eq!(r, e);
11751    }
11752
11753    #[simd_test(enable = "neon")]
11754    unsafe fn test_vaddhn_s16() {
11755        let a = i16x8::new(
11756            (0 << 8) + 1,
11757            (1 << 8) + 1,
11758            (2 << 8) + 1,
11759            (3 << 8) + 1,
11760            (4 << 8) + 1,
11761            (5 << 8) + 1,
11762            (6 << 8) + 1,
11763            (7 << 8) + 1,
11764        );
11765        let e = i8x8::new(0, 2, 4, 6, 8, 10, 12, 14);
11766        let r: i8x8 = transmute(vaddhn_s16(transmute(a), transmute(a)));
11767        assert_eq!(r, e);
11768    }
11769
11770    #[simd_test(enable = "neon")]
11771    unsafe fn test_vaddhn_s32() {
11772        let a = i32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1);
11773        let e = i16x4::new(0, 2, 4, 6);
11774        let r: i16x4 = transmute(vaddhn_s32(transmute(a), transmute(a)));
11775        assert_eq!(r, e);
11776    }
11777
11778    #[simd_test(enable = "neon")]
11779    unsafe fn test_vaddhn_s64() {
11780        let a = i64x2::new((0 << 32) + 1, (1 << 32) + 1);
11781        let e = i32x2::new(0, 2);
11782        let r: i32x2 = transmute(vaddhn_s64(transmute(a), transmute(a)));
11783        assert_eq!(r, e);
11784    }
11785
11786    #[simd_test(enable = "neon")]
11787    unsafe fn test_vaddhn_u16() {
11788        let a = u16x8::new(
11789            (0 << 8) + 1,
11790            (1 << 8) + 1,
11791            (2 << 8) + 1,
11792            (3 << 8) + 1,
11793            (4 << 8) + 1,
11794            (5 << 8) + 1,
11795            (6 << 8) + 1,
11796            (7 << 8) + 1,
11797        );
11798        let e = u8x8::new(0, 2, 4, 6, 8, 10, 12, 14);
11799        let r: u8x8 = transmute(vaddhn_u16(transmute(a), transmute(a)));
11800        assert_eq!(r, e);
11801    }
11802
11803    #[simd_test(enable = "neon")]
11804    unsafe fn test_vaddhn_u32() {
11805        let a = u32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1);
11806        let e = u16x4::new(0, 2, 4, 6);
11807        let r: u16x4 = transmute(vaddhn_u32(transmute(a), transmute(a)));
11808        assert_eq!(r, e);
11809    }
11810
11811    #[simd_test(enable = "neon")]
11812    unsafe fn test_vaddhn_u64() {
11813        let a = u64x2::new((0 << 32) + 1, (1 << 32) + 1);
11814        let e = u32x2::new(0, 2);
11815        let r: u32x2 = transmute(vaddhn_u64(transmute(a), transmute(a)));
11816        assert_eq!(r, e);
11817    }
11818
11819    #[simd_test(enable = "neon")]
11820    unsafe fn test_vaddhn_high_s16() {
11821        let r = i8x8::splat(42);
11822        let a = i16x8::new(
11823            (0 << 8) + 1,
11824            (1 << 8) + 1,
11825            (2 << 8) + 1,
11826            (3 << 8) + 1,
11827            (4 << 8) + 1,
11828            (5 << 8) + 1,
11829            (6 << 8) + 1,
11830            (7 << 8) + 1,
11831        );
11832        let e = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 2, 4, 6, 8, 10, 12, 14);
11833        let r: i8x16 = transmute(vaddhn_high_s16(transmute(r), transmute(a), transmute(a)));
11834        assert_eq!(r, e);
11835    }
11836
11837    #[simd_test(enable = "neon")]
11838    unsafe fn test_vaddhn_high_s32() {
11839        let r = i16x4::splat(42);
11840        let a = i32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1);
11841        let e = i16x8::new(42, 42, 42, 42, 0, 2, 4, 6);
11842        let r: i16x8 = transmute(vaddhn_high_s32(transmute(r), transmute(a), transmute(a)));
11843        assert_eq!(r, e);
11844    }
11845
11846    #[simd_test(enable = "neon")]
11847    unsafe fn test_vaddhn_high_s64() {
11848        let r = i32x2::splat(42);
11849        let a = i64x2::new((0 << 32) + 1, (1 << 32) + 1);
11850        let e = i32x4::new(42, 42, 0, 2);
11851        let r: i32x4 = transmute(vaddhn_high_s64(transmute(r), transmute(a), transmute(a)));
11852        assert_eq!(r, e);
11853    }
11854
11855    #[simd_test(enable = "neon")]
11856    unsafe fn test_vaddhn_high_u16() {
11857        let r = u8x8::splat(42);
11858        let a = u16x8::new(
11859            (0 << 8) + 1,
11860            (1 << 8) + 1,
11861            (2 << 8) + 1,
11862            (3 << 8) + 1,
11863            (4 << 8) + 1,
11864            (5 << 8) + 1,
11865            (6 << 8) + 1,
11866            (7 << 8) + 1,
11867        );
11868        let e = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 2, 4, 6, 8, 10, 12, 14);
11869        let r: u8x16 = transmute(vaddhn_high_u16(transmute(r), transmute(a), transmute(a)));
11870        assert_eq!(r, e);
11871    }
11872
11873    #[simd_test(enable = "neon")]
11874    unsafe fn test_vaddhn_high_u32() {
11875        let r = u16x4::splat(42);
11876        let a = u32x4::new((0 << 16) + 1, (1 << 16) + 1, (2 << 16) + 1, (3 << 16) + 1);
11877        let e = u16x8::new(42, 42, 42, 42, 0, 2, 4, 6);
11878        let r: u16x8 = transmute(vaddhn_high_u32(transmute(r), transmute(a), transmute(a)));
11879        assert_eq!(r, e);
11880    }
11881
11882    #[simd_test(enable = "neon")]
11883    unsafe fn test_vaddhn_high_u64() {
11884        let r = u32x2::splat(42);
11885        let a = u64x2::new((0 << 32) + 1, (1 << 32) + 1);
11886        let e = u32x4::new(42, 42, 0, 2);
11887        let r: u32x4 = transmute(vaddhn_high_u64(transmute(r), transmute(a), transmute(a)));
11888        assert_eq!(r, e);
11889    }
11890
11891    #[simd_test(enable = "neon")]
11892    unsafe fn test_vraddhn_s16() {
11893        let round_constant: i16 = (1 << 8) - 1;
11894        let a = i16x8::new(
11895            0 << 8,
11896            1 << 8,
11897            2 << 8,
11898            3 << 8,
11899            4 << 8,
11900            5 << 8,
11901            6 << 8,
11902            7 << 8,
11903        );
11904        let b = i16x8::new(
11905            0 << 8,
11906            (1 << 8) + round_constant,
11907            2 << 8,
11908            (3 << 8) + round_constant,
11909            4 << 8,
11910            (5 << 8) + round_constant,
11911            6 << 8,
11912            (7 << 8) + round_constant,
11913        );
11914        let e = i8x8::new(0, 3, 4, 7, 8, 11, 12, 15);
11915        let r: i8x8 = transmute(vraddhn_s16(transmute(a), transmute(b)));
11916        assert_eq!(r, e);
11917    }
11918
11919    #[simd_test(enable = "neon")]
11920    unsafe fn test_vraddhn_s32() {
11921        let round_constant: i32 = (1 << 16) - 1;
11922        let a = i32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16);
11923        let b = i32x4::new(
11924            0 << 16,
11925            (1 << 16) + round_constant,
11926            2 << 16,
11927            (3 << 16) + round_constant,
11928        );
11929        let e = i16x4::new(0, 3, 4, 7);
11930        let r: i16x4 = transmute(vraddhn_s32(transmute(a), transmute(b)));
11931        assert_eq!(r, e);
11932    }
11933
11934    #[simd_test(enable = "neon")]
11935    unsafe fn test_vraddhn_s64() {
11936        let round_constant: i64 = (1 << 32) - 1;
11937        let a = i64x2::new(0 << 32, 1 << 32);
11938        let b = i64x2::new(0 << 32, (1 << 32) + round_constant);
11939        let e = i32x2::new(0, 3);
11940        let r: i32x2 = transmute(vraddhn_s64(transmute(a), transmute(b)));
11941        assert_eq!(r, e);
11942    }
11943
11944    #[simd_test(enable = "neon")]
11945    unsafe fn test_vraddhn_u16() {
11946        let round_constant: u16 = (1 << 8) - 1;
11947        let a = u16x8::new(
11948            0 << 8,
11949            1 << 8,
11950            2 << 8,
11951            3 << 8,
11952            4 << 8,
11953            5 << 8,
11954            6 << 8,
11955            7 << 8,
11956        );
11957        let b = u16x8::new(
11958            0 << 8,
11959            (1 << 8) + round_constant,
11960            2 << 8,
11961            (3 << 8) + round_constant,
11962            4 << 8,
11963            (5 << 8) + round_constant,
11964            6 << 8,
11965            (7 << 8) + round_constant,
11966        );
11967        let e = u8x8::new(0, 3, 4, 7, 8, 11, 12, 15);
11968        let r: u8x8 = transmute(vraddhn_u16(transmute(a), transmute(b)));
11969        assert_eq!(r, e);
11970    }
11971
11972    #[simd_test(enable = "neon")]
11973    unsafe fn test_vraddhn_u32() {
11974        let round_constant: u32 = (1 << 16) - 1;
11975        let a = u32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16);
11976        let b = u32x4::new(
11977            0 << 16,
11978            (1 << 16) + round_constant,
11979            2 << 16,
11980            (3 << 16) + round_constant,
11981        );
11982        let e = u16x4::new(0, 3, 4, 7);
11983        let r: u16x4 = transmute(vraddhn_u32(transmute(a), transmute(b)));
11984        assert_eq!(r, e);
11985    }
11986
11987    #[simd_test(enable = "neon")]
11988    unsafe fn test_vraddhn_u64() {
11989        let round_constant: u64 = (1 << 32) - 1;
11990        let a = u64x2::new(0 << 32, 1 << 32);
11991        let b = u64x2::new(0 << 32, (1 << 32) + round_constant);
11992        let e = u32x2::new(0, 3);
11993        let r: u32x2 = transmute(vraddhn_u64(transmute(a), transmute(b)));
11994        assert_eq!(r, e);
11995    }
11996
11997    #[simd_test(enable = "neon")]
11998    unsafe fn test_vraddhn_high_s16() {
11999        let r = i8x8::splat(42);
12000        let round_constant: i16 = (1 << 8) - 1;
12001        let a = i16x8::new(
12002            0 << 8,
12003            1 << 8,
12004            2 << 8,
12005            3 << 8,
12006            4 << 8,
12007            5 << 8,
12008            6 << 8,
12009            7 << 8,
12010        );
12011        let b = i16x8::new(
12012            0 << 8,
12013            (1 << 8) + round_constant,
12014            2 << 8,
12015            (3 << 8) + round_constant,
12016            4 << 8,
12017            (5 << 8) + round_constant,
12018            6 << 8,
12019            (7 << 8) + round_constant,
12020        );
12021        let e = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 3, 4, 7, 8, 11, 12, 15);
12022        let r: i8x16 = transmute(vraddhn_high_s16(transmute(r), transmute(a), transmute(b)));
12023        assert_eq!(r, e);
12024    }
12025
12026    #[simd_test(enable = "neon")]
12027    unsafe fn test_vraddhn_high_s32() {
12028        let r = i16x4::splat(42);
12029        let round_constant: i32 = (1 << 16) - 1;
12030        let a = i32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16);
12031        let b = i32x4::new(
12032            0 << 16,
12033            (1 << 16) + round_constant,
12034            2 << 16,
12035            (3 << 16) + round_constant,
12036        );
12037        let e = i16x8::new(42, 42, 42, 42, 0, 3, 4, 7);
12038        let r: i16x8 = transmute(vraddhn_high_s32(transmute(r), transmute(a), transmute(b)));
12039        assert_eq!(r, e);
12040    }
12041
12042    #[simd_test(enable = "neon")]
12043    unsafe fn test_vraddhn_high_s64() {
12044        let r = i32x2::splat(42);
12045        let round_constant: i64 = (1 << 32) - 1;
12046        let a = i64x2::new(0 << 32, 1 << 32);
12047        let b = i64x2::new(0 << 32, (1 << 32) + round_constant);
12048        let e = i32x4::new(42, 42, 0, 3);
12049        let r: i32x4 = transmute(vraddhn_high_s64(transmute(r), transmute(a), transmute(b)));
12050        assert_eq!(r, e);
12051    }
12052
12053    #[simd_test(enable = "neon")]
12054    unsafe fn test_vraddhn_high_u16() {
12055        let r = u8x8::splat(42);
12056        let round_constant: u16 = (1 << 8) - 1;
12057        let a = u16x8::new(
12058            0 << 8,
12059            1 << 8,
12060            2 << 8,
12061            3 << 8,
12062            4 << 8,
12063            5 << 8,
12064            6 << 8,
12065            7 << 8,
12066        );
12067        let b = u16x8::new(
12068            0 << 8,
12069            (1 << 8) + round_constant,
12070            2 << 8,
12071            (3 << 8) + round_constant,
12072            4 << 8,
12073            (5 << 8) + round_constant,
12074            6 << 8,
12075            (7 << 8) + round_constant,
12076        );
12077        let e = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 0, 3, 4, 7, 8, 11, 12, 15);
12078        let r: u8x16 = transmute(vraddhn_high_u16(transmute(r), transmute(a), transmute(b)));
12079        assert_eq!(r, e);
12080    }
12081
12082    #[simd_test(enable = "neon")]
12083    unsafe fn test_vraddhn_high_u32() {
12084        let r = u16x4::splat(42);
12085        let round_constant: u32 = (1 << 16) - 1;
12086        let a = u32x4::new(0 << 16, 1 << 16, 2 << 16, 3 << 16);
12087        let b = u32x4::new(
12088            0 << 16,
12089            (1 << 16) + round_constant,
12090            2 << 16,
12091            (3 << 16) + round_constant,
12092        );
12093        let e = u16x8::new(42, 42, 42, 42, 0, 3, 4, 7);
12094        let r: u16x8 = transmute(vraddhn_high_s32(transmute(r), transmute(a), transmute(b)));
12095        assert_eq!(r, e);
12096    }
12097
12098    #[simd_test(enable = "neon")]
12099    unsafe fn test_vraddhn_high_u64() {
12100        let r = u32x2::splat(42);
12101        let round_constant: u64 = (1 << 32) - 1;
12102        let a = u64x2::new(0 << 32, 1 << 32);
12103        let b = u64x2::new(0 << 32, (1 << 32) + round_constant);
12104        let e = u32x4::new(42, 42, 0, 3);
12105        let r: u32x4 = transmute(vraddhn_high_s64(transmute(r), transmute(a), transmute(b)));
12106        assert_eq!(r, e);
12107    }
12108
12109    #[simd_test(enable = "neon")]
12110    unsafe fn test_vpaddl_s8() {
12111        let a = i8x8::new(-4, -3, -2, -1, 0, 1, 2, 3);
12112        let r: i16x4 = transmute(vpaddl_s8(transmute(a)));
12113        let e = i16x4::new(-7, -3, 1, 5);
12114        assert_eq!(r, e);
12115    }
12116
12117    #[simd_test(enable = "neon")]
12118    unsafe fn test_vpaddl_s16() {
12119        let a = i16x4::new(-2, -1, 0, 1);
12120        let r: i32x2 = transmute(vpaddl_s16(transmute(a)));
12121        let e = i32x2::new(-3, 1);
12122        assert_eq!(r, e);
12123    }
12124
12125    #[simd_test(enable = "neon")]
12126    unsafe fn test_vpaddl_s32() {
12127        let a = i32x2::new(-1, 0);
12128        let r: i64x1 = transmute(vpaddl_s32(transmute(a)));
12129        let e = i64x1::new(-1);
12130        assert_eq!(r, e);
12131    }
12132
12133    #[simd_test(enable = "neon")]
12134    unsafe fn test_vpaddlq_s8() {
12135        let a = i8x16::new(-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7);
12136        let r: i16x8 = transmute(vpaddlq_s8(transmute(a)));
12137        let e = i16x8::new(-15, -11, -7, -3, 1, 5, 9, 13);
12138        assert_eq!(r, e);
12139    }
12140
12141    #[simd_test(enable = "neon")]
12142    unsafe fn test_vpaddlq_s16() {
12143        let a = i16x8::new(-4, -3, -2, -1, 0, 1, 2, 3);
12144        let r: i32x4 = transmute(vpaddlq_s16(transmute(a)));
12145        let e = i32x4::new(-7, -3, 1, 5);
12146        assert_eq!(r, e);
12147    }
12148
12149    #[simd_test(enable = "neon")]
12150    unsafe fn test_vpaddlq_s32() {
12151        let a = i32x4::new(-2, -1, 0, 1);
12152        let r: i64x2 = transmute(vpaddlq_s32(transmute(a)));
12153        let e = i64x2::new(-3, 1);
12154        assert_eq!(r, e);
12155    }
12156
12157    #[simd_test(enable = "neon")]
12158    unsafe fn test_vpaddl_u8() {
12159        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, u8::MAX);
12160        let r: u16x4 = transmute(vpaddl_u8(transmute(a)));
12161        let e = u16x4::new(1, 5, 9, u8::MAX as u16 + 6);
12162        assert_eq!(r, e);
12163    }
12164
12165    #[simd_test(enable = "neon")]
12166    unsafe fn test_vpaddl_u16() {
12167        let a = u16x4::new(0, 1, 2, u16::MAX);
12168        let r: u32x2 = transmute(vpaddl_u16(transmute(a)));
12169        let e = u32x2::new(1, u16::MAX as u32 + 2);
12170        assert_eq!(r, e);
12171    }
12172
12173    #[simd_test(enable = "neon")]
12174    unsafe fn test_vpaddl_u32() {
12175        let a = u32x2::new(1, u32::MAX);
12176        let r: u64x1 = transmute(vpaddl_u32(transmute(a)));
12177        let e = u64x1::new(u32::MAX as u64 + 1);
12178        assert_eq!(r, e);
12179    }
12180
12181    #[simd_test(enable = "neon")]
12182    unsafe fn test_vpaddlq_u8() {
12183        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, u8::MAX);
12184        let r: u16x8 = transmute(vpaddlq_u8(transmute(a)));
12185        let e = u16x8::new(1, 5, 9, 13, 17, 21, 25, u8::MAX as u16 + 14);
12186        assert_eq!(r, e);
12187    }
12188
12189    #[simd_test(enable = "neon")]
12190    unsafe fn test_vpaddlq_u16() {
12191        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, u16::MAX);
12192        let r: u32x4 = transmute(vpaddlq_u16(transmute(a)));
12193        let e = u32x4::new(1, 5, 9, u16::MAX as u32 + 6);
12194        assert_eq!(r, e);
12195    }
12196
12197    #[simd_test(enable = "neon")]
12198    unsafe fn test_vpaddlq_u32() {
12199        let a = u32x4::new(0, 1, 2, u32::MAX);
12200        let r: u64x2 = transmute(vpaddlq_u32(transmute(a)));
12201        let e = u64x2::new(1, u32::MAX as u64 + 2);
12202        assert_eq!(r, e);
12203    }
12204
12205    #[simd_test(enable = "neon")]
12206    unsafe fn test_vpadal_s8() {
12207        let a = i16x4::new(42, 42, 42, 42);
12208        let b = i8x8::new(-4, -3, -2, -1, 0, 1, 2, 3);
12209        let r: i16x4 = transmute(vpadal_s8(transmute(a), transmute(b)));
12210        let e = i16x4::new(35, 39, 43, 47);
12211        assert_eq!(r, e);
12212    }
12213
12214    #[simd_test(enable = "neon")]
12215    unsafe fn test_vpadal_s16() {
12216        let a = i32x2::new(42, 42);
12217        let b = i16x4::new(-2, -1, 0, 1);
12218        let r: i32x2 = transmute(vpadal_s16(transmute(a), transmute(b)));
12219        let e = i32x2::new(39, 43);
12220        assert_eq!(r, e);
12221    }
12222
12223    #[simd_test(enable = "neon")]
12224    unsafe fn test_vpadal_s32() {
12225        let a = i64x1::new(42);
12226        let b = i32x2::new(-1, 0);
12227        let r: i64x1 = transmute(vpadal_s32(transmute(a), transmute(b)));
12228        let e = i64x1::new(41);
12229        assert_eq!(r, e);
12230    }
12231
12232    #[simd_test(enable = "neon")]
12233    unsafe fn test_vpadalq_s8() {
12234        let a = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
12235        let b = i8x16::new(-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7);
12236        let r: i16x8 = transmute(vpadalq_s8(transmute(a), transmute(b)));
12237        let e = i16x8::new(27, 31, 35, 39, 43, 47, 51, 55);
12238        assert_eq!(r, e);
12239    }
12240
12241    #[simd_test(enable = "neon")]
12242    unsafe fn test_vpadalq_s16() {
12243        let a = i32x4::new(42, 42, 42, 42);
12244        let b = i16x8::new(-4, -3, -2, -1, 0, 1, 2, 3);
12245        let r: i32x4 = transmute(vpadalq_s16(transmute(a), transmute(b)));
12246        let e = i32x4::new(35, 39, 43, 47);
12247        assert_eq!(r, e);
12248    }
12249
12250    #[simd_test(enable = "neon")]
12251    unsafe fn test_vpadalq_s32() {
12252        let a = i64x2::new(42, 42);
12253        let b = i32x4::new(-2, -1, 0, 1);
12254        let r: i64x2 = transmute(vpadalq_s32(transmute(a), transmute(b)));
12255        let e = i64x2::new(39, 43);
12256        assert_eq!(r, e);
12257    }
12258
12259    #[simd_test(enable = "neon")]
12260    unsafe fn test_vpadal_u8() {
12261        let a = u16x4::new(42, 42, 42, 42);
12262        let b = u8x8::new(0, 1, 2, 3, 4, 5, 6, u8::MAX);
12263        let r: u16x4 = transmute(vpadal_u8(transmute(a), transmute(b)));
12264        let e = u16x4::new(43, 47, 51, u8::MAX as u16 + 48);
12265        assert_eq!(r, e);
12266    }
12267
12268    #[simd_test(enable = "neon")]
12269    unsafe fn test_vpadal_u16() {
12270        let a = u32x2::new(42, 42);
12271        let b = u16x4::new(0, 1, 2, u16::MAX);
12272        let r: u32x2 = transmute(vpadal_u16(transmute(a), transmute(b)));
12273        let e = u32x2::new(43, u16::MAX as u32 + 44);
12274        assert_eq!(r, e);
12275    }
12276
12277    #[simd_test(enable = "neon")]
12278    unsafe fn test_vpadal_u32() {
12279        let a = u64x1::new(42);
12280        let b = u32x2::new(1, u32::MAX);
12281        let r: u64x1 = transmute(vpadal_u32(transmute(a), transmute(b)));
12282        let e = u64x1::new(u32::MAX as u64 + 43);
12283        assert_eq!(r, e);
12284    }
12285
12286    #[simd_test(enable = "neon")]
12287    unsafe fn test_vpadalq_u8() {
12288        let a = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
12289        let b = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, u8::MAX);
12290        let r: u16x8 = transmute(vpadalq_u8(transmute(a), transmute(b)));
12291        let e = u16x8::new(43, 47, 51, 55, 59, 63, 67, u8::MAX as u16 + 56);
12292        assert_eq!(r, e);
12293    }
12294
12295    #[simd_test(enable = "neon")]
12296    unsafe fn test_vpadalq_u16() {
12297        let a = u32x4::new(42, 42, 42, 42);
12298        let b = u16x8::new(0, 1, 2, 3, 4, 5, 6, u16::MAX);
12299        let r: u32x4 = transmute(vpadalq_u16(transmute(a), transmute(b)));
12300        let e = u32x4::new(43, 47, 51, u16::MAX as u32 + 48);
12301        assert_eq!(r, e);
12302    }
12303
12304    #[simd_test(enable = "neon")]
12305    unsafe fn test_vpadalq_u32() {
12306        let a = u64x2::new(42, 42);
12307        let b = u32x4::new(0, 1, 2, u32::MAX);
12308        let r: u64x2 = transmute(vpadalq_u32(transmute(a), transmute(b)));
12309        let e = u64x2::new(43, u32::MAX as u64 + 44);
12310        assert_eq!(r, e);
12311    }
12312
12313    #[simd_test(enable = "neon")]
12314    unsafe fn test_vmvn_s8() {
12315        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12316        let e = i8x8::new(-1, -2, -3, -4, -5, -6, -7, -8);
12317        let r: i8x8 = transmute(vmvn_s8(transmute(a)));
12318        assert_eq!(r, e);
12319    }
12320
12321    #[simd_test(enable = "neon")]
12322    unsafe fn test_vmvnq_s8() {
12323        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12324        let e = i8x16::new(
12325            -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16,
12326        );
12327        let r: i8x16 = transmute(vmvnq_s8(transmute(a)));
12328        assert_eq!(r, e);
12329    }
12330
12331    #[simd_test(enable = "neon")]
12332    unsafe fn test_vmvn_s16() {
12333        let a = i16x4::new(0, 1, 2, 3);
12334        let e = i16x4::new(-1, -2, -3, -4);
12335        let r: i16x4 = transmute(vmvn_s16(transmute(a)));
12336        assert_eq!(r, e);
12337    }
12338
12339    #[simd_test(enable = "neon")]
12340    unsafe fn test_vmvnq_s16() {
12341        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12342        let e = i16x8::new(-1, -2, -3, -4, -5, -6, -7, -8);
12343        let r: i16x8 = transmute(vmvnq_s16(transmute(a)));
12344        assert_eq!(r, e);
12345    }
12346
12347    #[simd_test(enable = "neon")]
12348    unsafe fn test_vmvn_s32() {
12349        let a = i32x2::new(0, 1);
12350        let e = i32x2::new(-1, -2);
12351        let r: i32x2 = transmute(vmvn_s32(transmute(a)));
12352        assert_eq!(r, e);
12353    }
12354
12355    #[simd_test(enable = "neon")]
12356    unsafe fn test_vmvnq_s32() {
12357        let a = i32x4::new(0, 1, 2, 3);
12358        let e = i32x4::new(-1, -2, -3, -4);
12359        let r: i32x4 = transmute(vmvnq_s32(transmute(a)));
12360        assert_eq!(r, e);
12361    }
12362
12363    #[simd_test(enable = "neon")]
12364    unsafe fn test_vmvn_u8() {
12365        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12366        let e = u8x8::new(255, 254, 253, 252, 251, 250, 249, 248);
12367        let r: u8x8 = transmute(vmvn_u8(transmute(a)));
12368        assert_eq!(r, e);
12369    }
12370
12371    #[simd_test(enable = "neon")]
12372    unsafe fn test_vmvnq_u8() {
12373        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12374        let e = u8x16::new(
12375            255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240,
12376        );
12377        let r: u8x16 = transmute(vmvnq_u8(transmute(a)));
12378        assert_eq!(r, e);
12379    }
12380
12381    #[simd_test(enable = "neon")]
12382    unsafe fn test_vmvn_u16() {
12383        let a = u16x4::new(0, 1, 2, 3);
12384        let e = u16x4::new(65_535, 65_534, 65_533, 65_532);
12385        let r: u16x4 = transmute(vmvn_u16(transmute(a)));
12386        assert_eq!(r, e);
12387    }
12388
12389    #[simd_test(enable = "neon")]
12390    unsafe fn test_vmvnq_u16() {
12391        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12392        let e = u16x8::new(
12393            65_535, 65_534, 65_533, 65_532, 65_531, 65_530, 65_529, 65_528,
12394        );
12395        let r: u16x8 = transmute(vmvnq_u16(transmute(a)));
12396        assert_eq!(r, e);
12397    }
12398
12399    #[simd_test(enable = "neon")]
12400    unsafe fn test_vmvn_u32() {
12401        let a = u32x2::new(0, 1);
12402        let e = u32x2::new(4_294_967_295, 4_294_967_294);
12403        let r: u32x2 = transmute(vmvn_u32(transmute(a)));
12404        assert_eq!(r, e);
12405    }
12406
12407    #[simd_test(enable = "neon")]
12408    unsafe fn test_vmvnq_u32() {
12409        let a = u32x4::new(0, 1, 2, 3);
12410        let e = u32x4::new(4_294_967_295, 4_294_967_294, 4_294_967_293, 4_294_967_292);
12411        let r: u32x4 = transmute(vmvnq_u32(transmute(a)));
12412        assert_eq!(r, e);
12413    }
12414
12415    #[simd_test(enable = "neon")]
12416    unsafe fn test_vmvn_p8() {
12417        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12418        let e = u8x8::new(255, 254, 253, 252, 251, 250, 249, 248);
12419        let r: u8x8 = transmute(vmvn_p8(transmute(a)));
12420        assert_eq!(r, e);
12421    }
12422
12423    #[simd_test(enable = "neon")]
12424    unsafe fn test_vmvnq_p8() {
12425        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12426        let e = u8x16::new(
12427            255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240,
12428        );
12429        let r: u8x16 = transmute(vmvnq_p8(transmute(a)));
12430        assert_eq!(r, e);
12431    }
12432
12433    #[simd_test(enable = "neon")]
12434    unsafe fn test_vbic_s8() {
12435        let a = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7);
12436        let b = i8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12437        let e = i8x8::new(0, -2, -2, -4, -4, -6, -6, -8);
12438        let r: i8x8 = transmute(vbic_s8(transmute(a), transmute(b)));
12439        assert_eq!(r, e);
12440    }
12441
12442    #[simd_test(enable = "neon")]
12443    unsafe fn test_vbicq_s8() {
12444        let a = i8x16::new(
12445            0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15,
12446        );
12447        let b = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
12448        let e = i8x16::new(
12449            0, -2, -2, -4, -4, -6, -6, -8, -8, -10, -10, -12, -12, -14, -14, -16,
12450        );
12451        let r: i8x16 = transmute(vbicq_s8(transmute(a), transmute(b)));
12452        assert_eq!(r, e);
12453    }
12454
12455    #[simd_test(enable = "neon")]
12456    unsafe fn test_vbic_s16() {
12457        let a = i16x4::new(0, -1, -2, -3);
12458        let b = i16x4::new(1, 1, 1, 1);
12459        let e = i16x4::new(0, -2, -2, -4);
12460        let r: i16x4 = transmute(vbic_s16(transmute(a), transmute(b)));
12461        assert_eq!(r, e);
12462    }
12463
12464    #[simd_test(enable = "neon")]
12465    unsafe fn test_vbicq_s16() {
12466        let a = i16x8::new(0, -1, -2, -3, -4, -5, -6, -7);
12467        let b = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12468        let e = i16x8::new(0, -2, -2, -4, -4, -6, -6, -8);
12469        let r: i16x8 = transmute(vbicq_s16(transmute(a), transmute(b)));
12470        assert_eq!(r, e);
12471    }
12472
12473    #[simd_test(enable = "neon")]
12474    unsafe fn test_vbic_s32() {
12475        let a = i32x2::new(0, -1);
12476        let b = i32x2::new(1, 1);
12477        let e = i32x2::new(0, -2);
12478        let r: i32x2 = transmute(vbic_s32(transmute(a), transmute(b)));
12479        assert_eq!(r, e);
12480    }
12481
12482    #[simd_test(enable = "neon")]
12483    unsafe fn test_vbicq_s32() {
12484        let a = i32x4::new(0, -1, -2, -3);
12485        let b = i32x4::new(1, 1, 1, 1);
12486        let e = i32x4::new(0, -2, -2, -4);
12487        let r: i32x4 = transmute(vbicq_s32(transmute(a), transmute(b)));
12488        assert_eq!(r, e);
12489    }
12490
12491    #[simd_test(enable = "neon")]
12492    unsafe fn test_vbic_s64() {
12493        let a = i64x1::new(-1);
12494        let b = i64x1::new(1);
12495        let e = i64x1::new(-2);
12496        let r: i64x1 = transmute(vbic_s64(transmute(a), transmute(b)));
12497        assert_eq!(r, e);
12498    }
12499
12500    #[simd_test(enable = "neon")]
12501    unsafe fn test_vbicq_s64() {
12502        let a = i64x2::new(0, -1);
12503        let b = i64x2::new(1, 1);
12504        let e = i64x2::new(0, -2);
12505        let r: i64x2 = transmute(vbicq_s64(transmute(a), transmute(b)));
12506        assert_eq!(r, e);
12507    }
12508
12509    #[simd_test(enable = "neon")]
12510    unsafe fn test_vbic_u8() {
12511        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12512        let b = u8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12513        let e = u8x8::new(0, 0, 2, 2, 4, 4, 6, 6);
12514        let r: u8x8 = transmute(vbic_u8(transmute(a), transmute(b)));
12515        assert_eq!(r, e);
12516    }
12517
12518    #[simd_test(enable = "neon")]
12519    unsafe fn test_vbicq_u8() {
12520        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12521        let b = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
12522        let e = u8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);
12523        let r: u8x16 = transmute(vbicq_u8(transmute(a), transmute(b)));
12524        assert_eq!(r, e);
12525    }
12526
12527    #[simd_test(enable = "neon")]
12528    unsafe fn test_vbic_u16() {
12529        let a = u16x4::new(0, 1, 2, 3);
12530        let b = u16x4::new(1, 1, 1, 1);
12531        let e = u16x4::new(0, 0, 2, 2);
12532        let r: u16x4 = transmute(vbic_u16(transmute(a), transmute(b)));
12533        assert_eq!(r, e);
12534    }
12535
12536    #[simd_test(enable = "neon")]
12537    unsafe fn test_vbicq_u16() {
12538        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12539        let b = u16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12540        let e = u16x8::new(0, 0, 2, 2, 4, 4, 6, 6);
12541        let r: u16x8 = transmute(vbicq_u16(transmute(a), transmute(b)));
12542        assert_eq!(r, e);
12543    }
12544
12545    #[simd_test(enable = "neon")]
12546    unsafe fn test_vbic_u32() {
12547        let a = u32x2::new(0, 1);
12548        let b = u32x2::new(1, 1);
12549        let e = u32x2::new(0, 0);
12550        let r: u32x2 = transmute(vbic_u32(transmute(a), transmute(b)));
12551        assert_eq!(r, e);
12552    }
12553
12554    #[simd_test(enable = "neon")]
12555    unsafe fn test_vbicq_u32() {
12556        let a = u32x4::new(0, 1, 2, 3);
12557        let b = u32x4::new(1, 1, 1, 1);
12558        let e = u32x4::new(0, 0, 2, 2);
12559        let r: u32x4 = transmute(vbicq_u32(transmute(a), transmute(b)));
12560        assert_eq!(r, e);
12561    }
12562
12563    #[simd_test(enable = "neon")]
12564    unsafe fn test_vbic_u64() {
12565        let a = u64x1::new(1);
12566        let b = u64x1::new(1);
12567        let e = u64x1::new(0);
12568        let r: u64x1 = transmute(vbic_u64(transmute(a), transmute(b)));
12569        assert_eq!(r, e);
12570    }
12571
12572    #[simd_test(enable = "neon")]
12573    unsafe fn test_vbicq_u64() {
12574        let a = u64x2::new(0, 1);
12575        let b = u64x2::new(1, 1);
12576        let e = u64x2::new(0, 0);
12577        let r: u64x2 = transmute(vbicq_u64(transmute(a), transmute(b)));
12578        assert_eq!(r, e);
12579    }
12580
12581    #[simd_test(enable = "neon")]
12582    unsafe fn test_vbsl_s8() {
12583        let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
12584        let b = i8x8::new(
12585            i8::MAX,
12586            i8::MAX,
12587            i8::MAX,
12588            i8::MAX,
12589            i8::MAX,
12590            i8::MAX,
12591            i8::MAX,
12592            i8::MAX,
12593        );
12594        let c = i8x8::new(
12595            i8::MIN,
12596            i8::MIN,
12597            i8::MIN,
12598            i8::MIN,
12599            i8::MIN,
12600            i8::MIN,
12601            i8::MIN,
12602            i8::MIN,
12603        );
12604        let e = i8x8::new(
12605            i8::MAX,
12606            i8::MIN | 1,
12607            i8::MAX,
12608            i8::MIN | 2,
12609            i8::MAX,
12610            i8::MIN,
12611            i8::MAX,
12612            i8::MIN,
12613        );
12614        let r: i8x8 = transmute(vbsl_s8(transmute(a), transmute(b), transmute(c)));
12615        assert_eq!(r, e);
12616    }
12617    #[simd_test(enable = "neon")]
12618    unsafe fn test_vbsl_s16() {
12619        let a = u16x4::new(u16::MAX, 0, 1, 2);
12620        let b = i16x4::new(i16::MAX, i16::MAX, i16::MAX, i16::MAX);
12621        let c = i16x4::new(i16::MIN, i16::MIN, i16::MIN, i16::MIN);
12622        let e = i16x4::new(i16::MAX, i16::MIN, i16::MIN | 1, i16::MIN | 2);
12623        let r: i16x4 = transmute(vbsl_s16(transmute(a), transmute(b), transmute(c)));
12624        assert_eq!(r, e);
12625    }
12626    #[simd_test(enable = "neon")]
12627    unsafe fn test_vbsl_s32() {
12628        let a = u32x2::new(u32::MAX, 1);
12629        let b = i32x2::new(i32::MAX, i32::MAX);
12630        let c = i32x2::new(i32::MIN, i32::MIN);
12631        let e = i32x2::new(i32::MAX, i32::MIN | 1);
12632        let r: i32x2 = transmute(vbsl_s32(transmute(a), transmute(b), transmute(c)));
12633        assert_eq!(r, e);
12634    }
12635    #[simd_test(enable = "neon")]
12636    unsafe fn test_vbsl_s64() {
12637        let a = u64x1::new(1);
12638        let b = i64x1::new(i64::MAX);
12639        let c = i64x1::new(i64::MIN);
12640        let e = i64x1::new(i64::MIN | 1);
12641        let r: i64x1 = transmute(vbsl_s64(transmute(a), transmute(b), transmute(c)));
12642        assert_eq!(r, e);
12643    }
12644    #[simd_test(enable = "neon")]
12645    unsafe fn test_vbsl_u8() {
12646        let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
12647        let b = u8x8::new(
12648            u8::MAX,
12649            u8::MAX,
12650            u8::MAX,
12651            u8::MAX,
12652            u8::MAX,
12653            u8::MAX,
12654            u8::MAX,
12655            u8::MAX,
12656        );
12657        let c = u8x8::new(
12658            u8::MIN,
12659            u8::MIN,
12660            u8::MIN,
12661            u8::MIN,
12662            u8::MIN,
12663            u8::MIN,
12664            u8::MIN,
12665            u8::MIN,
12666        );
12667        let e = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, u8::MIN, u8::MAX, u8::MIN);
12668        let r: u8x8 = transmute(vbsl_u8(transmute(a), transmute(b), transmute(c)));
12669        assert_eq!(r, e);
12670    }
12671    #[simd_test(enable = "neon")]
12672    unsafe fn test_vbsl_u16() {
12673        let a = u16x4::new(u16::MAX, 0, 1, 2);
12674        let b = u16x4::new(u16::MAX, u16::MAX, u16::MAX, u16::MAX);
12675        let c = u16x4::new(u16::MIN, u16::MIN, u16::MIN, u16::MIN);
12676        let e = u16x4::new(u16::MAX, 0, 1, 2);
12677        let r: u16x4 = transmute(vbsl_u16(transmute(a), transmute(b), transmute(c)));
12678        assert_eq!(r, e);
12679    }
12680    #[simd_test(enable = "neon")]
12681    unsafe fn test_vbsl_u32() {
12682        let a = u32x2::new(u32::MAX, 2);
12683        let b = u32x2::new(u32::MAX, u32::MAX);
12684        let c = u32x2::new(u32::MIN, u32::MIN);
12685        let e = u32x2::new(u32::MAX, 2);
12686        let r: u32x2 = transmute(vbsl_u32(transmute(a), transmute(b), transmute(c)));
12687        assert_eq!(r, e);
12688    }
12689    #[simd_test(enable = "neon")]
12690    unsafe fn test_vbsl_u64() {
12691        let a = u64x1::new(2);
12692        let b = u64x1::new(u64::MAX);
12693        let c = u64x1::new(u64::MIN);
12694        let e = u64x1::new(2);
12695        let r: u64x1 = transmute(vbsl_u64(transmute(a), transmute(b), transmute(c)));
12696        assert_eq!(r, e);
12697    }
12698    #[simd_test(enable = "neon")]
12699    unsafe fn test_vbsl_f32() {
12700        let a = u32x2::new(1, 0x80000000);
12701        let b = f32x2::new(8388609f32, -1.23f32);
12702        let c = f32x2::new(2097152f32, 2.34f32);
12703        let e = f32x2::new(2097152.25f32, -2.34f32);
12704        let r: f32x2 = transmute(vbsl_f32(transmute(a), transmute(b), transmute(c)));
12705        assert_eq!(r, e);
12706    }
12707    #[simd_test(enable = "neon")]
12708    unsafe fn test_vbsl_p8() {
12709        let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
12710        let b = u8x8::new(
12711            u8::MAX,
12712            u8::MAX,
12713            u8::MAX,
12714            u8::MAX,
12715            u8::MAX,
12716            u8::MAX,
12717            u8::MAX,
12718            u8::MAX,
12719        );
12720        let c = u8x8::new(
12721            u8::MIN,
12722            u8::MIN,
12723            u8::MIN,
12724            u8::MIN,
12725            u8::MIN,
12726            u8::MIN,
12727            u8::MIN,
12728            u8::MIN,
12729        );
12730        let e = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, u8::MIN, u8::MAX, u8::MIN);
12731        let r: u8x8 = transmute(vbsl_p8(transmute(a), transmute(b), transmute(c)));
12732        assert_eq!(r, e);
12733    }
12734    #[simd_test(enable = "neon")]
12735    unsafe fn test_vbsl_p16() {
12736        let a = u16x4::new(u16::MAX, 0, 1, 2);
12737        let b = u16x4::new(u16::MAX, u16::MAX, u16::MAX, u16::MAX);
12738        let c = u16x4::new(u16::MIN, u16::MIN, u16::MIN, u16::MIN);
12739        let e = u16x4::new(u16::MAX, 0, 1, 2);
12740        let r: u16x4 = transmute(vbsl_p16(transmute(a), transmute(b), transmute(c)));
12741        assert_eq!(r, e);
12742    }
12743    #[simd_test(enable = "neon")]
12744    unsafe fn test_vbslq_s8() {
12745        let a = u8x16::new(
12746            u8::MAX,
12747            1,
12748            u8::MAX,
12749            2,
12750            u8::MAX,
12751            0,
12752            u8::MAX,
12753            0,
12754            u8::MAX,
12755            0,
12756            u8::MAX,
12757            0,
12758            u8::MAX,
12759            0,
12760            u8::MAX,
12761            0,
12762        );
12763        let b = i8x16::new(
12764            i8::MAX,
12765            i8::MAX,
12766            i8::MAX,
12767            i8::MAX,
12768            i8::MAX,
12769            i8::MAX,
12770            i8::MAX,
12771            i8::MAX,
12772            i8::MAX,
12773            i8::MAX,
12774            i8::MAX,
12775            i8::MAX,
12776            i8::MAX,
12777            i8::MAX,
12778            i8::MAX,
12779            i8::MAX,
12780        );
12781        let c = i8x16::new(
12782            i8::MIN,
12783            i8::MIN,
12784            i8::MIN,
12785            i8::MIN,
12786            i8::MIN,
12787            i8::MIN,
12788            i8::MIN,
12789            i8::MIN,
12790            i8::MIN,
12791            i8::MIN,
12792            i8::MIN,
12793            i8::MIN,
12794            i8::MIN,
12795            i8::MIN,
12796            i8::MIN,
12797            i8::MIN,
12798        );
12799        let e = i8x16::new(
12800            i8::MAX,
12801            i8::MIN | 1,
12802            i8::MAX,
12803            i8::MIN | 2,
12804            i8::MAX,
12805            i8::MIN,
12806            i8::MAX,
12807            i8::MIN,
12808            i8::MAX,
12809            i8::MIN,
12810            i8::MAX,
12811            i8::MIN,
12812            i8::MAX,
12813            i8::MIN,
12814            i8::MAX,
12815            i8::MIN,
12816        );
12817        let r: i8x16 = transmute(vbslq_s8(transmute(a), transmute(b), transmute(c)));
12818        assert_eq!(r, e);
12819    }
12820    #[simd_test(enable = "neon")]
12821    unsafe fn test_vbslq_s16() {
12822        let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
12823        let b = i16x8::new(
12824            i16::MAX,
12825            i16::MAX,
12826            i16::MAX,
12827            i16::MAX,
12828            i16::MAX,
12829            i16::MAX,
12830            i16::MAX,
12831            i16::MAX,
12832        );
12833        let c = i16x8::new(
12834            i16::MIN,
12835            i16::MIN,
12836            i16::MIN,
12837            i16::MIN,
12838            i16::MIN,
12839            i16::MIN,
12840            i16::MIN,
12841            i16::MIN,
12842        );
12843        let e = i16x8::new(
12844            i16::MAX,
12845            i16::MIN | 1,
12846            i16::MAX,
12847            i16::MIN | 2,
12848            i16::MAX,
12849            i16::MIN,
12850            i16::MAX,
12851            i16::MIN,
12852        );
12853        let r: i16x8 = transmute(vbslq_s16(transmute(a), transmute(b), transmute(c)));
12854        assert_eq!(r, e);
12855    }
12856    #[simd_test(enable = "neon")]
12857    unsafe fn test_vbslq_s32() {
12858        let a = u32x4::new(u32::MAX, 1, u32::MAX, 2);
12859        let b = i32x4::new(i32::MAX, i32::MAX, i32::MAX, i32::MAX);
12860        let c = i32x4::new(i32::MIN, i32::MIN, i32::MIN, i32::MIN);
12861        let e = i32x4::new(i32::MAX, i32::MIN | 1, i32::MAX, i32::MIN | 2);
12862        let r: i32x4 = transmute(vbslq_s32(transmute(a), transmute(b), transmute(c)));
12863        assert_eq!(r, e);
12864    }
12865    #[simd_test(enable = "neon")]
12866    unsafe fn test_vbslq_s64() {
12867        let a = u64x2::new(u64::MAX, 1);
12868        let b = i64x2::new(i64::MAX, i64::MAX);
12869        let c = i64x2::new(i64::MIN, i64::MIN);
12870        let e = i64x2::new(i64::MAX, i64::MIN | 1);
12871        let r: i64x2 = transmute(vbslq_s64(transmute(a), transmute(b), transmute(c)));
12872        assert_eq!(r, e);
12873    }
12874    #[simd_test(enable = "neon")]
12875    unsafe fn test_vbslq_u8() {
12876        let a = u8x16::new(
12877            u8::MAX,
12878            1,
12879            u8::MAX,
12880            2,
12881            u8::MAX,
12882            0,
12883            u8::MAX,
12884            0,
12885            u8::MAX,
12886            0,
12887            u8::MAX,
12888            0,
12889            u8::MAX,
12890            0,
12891            u8::MAX,
12892            0,
12893        );
12894        let b = u8x16::new(
12895            u8::MAX,
12896            u8::MAX,
12897            u8::MAX,
12898            u8::MAX,
12899            u8::MAX,
12900            u8::MAX,
12901            u8::MAX,
12902            u8::MAX,
12903            u8::MAX,
12904            u8::MAX,
12905            u8::MAX,
12906            u8::MAX,
12907            u8::MAX,
12908            u8::MAX,
12909            u8::MAX,
12910            u8::MAX,
12911        );
12912        let c = u8x16::new(
12913            u8::MIN,
12914            u8::MIN,
12915            u8::MIN,
12916            u8::MIN,
12917            u8::MIN,
12918            u8::MIN,
12919            u8::MIN,
12920            u8::MIN,
12921            u8::MIN,
12922            u8::MIN,
12923            u8::MIN,
12924            u8::MIN,
12925            u8::MIN,
12926            u8::MIN,
12927            u8::MIN,
12928            u8::MIN,
12929        );
12930        let e = u8x16::new(
12931            u8::MAX,
12932            1,
12933            u8::MAX,
12934            2,
12935            u8::MAX,
12936            u8::MIN,
12937            u8::MAX,
12938            u8::MIN,
12939            u8::MAX,
12940            u8::MIN,
12941            u8::MAX,
12942            u8::MIN,
12943            u8::MAX,
12944            u8::MIN,
12945            u8::MAX,
12946            u8::MIN,
12947        );
12948        let r: u8x16 = transmute(vbslq_u8(transmute(a), transmute(b), transmute(c)));
12949        assert_eq!(r, e);
12950    }
12951    #[simd_test(enable = "neon")]
12952    unsafe fn test_vbslq_u16() {
12953        let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
12954        let b = u16x8::new(
12955            u16::MAX,
12956            u16::MAX,
12957            u16::MAX,
12958            u16::MAX,
12959            u16::MAX,
12960            u16::MAX,
12961            u16::MAX,
12962            u16::MAX,
12963        );
12964        let c = u16x8::new(
12965            u16::MIN,
12966            u16::MIN,
12967            u16::MIN,
12968            u16::MIN,
12969            u16::MIN,
12970            u16::MIN,
12971            u16::MIN,
12972            u16::MIN,
12973        );
12974        let e = u16x8::new(
12975            u16::MAX,
12976            1,
12977            u16::MAX,
12978            2,
12979            u16::MAX,
12980            u16::MIN,
12981            u16::MAX,
12982            u16::MIN,
12983        );
12984        let r: u16x8 = transmute(vbslq_u16(transmute(a), transmute(b), transmute(c)));
12985        assert_eq!(r, e);
12986    }
12987    #[simd_test(enable = "neon")]
12988    unsafe fn test_vbslq_u32() {
12989        let a = u32x4::new(u32::MAX, 1, u32::MAX, 2);
12990        let b = u32x4::new(u32::MAX, u32::MAX, u32::MAX, u32::MAX);
12991        let c = u32x4::new(u32::MIN, u32::MIN, u32::MIN, u32::MIN);
12992        let e = u32x4::new(u32::MAX, 1, u32::MAX, 2);
12993        let r: u32x4 = transmute(vbslq_u32(transmute(a), transmute(b), transmute(c)));
12994        assert_eq!(r, e);
12995    }
12996    #[simd_test(enable = "neon")]
12997    unsafe fn test_vbslq_u64() {
12998        let a = u64x2::new(u64::MAX, 1);
12999        let b = u64x2::new(u64::MAX, u64::MAX);
13000        let c = u64x2::new(u64::MIN, u64::MIN);
13001        let e = u64x2::new(u64::MAX, 1);
13002        let r: u64x2 = transmute(vbslq_u64(transmute(a), transmute(b), transmute(c)));
13003        assert_eq!(r, e);
13004    }
13005    #[simd_test(enable = "neon")]
13006    unsafe fn test_vbslq_f32() {
13007        let a = u32x4::new(u32::MAX, 0, 1, 0x80000000);
13008        let b = f32x4::new(-1.23f32, -1.23f32, 8388609f32, -1.23f32);
13009        let c = f32x4::new(2.34f32, 2.34f32, 2097152f32, 2.34f32);
13010        let e = f32x4::new(-1.23f32, 2.34f32, 2097152.25f32, -2.34f32);
13011        let r: f32x4 = transmute(vbslq_f32(transmute(a), transmute(b), transmute(c)));
13012        assert_eq!(r, e);
13013    }
13014    #[simd_test(enable = "neon")]
13015    unsafe fn test_vbslq_p8() {
13016        let a = u8x16::new(
13017            u8::MAX,
13018            1,
13019            u8::MAX,
13020            2,
13021            u8::MAX,
13022            0,
13023            u8::MAX,
13024            0,
13025            u8::MAX,
13026            0,
13027            u8::MAX,
13028            0,
13029            u8::MAX,
13030            0,
13031            u8::MAX,
13032            0,
13033        );
13034        let b = u8x16::new(
13035            u8::MAX,
13036            u8::MAX,
13037            u8::MAX,
13038            u8::MAX,
13039            u8::MAX,
13040            u8::MAX,
13041            u8::MAX,
13042            u8::MAX,
13043            u8::MAX,
13044            u8::MAX,
13045            u8::MAX,
13046            u8::MAX,
13047            u8::MAX,
13048            u8::MAX,
13049            u8::MAX,
13050            u8::MAX,
13051        );
13052        let c = u8x16::new(
13053            u8::MIN,
13054            u8::MIN,
13055            u8::MIN,
13056            u8::MIN,
13057            u8::MIN,
13058            u8::MIN,
13059            u8::MIN,
13060            u8::MIN,
13061            u8::MIN,
13062            u8::MIN,
13063            u8::MIN,
13064            u8::MIN,
13065            u8::MIN,
13066            u8::MIN,
13067            u8::MIN,
13068            u8::MIN,
13069        );
13070        let e = u8x16::new(
13071            u8::MAX,
13072            1,
13073            u8::MAX,
13074            2,
13075            u8::MAX,
13076            u8::MIN,
13077            u8::MAX,
13078            u8::MIN,
13079            u8::MAX,
13080            u8::MIN,
13081            u8::MAX,
13082            u8::MIN,
13083            u8::MAX,
13084            u8::MIN,
13085            u8::MAX,
13086            u8::MIN,
13087        );
13088        let r: u8x16 = transmute(vbslq_p8(transmute(a), transmute(b), transmute(c)));
13089        assert_eq!(r, e);
13090    }
13091    #[simd_test(enable = "neon")]
13092    unsafe fn test_vbslq_p16() {
13093        let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
13094        let b = u16x8::new(
13095            u16::MAX,
13096            u16::MAX,
13097            u16::MAX,
13098            u16::MAX,
13099            u16::MAX,
13100            u16::MAX,
13101            u16::MAX,
13102            u16::MAX,
13103        );
13104        let c = u16x8::new(
13105            u16::MIN,
13106            u16::MIN,
13107            u16::MIN,
13108            u16::MIN,
13109            u16::MIN,
13110            u16::MIN,
13111            u16::MIN,
13112            u16::MIN,
13113        );
13114        let e = u16x8::new(
13115            u16::MAX,
13116            1,
13117            u16::MAX,
13118            2,
13119            u16::MAX,
13120            u16::MIN,
13121            u16::MAX,
13122            u16::MIN,
13123        );
13124        let r: u16x8 = transmute(vbslq_p16(transmute(a), transmute(b), transmute(c)));
13125        assert_eq!(r, e);
13126    }
13127
13128    #[simd_test(enable = "neon")]
13129    unsafe fn test_vorn_s8() {
13130        let a = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7);
13131        let b = i8x8::new(-2, -2, -2, -2, -2, -2, -2, -2);
13132        let e = i8x8::new(1, -1, -1, -3, -3, -5, -5, -7);
13133        let r: i8x8 = transmute(vorn_s8(transmute(a), transmute(b)));
13134        assert_eq!(r, e);
13135    }
13136
13137    #[simd_test(enable = "neon")]
13138    unsafe fn test_vornq_s8() {
13139        let a = i8x16::new(
13140            0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15,
13141        );
13142        let b = i8x16::new(
13143            -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
13144        );
13145        let e = i8x16::new(
13146            1, -1, -1, -3, -3, -5, -5, -7, -7, -9, -9, -11, -11, -13, -13, -15,
13147        );
13148        let r: i8x16 = transmute(vornq_s8(transmute(a), transmute(b)));
13149        assert_eq!(r, e);
13150    }
13151
13152    #[simd_test(enable = "neon")]
13153    unsafe fn test_vorn_s16() {
13154        let a = i16x4::new(0, -1, -2, -3);
13155        let b = i16x4::new(-2, -2, -2, -2);
13156        let e = i16x4::new(1, -1, -1, -3);
13157        let r: i16x4 = transmute(vorn_s16(transmute(a), transmute(b)));
13158        assert_eq!(r, e);
13159    }
13160
13161    #[simd_test(enable = "neon")]
13162    unsafe fn test_vornq_s16() {
13163        let a = i16x8::new(0, -1, -2, -3, -4, -5, -6, -7);
13164        let b = i16x8::new(-2, -2, -2, -2, -2, -2, -2, -2);
13165        let e = i16x8::new(1, -1, -1, -3, -3, -5, -5, -7);
13166        let r: i16x8 = transmute(vornq_s16(transmute(a), transmute(b)));
13167        assert_eq!(r, e);
13168    }
13169
13170    #[simd_test(enable = "neon")]
13171    unsafe fn test_vorn_s32() {
13172        let a = i32x2::new(0, -1);
13173        let b = i32x2::new(-2, -2);
13174        let e = i32x2::new(1, -1);
13175        let r: i32x2 = transmute(vorn_s32(transmute(a), transmute(b)));
13176        assert_eq!(r, e);
13177    }
13178
13179    #[simd_test(enable = "neon")]
13180    unsafe fn test_vornq_s32() {
13181        let a = i32x4::new(0, -1, -2, -3);
13182        let b = i32x4::new(-2, -2, -2, -2);
13183        let e = i32x4::new(1, -1, -1, -3);
13184        let r: i32x4 = transmute(vornq_s32(transmute(a), transmute(b)));
13185        assert_eq!(r, e);
13186    }
13187
13188    #[simd_test(enable = "neon")]
13189    unsafe fn test_vorn_s64() {
13190        let a = i64x1::new(0);
13191        let b = i64x1::new(-2);
13192        let e = i64x1::new(1);
13193        let r: i64x1 = transmute(vorn_s64(transmute(a), transmute(b)));
13194        assert_eq!(r, e);
13195    }
13196
13197    #[simd_test(enable = "neon")]
13198    unsafe fn test_vornq_s64() {
13199        let a = i64x2::new(0, -1);
13200        let b = i64x2::new(-2, -2);
13201        let e = i64x2::new(1, -1);
13202        let r: i64x2 = transmute(vornq_s64(transmute(a), transmute(b)));
13203        assert_eq!(r, e);
13204    }
13205
13206    #[simd_test(enable = "neon")]
13207    unsafe fn test_vorn_u8() {
13208        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
13209        let t = u8::MAX - 1;
13210        let b = u8x8::new(t, t, t, t, t, t, t, t);
13211        let e = u8x8::new(1, 1, 3, 3, 5, 5, 7, 7);
13212        let r: u8x8 = transmute(vorn_u8(transmute(a), transmute(b)));
13213        assert_eq!(r, e);
13214    }
13215
13216    #[simd_test(enable = "neon")]
13217    unsafe fn test_vornq_u8() {
13218        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
13219        let t = u8::MAX - 1;
13220        let b = u8x16::new(t, t, t, t, t, t, t, t, t, t, t, t, t, t, t, t);
13221        let e = u8x16::new(1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15);
13222        let r: u8x16 = transmute(vornq_u8(transmute(a), transmute(b)));
13223        assert_eq!(r, e);
13224    }
13225
13226    #[simd_test(enable = "neon")]
13227    unsafe fn test_vorn_u16() {
13228        let a = u16x4::new(0, 1, 2, 3);
13229        let t = u16::MAX - 1;
13230        let b = u16x4::new(t, t, t, t);
13231        let e = u16x4::new(1, 1, 3, 3);
13232        let r: u16x4 = transmute(vorn_u16(transmute(a), transmute(b)));
13233        assert_eq!(r, e);
13234    }
13235
13236    #[simd_test(enable = "neon")]
13237    unsafe fn test_vornq_u16() {
13238        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
13239        let t = u16::MAX - 1;
13240        let b = u16x8::new(t, t, t, t, t, t, t, t);
13241        let e = u16x8::new(1, 1, 3, 3, 5, 5, 7, 7);
13242        let r: u16x8 = transmute(vornq_u16(transmute(a), transmute(b)));
13243        assert_eq!(r, e);
13244    }
13245
13246    #[simd_test(enable = "neon")]
13247    unsafe fn test_vorn_u32() {
13248        let a = u32x2::new(0, 1);
13249        let t = u32::MAX - 1;
13250        let b = u32x2::new(t, t);
13251        let e = u32x2::new(1, 1);
13252        let r: u32x2 = transmute(vorn_u32(transmute(a), transmute(b)));
13253        assert_eq!(r, e);
13254    }
13255
13256    #[simd_test(enable = "neon")]
13257    unsafe fn test_vornq_u32() {
13258        let a = u32x4::new(0, 1, 2, 3);
13259        let t = u32::MAX - 1;
13260        let b = u32x4::new(t, t, t, t);
13261        let e = u32x4::new(1, 1, 3, 3);
13262        let r: u32x4 = transmute(vornq_u32(transmute(a), transmute(b)));
13263        assert_eq!(r, e);
13264    }
13265
13266    #[simd_test(enable = "neon")]
13267    unsafe fn test_vorn_u64() {
13268        let a = u64x1::new(0);
13269        let t = u64::MAX - 1;
13270        let b = u64x1::new(t);
13271        let e = u64x1::new(1);
13272        let r: u64x1 = transmute(vorn_u64(transmute(a), transmute(b)));
13273        assert_eq!(r, e);
13274    }
13275
13276    #[simd_test(enable = "neon")]
13277    unsafe fn test_vornq_u64() {
13278        let a = u64x2::new(0, 1);
13279        let t = u64::MAX - 1;
13280        let b = u64x2::new(t, t);
13281        let e = u64x2::new(1, 1);
13282        let r: u64x2 = transmute(vornq_u64(transmute(a), transmute(b)));
13283        assert_eq!(r, e);
13284    }
13285
13286    #[simd_test(enable = "neon")]
13287    unsafe fn test_vmovn_s16() {
13288        let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13289        let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13290        let r: i8x8 = transmute(vmovn_s16(transmute(a)));
13291        assert_eq!(r, e);
13292    }
13293
13294    #[simd_test(enable = "neon")]
13295    unsafe fn test_vmovn_s32() {
13296        let a = i32x4::new(1, 2, 3, 4);
13297        let e = i16x4::new(1, 2, 3, 4);
13298        let r: i16x4 = transmute(vmovn_s32(transmute(a)));
13299        assert_eq!(r, e);
13300    }
13301
13302    #[simd_test(enable = "neon")]
13303    unsafe fn test_vmovn_s64() {
13304        let a = i64x2::new(1, 2);
13305        let e = i32x2::new(1, 2);
13306        let r: i32x2 = transmute(vmovn_s64(transmute(a)));
13307        assert_eq!(r, e);
13308    }
13309
13310    #[simd_test(enable = "neon")]
13311    unsafe fn test_vmovn_u16() {
13312        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13313        let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13314        let r: u8x8 = transmute(vmovn_u16(transmute(a)));
13315        assert_eq!(r, e);
13316    }
13317
13318    #[simd_test(enable = "neon")]
13319    unsafe fn test_vmovn_u32() {
13320        let a = u32x4::new(1, 2, 3, 4);
13321        let e = u16x4::new(1, 2, 3, 4);
13322        let r: u16x4 = transmute(vmovn_u32(transmute(a)));
13323        assert_eq!(r, e);
13324    }
13325
13326    #[simd_test(enable = "neon")]
13327    unsafe fn test_vmovn_u64() {
13328        let a = u64x2::new(1, 2);
13329        let e = u32x2::new(1, 2);
13330        let r: u32x2 = transmute(vmovn_u64(transmute(a)));
13331        assert_eq!(r, e);
13332    }
13333
13334    #[simd_test(enable = "neon")]
13335    unsafe fn test_vmovl_s8() {
13336        let e = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13337        let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13338        let r: i16x8 = transmute(vmovl_s8(transmute(a)));
13339        assert_eq!(r, e);
13340    }
13341
13342    #[simd_test(enable = "neon")]
13343    unsafe fn test_vmovl_s16() {
13344        let e = i32x4::new(1, 2, 3, 4);
13345        let a = i16x4::new(1, 2, 3, 4);
13346        let r: i32x4 = transmute(vmovl_s16(transmute(a)));
13347        assert_eq!(r, e);
13348    }
13349
13350    #[simd_test(enable = "neon")]
13351    unsafe fn test_vmovl_s32() {
13352        let e = i64x2::new(1, 2);
13353        let a = i32x2::new(1, 2);
13354        let r: i64x2 = transmute(vmovl_s32(transmute(a)));
13355        assert_eq!(r, e);
13356    }
13357
13358    #[simd_test(enable = "neon")]
13359    unsafe fn test_vmovl_u8() {
13360        let e = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13361        let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13362        let r: u16x8 = transmute(vmovl_u8(transmute(a)));
13363        assert_eq!(r, e);
13364    }
13365
13366    #[simd_test(enable = "neon")]
13367    unsafe fn test_vmovl_u16() {
13368        let e = u32x4::new(1, 2, 3, 4);
13369        let a = u16x4::new(1, 2, 3, 4);
13370        let r: u32x4 = transmute(vmovl_u16(transmute(a)));
13371        assert_eq!(r, e);
13372    }
13373
13374    #[simd_test(enable = "neon")]
13375    unsafe fn test_vmovl_u32() {
13376        let e = u64x2::new(1, 2);
13377        let a = u32x2::new(1, 2);
13378        let r: u64x2 = transmute(vmovl_u32(transmute(a)));
13379        assert_eq!(r, e);
13380    }
13381
13382    #[simd_test(enable = "neon")]
13383    unsafe fn test_vpmin_s8() {
13384        let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8);
13385        let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
13386        let e = i8x8::new(-2, -4, 5, 7, 0, 2, 4, 6);
13387        let r: i8x8 = transmute(vpmin_s8(transmute(a), transmute(b)));
13388        assert_eq!(r, e);
13389    }
13390
13391    #[simd_test(enable = "neon")]
13392    unsafe fn test_vpmin_s16() {
13393        let a = i16x4::new(1, 2, 3, -4);
13394        let b = i16x4::new(0, 3, 2, 5);
13395        let e = i16x4::new(1, -4, 0, 2);
13396        let r: i16x4 = transmute(vpmin_s16(transmute(a), transmute(b)));
13397        assert_eq!(r, e);
13398    }
13399
13400    #[simd_test(enable = "neon")]
13401    unsafe fn test_vpmin_s32() {
13402        let a = i32x2::new(1, -2);
13403        let b = i32x2::new(0, 3);
13404        let e = i32x2::new(-2, 0);
13405        let r: i32x2 = transmute(vpmin_s32(transmute(a), transmute(b)));
13406        assert_eq!(r, e);
13407    }
13408
13409    #[simd_test(enable = "neon")]
13410    unsafe fn test_vpmin_u8() {
13411        let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13412        let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
13413        let e = u8x8::new(1, 3, 5, 7, 0, 2, 4, 6);
13414        let r: u8x8 = transmute(vpmin_u8(transmute(a), transmute(b)));
13415        assert_eq!(r, e);
13416    }
13417
13418    #[simd_test(enable = "neon")]
13419    unsafe fn test_vpmin_u16() {
13420        let a = u16x4::new(1, 2, 3, 4);
13421        let b = u16x4::new(0, 3, 2, 5);
13422        let e = u16x4::new(1, 3, 0, 2);
13423        let r: u16x4 = transmute(vpmin_u16(transmute(a), transmute(b)));
13424        assert_eq!(r, e);
13425    }
13426
13427    #[simd_test(enable = "neon")]
13428    unsafe fn test_vpmin_u32() {
13429        let a = u32x2::new(1, 2);
13430        let b = u32x2::new(0, 3);
13431        let e = u32x2::new(1, 0);
13432        let r: u32x2 = transmute(vpmin_u32(transmute(a), transmute(b)));
13433        assert_eq!(r, e);
13434    }
13435
13436    #[simd_test(enable = "neon")]
13437    unsafe fn test_vpmin_f32() {
13438        let a = f32x2::new(1., -2.);
13439        let b = f32x2::new(0., 3.);
13440        let e = f32x2::new(-2., 0.);
13441        let r: f32x2 = transmute(vpmin_f32(transmute(a), transmute(b)));
13442        assert_eq!(r, e);
13443    }
13444
13445    #[simd_test(enable = "neon")]
13446    unsafe fn test_vpmax_s8() {
13447        let a = i8x8::new(1, -2, 3, -4, 5, 6, 7, 8);
13448        let b = i8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
13449        let e = i8x8::new(1, 3, 6, 8, 3, 5, 7, 9);
13450        let r: i8x8 = transmute(vpmax_s8(transmute(a), transmute(b)));
13451        assert_eq!(r, e);
13452    }
13453
13454    #[simd_test(enable = "neon")]
13455    unsafe fn test_vpmax_s16() {
13456        let a = i16x4::new(1, 2, 3, -4);
13457        let b = i16x4::new(0, 3, 2, 5);
13458        let e = i16x4::new(2, 3, 3, 5);
13459        let r: i16x4 = transmute(vpmax_s16(transmute(a), transmute(b)));
13460        assert_eq!(r, e);
13461    }
13462
13463    #[simd_test(enable = "neon")]
13464    unsafe fn test_vpmax_s32() {
13465        let a = i32x2::new(1, -2);
13466        let b = i32x2::new(0, 3);
13467        let e = i32x2::new(1, 3);
13468        let r: i32x2 = transmute(vpmax_s32(transmute(a), transmute(b)));
13469        assert_eq!(r, e);
13470    }
13471
13472    #[simd_test(enable = "neon")]
13473    unsafe fn test_vpmax_u8() {
13474        let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
13475        let b = u8x8::new(0, 3, 2, 5, 4, 7, 6, 9);
13476        let e = u8x8::new(2, 4, 6, 8, 3, 5, 7, 9);
13477        let r: u8x8 = transmute(vpmax_u8(transmute(a), transmute(b)));
13478        assert_eq!(r, e);
13479    }
13480
13481    #[simd_test(enable = "neon")]
13482    unsafe fn test_vpmax_u16() {
13483        let a = u16x4::new(1, 2, 3, 4);
13484        let b = u16x4::new(0, 3, 2, 5);
13485        let e = u16x4::new(2, 4, 3, 5);
13486        let r: u16x4 = transmute(vpmax_u16(transmute(a), transmute(b)));
13487        assert_eq!(r, e);
13488    }
13489
13490    #[simd_test(enable = "neon")]
13491    unsafe fn test_vpmax_u32() {
13492        let a = u32x2::new(1, 2);
13493        let b = u32x2::new(0, 3);
13494        let e = u32x2::new(2, 3);
13495        let r: u32x2 = transmute(vpmax_u32(transmute(a), transmute(b)));
13496        assert_eq!(r, e);
13497    }
13498
13499    #[simd_test(enable = "neon")]
13500    unsafe fn test_vpmax_f32() {
13501        let a = f32x2::new(1., -2.);
13502        let b = f32x2::new(0., 3.);
13503        let e = f32x2::new(1., 3.);
13504        let r: f32x2 = transmute(vpmax_f32(transmute(a), transmute(b)));
13505        assert_eq!(r, e);
13506    }
13507
13508    #[simd_test(enable = "neon")]
13509    unsafe fn test_vand_s8() {
13510        test_bit_s8(|i, j| vand_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
13511    }
13512    #[simd_test(enable = "neon")]
13513    unsafe fn test_vandq_s8() {
13514        testq_bit_s8(|i, j| vandq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
13515    }
13516    #[simd_test(enable = "neon")]
13517    unsafe fn test_vand_s16() {
13518        test_bit_s16(|i, j| vand_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
13519    }
13520    #[simd_test(enable = "neon")]
13521    unsafe fn test_vandq_s16() {
13522        testq_bit_s16(|i, j| vandq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
13523    }
13524    #[simd_test(enable = "neon")]
13525    unsafe fn test_vand_s32() {
13526        test_bit_s32(|i, j| vand_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
13527    }
13528    #[simd_test(enable = "neon")]
13529    unsafe fn test_vandq_s32() {
13530        testq_bit_s32(|i, j| vandq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
13531    }
13532    #[simd_test(enable = "neon")]
13533    unsafe fn test_vand_s64() {
13534        test_bit_s64(|i, j| vand_s64(i, j), |a: i64, b: i64| -> i64 { a & b });
13535    }
13536    #[simd_test(enable = "neon")]
13537    unsafe fn test_vandq_s64() {
13538        testq_bit_s64(|i, j| vandq_s64(i, j), |a: i64, b: i64| -> i64 { a & b });
13539    }
13540
13541    #[simd_test(enable = "neon")]
13542    unsafe fn test_vand_u8() {
13543        test_bit_u8(|i, j| vand_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
13544    }
13545    #[simd_test(enable = "neon")]
13546    unsafe fn test_vandq_u8() {
13547        testq_bit_u8(|i, j| vandq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
13548    }
13549    #[simd_test(enable = "neon")]
13550    unsafe fn test_vand_u16() {
13551        test_bit_u16(|i, j| vand_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
13552    }
13553    #[simd_test(enable = "neon")]
13554    unsafe fn test_vandq_u16() {
13555        testq_bit_u16(|i, j| vandq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
13556    }
13557    #[simd_test(enable = "neon")]
13558    unsafe fn test_vand_u32() {
13559        test_bit_u32(|i, j| vand_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
13560    }
13561    #[simd_test(enable = "neon")]
13562    unsafe fn test_vandq_u32() {
13563        testq_bit_u32(|i, j| vandq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
13564    }
13565    #[simd_test(enable = "neon")]
13566    unsafe fn test_vand_u64() {
13567        test_bit_u64(|i, j| vand_u64(i, j), |a: u64, b: u64| -> u64 { a & b });
13568    }
13569    #[simd_test(enable = "neon")]
13570    unsafe fn test_vandq_u64() {
13571        testq_bit_u64(|i, j| vandq_u64(i, j), |a: u64, b: u64| -> u64 { a & b });
13572    }
13573
13574    #[simd_test(enable = "neon")]
13575    unsafe fn test_vorr_s8() {
13576        test_bit_s8(|i, j| vorr_s8(i, j), |a: i8, b: i8| -> i8 { a | b });
13577    }
13578    #[simd_test(enable = "neon")]
13579    unsafe fn test_vorrq_s8() {
13580        testq_bit_s8(|i, j| vorrq_s8(i, j), |a: i8, b: i8| -> i8 { a | b });
13581    }
13582    #[simd_test(enable = "neon")]
13583    unsafe fn test_vorr_s16() {
13584        test_bit_s16(|i, j| vorr_s16(i, j), |a: i16, b: i16| -> i16 { a | b });
13585    }
13586    #[simd_test(enable = "neon")]
13587    unsafe fn test_vorrq_s16() {
13588        testq_bit_s16(|i, j| vorrq_s16(i, j), |a: i16, b: i16| -> i16 { a | b });
13589    }
13590    #[simd_test(enable = "neon")]
13591    unsafe fn test_vorr_s32() {
13592        test_bit_s32(|i, j| vorr_s32(i, j), |a: i32, b: i32| -> i32 { a | b });
13593    }
13594    #[simd_test(enable = "neon")]
13595    unsafe fn test_vorrq_s32() {
13596        testq_bit_s32(|i, j| vorrq_s32(i, j), |a: i32, b: i32| -> i32 { a | b });
13597    }
13598    #[simd_test(enable = "neon")]
13599    unsafe fn test_vorr_s64() {
13600        test_bit_s64(|i, j| vorr_s64(i, j), |a: i64, b: i64| -> i64 { a | b });
13601    }
13602    #[simd_test(enable = "neon")]
13603    unsafe fn test_vorrq_s64() {
13604        testq_bit_s64(|i, j| vorrq_s64(i, j), |a: i64, b: i64| -> i64 { a | b });
13605    }
13606
13607    #[simd_test(enable = "neon")]
13608    unsafe fn test_vorr_u8() {
13609        test_bit_u8(|i, j| vorr_u8(i, j), |a: u8, b: u8| -> u8 { a | b });
13610    }
13611    #[simd_test(enable = "neon")]
13612    unsafe fn test_vorrq_u8() {
13613        testq_bit_u8(|i, j| vorrq_u8(i, j), |a: u8, b: u8| -> u8 { a | b });
13614    }
13615    #[simd_test(enable = "neon")]
13616    unsafe fn test_vorr_u16() {
13617        test_bit_u16(|i, j| vorr_u16(i, j), |a: u16, b: u16| -> u16 { a | b });
13618    }
13619    #[simd_test(enable = "neon")]
13620    unsafe fn test_vorrq_u16() {
13621        testq_bit_u16(|i, j| vorrq_u16(i, j), |a: u16, b: u16| -> u16 { a | b });
13622    }
13623    #[simd_test(enable = "neon")]
13624    unsafe fn test_vorr_u32() {
13625        test_bit_u32(|i, j| vorr_u32(i, j), |a: u32, b: u32| -> u32 { a | b });
13626    }
13627    #[simd_test(enable = "neon")]
13628    unsafe fn test_vorrq_u32() {
13629        testq_bit_u32(|i, j| vorrq_u32(i, j), |a: u32, b: u32| -> u32 { a | b });
13630    }
13631    #[simd_test(enable = "neon")]
13632    unsafe fn test_vorr_u64() {
13633        test_bit_u64(|i, j| vorr_u64(i, j), |a: u64, b: u64| -> u64 { a | b });
13634    }
13635    #[simd_test(enable = "neon")]
13636    unsafe fn test_vorrq_u64() {
13637        testq_bit_u64(|i, j| vorrq_u64(i, j), |a: u64, b: u64| -> u64 { a | b });
13638    }
13639
13640    #[simd_test(enable = "neon")]
13641    unsafe fn test_veor_s8() {
13642        test_bit_s8(|i, j| veor_s8(i, j), |a: i8, b: i8| -> i8 { a ^ b });
13643    }
13644    #[simd_test(enable = "neon")]
13645    unsafe fn test_veorq_s8() {
13646        testq_bit_s8(|i, j| veorq_s8(i, j), |a: i8, b: i8| -> i8 { a ^ b });
13647    }
13648    #[simd_test(enable = "neon")]
13649    unsafe fn test_veor_s16() {
13650        test_bit_s16(|i, j| veor_s16(i, j), |a: i16, b: i16| -> i16 { a ^ b });
13651    }
13652    #[simd_test(enable = "neon")]
13653    unsafe fn test_veorq_s16() {
13654        testq_bit_s16(|i, j| veorq_s16(i, j), |a: i16, b: i16| -> i16 { a ^ b });
13655    }
13656    #[simd_test(enable = "neon")]
13657    unsafe fn test_veor_s32() {
13658        test_bit_s32(|i, j| veor_s32(i, j), |a: i32, b: i32| -> i32 { a ^ b });
13659    }
13660    #[simd_test(enable = "neon")]
13661    unsafe fn test_veorq_s32() {
13662        testq_bit_s32(|i, j| veorq_s32(i, j), |a: i32, b: i32| -> i32 { a ^ b });
13663    }
13664    #[simd_test(enable = "neon")]
13665    unsafe fn test_veor_s64() {
13666        test_bit_s64(|i, j| veor_s64(i, j), |a: i64, b: i64| -> i64 { a ^ b });
13667    }
13668    #[simd_test(enable = "neon")]
13669    unsafe fn test_veorq_s64() {
13670        testq_bit_s64(|i, j| veorq_s64(i, j), |a: i64, b: i64| -> i64 { a ^ b });
13671    }
13672
13673    #[simd_test(enable = "neon")]
13674    unsafe fn test_veor_u8() {
13675        test_bit_u8(|i, j| veor_u8(i, j), |a: u8, b: u8| -> u8 { a ^ b });
13676    }
13677    #[simd_test(enable = "neon")]
13678    unsafe fn test_veorq_u8() {
13679        testq_bit_u8(|i, j| veorq_u8(i, j), |a: u8, b: u8| -> u8 { a ^ b });
13680    }
13681    #[simd_test(enable = "neon")]
13682    unsafe fn test_veor_u16() {
13683        test_bit_u16(|i, j| veor_u16(i, j), |a: u16, b: u16| -> u16 { a ^ b });
13684    }
13685    #[simd_test(enable = "neon")]
13686    unsafe fn test_veorq_u16() {
13687        testq_bit_u16(|i, j| veorq_u16(i, j), |a: u16, b: u16| -> u16 { a ^ b });
13688    }
13689    #[simd_test(enable = "neon")]
13690    unsafe fn test_veor_u32() {
13691        test_bit_u32(|i, j| veor_u32(i, j), |a: u32, b: u32| -> u32 { a ^ b });
13692    }
13693    #[simd_test(enable = "neon")]
13694    unsafe fn test_veorq_u32() {
13695        testq_bit_u32(|i, j| veorq_u32(i, j), |a: u32, b: u32| -> u32 { a ^ b });
13696    }
13697    #[simd_test(enable = "neon")]
13698    unsafe fn test_veor_u64() {
13699        test_bit_u64(|i, j| veor_u64(i, j), |a: u64, b: u64| -> u64 { a ^ b });
13700    }
13701    #[simd_test(enable = "neon")]
13702    unsafe fn test_veorq_u64() {
13703        testq_bit_u64(|i, j| veorq_u64(i, j), |a: u64, b: u64| -> u64 { a ^ b });
13704    }
13705
13706    #[simd_test(enable = "neon")]
13707    unsafe fn test_vceq_s8() {
13708        test_cmp_s8(
13709            |i, j| vceq_s8(i, j),
13710            |a: i8, b: i8| -> u8 {
13711                if a == b {
13712                    0xFF
13713                } else {
13714                    0
13715                }
13716            },
13717        );
13718    }
13719    #[simd_test(enable = "neon")]
13720    unsafe fn test_vceqq_s8() {
13721        testq_cmp_s8(
13722            |i, j| vceqq_s8(i, j),
13723            |a: i8, b: i8| -> u8 {
13724                if a == b {
13725                    0xFF
13726                } else {
13727                    0
13728                }
13729            },
13730        );
13731    }
13732    #[simd_test(enable = "neon")]
13733    unsafe fn test_vceq_s16() {
13734        test_cmp_s16(
13735            |i, j| vceq_s16(i, j),
13736            |a: i16, b: i16| -> u16 {
13737                if a == b {
13738                    0xFFFF
13739                } else {
13740                    0
13741                }
13742            },
13743        );
13744    }
13745    #[simd_test(enable = "neon")]
13746    unsafe fn test_vceqq_s16() {
13747        testq_cmp_s16(
13748            |i, j| vceqq_s16(i, j),
13749            |a: i16, b: i16| -> u16 {
13750                if a == b {
13751                    0xFFFF
13752                } else {
13753                    0
13754                }
13755            },
13756        );
13757    }
13758    #[simd_test(enable = "neon")]
13759    unsafe fn test_vceq_s32() {
13760        test_cmp_s32(
13761            |i, j| vceq_s32(i, j),
13762            |a: i32, b: i32| -> u32 {
13763                if a == b {
13764                    0xFFFFFFFF
13765                } else {
13766                    0
13767                }
13768            },
13769        );
13770    }
13771    #[simd_test(enable = "neon")]
13772    unsafe fn test_vceqq_s32() {
13773        testq_cmp_s32(
13774            |i, j| vceqq_s32(i, j),
13775            |a: i32, b: i32| -> u32 {
13776                if a == b {
13777                    0xFFFFFFFF
13778                } else {
13779                    0
13780                }
13781            },
13782        );
13783    }
13784
13785    #[simd_test(enable = "neon")]
13786    unsafe fn test_vceq_u8() {
13787        test_cmp_u8(
13788            |i, j| vceq_u8(i, j),
13789            |a: u8, b: u8| -> u8 {
13790                if a == b {
13791                    0xFF
13792                } else {
13793                    0
13794                }
13795            },
13796        );
13797    }
13798    #[simd_test(enable = "neon")]
13799    unsafe fn test_vceqq_u8() {
13800        testq_cmp_u8(
13801            |i, j| vceqq_u8(i, j),
13802            |a: u8, b: u8| -> u8 {
13803                if a == b {
13804                    0xFF
13805                } else {
13806                    0
13807                }
13808            },
13809        );
13810    }
13811    #[simd_test(enable = "neon")]
13812    unsafe fn test_vceq_u16() {
13813        test_cmp_u16(
13814            |i, j| vceq_u16(i, j),
13815            |a: u16, b: u16| -> u16 {
13816                if a == b {
13817                    0xFFFF
13818                } else {
13819                    0
13820                }
13821            },
13822        );
13823    }
13824    #[simd_test(enable = "neon")]
13825    unsafe fn test_vceqq_u16() {
13826        testq_cmp_u16(
13827            |i, j| vceqq_u16(i, j),
13828            |a: u16, b: u16| -> u16 {
13829                if a == b {
13830                    0xFFFF
13831                } else {
13832                    0
13833                }
13834            },
13835        );
13836    }
13837    #[simd_test(enable = "neon")]
13838    unsafe fn test_vceq_u32() {
13839        test_cmp_u32(
13840            |i, j| vceq_u32(i, j),
13841            |a: u32, b: u32| -> u32 {
13842                if a == b {
13843                    0xFFFFFFFF
13844                } else {
13845                    0
13846                }
13847            },
13848        );
13849    }
13850    #[simd_test(enable = "neon")]
13851    unsafe fn test_vceqq_u32() {
13852        testq_cmp_u32(
13853            |i, j| vceqq_u32(i, j),
13854            |a: u32, b: u32| -> u32 {
13855                if a == b {
13856                    0xFFFFFFFF
13857                } else {
13858                    0
13859                }
13860            },
13861        );
13862    }
13863
13864    #[simd_test(enable = "neon")]
13865    unsafe fn test_vceq_f32() {
13866        test_cmp_f32(
13867            |i, j| vcge_f32(i, j),
13868            |a: f32, b: f32| -> u32 {
13869                if a == b {
13870                    0xFFFFFFFF
13871                } else {
13872                    0
13873                }
13874            },
13875        );
13876    }
13877    #[simd_test(enable = "neon")]
13878    unsafe fn test_vceqq_f32() {
13879        testq_cmp_f32(
13880            |i, j| vcgeq_f32(i, j),
13881            |a: f32, b: f32| -> u32 {
13882                if a == b {
13883                    0xFFFFFFFF
13884                } else {
13885                    0
13886                }
13887            },
13888        );
13889    }
13890
13891    #[simd_test(enable = "neon")]
13892    unsafe fn test_vcgt_s8() {
13893        test_cmp_s8(
13894            |i, j| vcgt_s8(i, j),
13895            |a: i8, b: i8| -> u8 {
13896                if a > b {
13897                    0xFF
13898                } else {
13899                    0
13900                }
13901            },
13902        );
13903    }
13904    #[simd_test(enable = "neon")]
13905    unsafe fn test_vcgtq_s8() {
13906        testq_cmp_s8(
13907            |i, j| vcgtq_s8(i, j),
13908            |a: i8, b: i8| -> u8 {
13909                if a > b {
13910                    0xFF
13911                } else {
13912                    0
13913                }
13914            },
13915        );
13916    }
13917    #[simd_test(enable = "neon")]
13918    unsafe fn test_vcgt_s16() {
13919        test_cmp_s16(
13920            |i, j| vcgt_s16(i, j),
13921            |a: i16, b: i16| -> u16 {
13922                if a > b {
13923                    0xFFFF
13924                } else {
13925                    0
13926                }
13927            },
13928        );
13929    }
13930    #[simd_test(enable = "neon")]
13931    unsafe fn test_vcgtq_s16() {
13932        testq_cmp_s16(
13933            |i, j| vcgtq_s16(i, j),
13934            |a: i16, b: i16| -> u16 {
13935                if a > b {
13936                    0xFFFF
13937                } else {
13938                    0
13939                }
13940            },
13941        );
13942    }
13943    #[simd_test(enable = "neon")]
13944    unsafe fn test_vcgt_s32() {
13945        test_cmp_s32(
13946            |i, j| vcgt_s32(i, j),
13947            |a: i32, b: i32| -> u32 {
13948                if a > b {
13949                    0xFFFFFFFF
13950                } else {
13951                    0
13952                }
13953            },
13954        );
13955    }
13956    #[simd_test(enable = "neon")]
13957    unsafe fn test_vcgtq_s32() {
13958        testq_cmp_s32(
13959            |i, j| vcgtq_s32(i, j),
13960            |a: i32, b: i32| -> u32 {
13961                if a > b {
13962                    0xFFFFFFFF
13963                } else {
13964                    0
13965                }
13966            },
13967        );
13968    }
13969
13970    #[simd_test(enable = "neon")]
13971    unsafe fn test_vcgt_u8() {
13972        test_cmp_u8(
13973            |i, j| vcgt_u8(i, j),
13974            |a: u8, b: u8| -> u8 {
13975                if a > b {
13976                    0xFF
13977                } else {
13978                    0
13979                }
13980            },
13981        );
13982    }
13983    #[simd_test(enable = "neon")]
13984    unsafe fn test_vcgtq_u8() {
13985        testq_cmp_u8(
13986            |i, j| vcgtq_u8(i, j),
13987            |a: u8, b: u8| -> u8 {
13988                if a > b {
13989                    0xFF
13990                } else {
13991                    0
13992                }
13993            },
13994        );
13995    }
13996    #[simd_test(enable = "neon")]
13997    unsafe fn test_vcgt_u16() {
13998        test_cmp_u16(
13999            |i, j| vcgt_u16(i, j),
14000            |a: u16, b: u16| -> u16 {
14001                if a > b {
14002                    0xFFFF
14003                } else {
14004                    0
14005                }
14006            },
14007        );
14008    }
14009    #[simd_test(enable = "neon")]
14010    unsafe fn test_vcgtq_u16() {
14011        testq_cmp_u16(
14012            |i, j| vcgtq_u16(i, j),
14013            |a: u16, b: u16| -> u16 {
14014                if a > b {
14015                    0xFFFF
14016                } else {
14017                    0
14018                }
14019            },
14020        );
14021    }
14022    #[simd_test(enable = "neon")]
14023    unsafe fn test_vcgt_u32() {
14024        test_cmp_u32(
14025            |i, j| vcgt_u32(i, j),
14026            |a: u32, b: u32| -> u32 {
14027                if a > b {
14028                    0xFFFFFF
14029                } else {
14030                    0
14031                }
14032            },
14033        );
14034    }
14035    #[simd_test(enable = "neon")]
14036    unsafe fn test_vcgtq_u32() {
14037        testq_cmp_u32(
14038            |i, j| vcgtq_u32(i, j),
14039            |a: u32, b: u32| -> u32 {
14040                if a > b {
14041                    0xFFFFFFFF
14042                } else {
14043                    0
14044                }
14045            },
14046        );
14047    }
14048
14049    #[simd_test(enable = "neon")]
14050    unsafe fn test_vcgt_f32() {
14051        test_cmp_f32(
14052            |i, j| vcgt_f32(i, j),
14053            |a: f32, b: f32| -> u32 {
14054                if a > b {
14055                    0xFFFFFFFF
14056                } else {
14057                    0
14058                }
14059            },
14060        );
14061    }
14062    #[simd_test(enable = "neon")]
14063    unsafe fn test_vcgtq_f32() {
14064        testq_cmp_f32(
14065            |i, j| vcgtq_f32(i, j),
14066            |a: f32, b: f32| -> u32 {
14067                if a > b {
14068                    0xFFFFFFFF
14069                } else {
14070                    0
14071                }
14072            },
14073        );
14074    }
14075
14076    #[simd_test(enable = "neon")]
14077    unsafe fn test_vclt_s8() {
14078        test_cmp_s8(
14079            |i, j| vclt_s8(i, j),
14080            |a: i8, b: i8| -> u8 {
14081                if a < b {
14082                    0xFF
14083                } else {
14084                    0
14085                }
14086            },
14087        );
14088    }
14089    #[simd_test(enable = "neon")]
14090    unsafe fn test_vcltq_s8() {
14091        testq_cmp_s8(
14092            |i, j| vcltq_s8(i, j),
14093            |a: i8, b: i8| -> u8 {
14094                if a < b {
14095                    0xFF
14096                } else {
14097                    0
14098                }
14099            },
14100        );
14101    }
14102    #[simd_test(enable = "neon")]
14103    unsafe fn test_vclt_s16() {
14104        test_cmp_s16(
14105            |i, j| vclt_s16(i, j),
14106            |a: i16, b: i16| -> u16 {
14107                if a < b {
14108                    0xFFFF
14109                } else {
14110                    0
14111                }
14112            },
14113        );
14114    }
14115    #[simd_test(enable = "neon")]
14116    unsafe fn test_vcltq_s16() {
14117        testq_cmp_s16(
14118            |i, j| vcltq_s16(i, j),
14119            |a: i16, b: i16| -> u16 {
14120                if a < b {
14121                    0xFFFF
14122                } else {
14123                    0
14124                }
14125            },
14126        );
14127    }
14128    #[simd_test(enable = "neon")]
14129    unsafe fn test_vclt_s32() {
14130        test_cmp_s32(
14131            |i, j| vclt_s32(i, j),
14132            |a: i32, b: i32| -> u32 {
14133                if a < b {
14134                    0xFFFFFFFF
14135                } else {
14136                    0
14137                }
14138            },
14139        );
14140    }
14141    #[simd_test(enable = "neon")]
14142    unsafe fn test_vcltq_s32() {
14143        testq_cmp_s32(
14144            |i, j| vcltq_s32(i, j),
14145            |a: i32, b: i32| -> u32 {
14146                if a < b {
14147                    0xFFFFFFFF
14148                } else {
14149                    0
14150                }
14151            },
14152        );
14153    }
14154
14155    #[simd_test(enable = "neon")]
14156    unsafe fn test_vclt_u8() {
14157        test_cmp_u8(
14158            |i, j| vclt_u8(i, j),
14159            |a: u8, b: u8| -> u8 {
14160                if a < b {
14161                    0xFF
14162                } else {
14163                    0
14164                }
14165            },
14166        );
14167    }
14168    #[simd_test(enable = "neon")]
14169    unsafe fn test_vcltq_u8() {
14170        testq_cmp_u8(
14171            |i, j| vcltq_u8(i, j),
14172            |a: u8, b: u8| -> u8 {
14173                if a < b {
14174                    0xFF
14175                } else {
14176                    0
14177                }
14178            },
14179        );
14180    }
14181    #[simd_test(enable = "neon")]
14182    unsafe fn test_vclt_u16() {
14183        test_cmp_u16(
14184            |i, j| vclt_u16(i, j),
14185            |a: u16, b: u16| -> u16 {
14186                if a < b {
14187                    0xFFFF
14188                } else {
14189                    0
14190                }
14191            },
14192        );
14193    }
14194    #[simd_test(enable = "neon")]
14195    unsafe fn test_vcltq_u16() {
14196        testq_cmp_u16(
14197            |i, j| vcltq_u16(i, j),
14198            |a: u16, b: u16| -> u16 {
14199                if a < b {
14200                    0xFFFF
14201                } else {
14202                    0
14203                }
14204            },
14205        );
14206    }
14207    #[simd_test(enable = "neon")]
14208    unsafe fn test_vclt_u32() {
14209        test_cmp_u32(
14210            |i, j| vclt_u32(i, j),
14211            |a: u32, b: u32| -> u32 {
14212                if a < b {
14213                    0xFFFFFF
14214                } else {
14215                    0
14216                }
14217            },
14218        );
14219    }
14220    #[simd_test(enable = "neon")]
14221    unsafe fn test_vcltq_u32() {
14222        testq_cmp_u32(
14223            |i, j| vcltq_u32(i, j),
14224            |a: u32, b: u32| -> u32 {
14225                if a < b {
14226                    0xFFFFFFFF
14227                } else {
14228                    0
14229                }
14230            },
14231        );
14232    }
14233
14234    #[simd_test(enable = "neon")]
14235    unsafe fn test_vclt_f32() {
14236        test_cmp_f32(
14237            |i, j| vclt_f32(i, j),
14238            |a: f32, b: f32| -> u32 {
14239                if a < b {
14240                    0xFFFFFFFF
14241                } else {
14242                    0
14243                }
14244            },
14245        );
14246    }
14247    #[simd_test(enable = "neon")]
14248    unsafe fn test_vcltq_f32() {
14249        testq_cmp_f32(
14250            |i, j| vcltq_f32(i, j),
14251            |a: f32, b: f32| -> u32 {
14252                if a < b {
14253                    0xFFFFFFFF
14254                } else {
14255                    0
14256                }
14257            },
14258        );
14259    }
14260
14261    #[simd_test(enable = "neon")]
14262    unsafe fn test_vcle_s8() {
14263        test_cmp_s8(
14264            |i, j| vcle_s8(i, j),
14265            |a: i8, b: i8| -> u8 {
14266                if a <= b {
14267                    0xFF
14268                } else {
14269                    0
14270                }
14271            },
14272        );
14273    }
14274    #[simd_test(enable = "neon")]
14275    unsafe fn test_vcleq_s8() {
14276        testq_cmp_s8(
14277            |i, j| vcleq_s8(i, j),
14278            |a: i8, b: i8| -> u8 {
14279                if a <= b {
14280                    0xFF
14281                } else {
14282                    0
14283                }
14284            },
14285        );
14286    }
14287    #[simd_test(enable = "neon")]
14288    unsafe fn test_vcle_s16() {
14289        test_cmp_s16(
14290            |i, j| vcle_s16(i, j),
14291            |a: i16, b: i16| -> u16 {
14292                if a <= b {
14293                    0xFFFF
14294                } else {
14295                    0
14296                }
14297            },
14298        );
14299    }
14300    #[simd_test(enable = "neon")]
14301    unsafe fn test_vcleq_s16() {
14302        testq_cmp_s16(
14303            |i, j| vcleq_s16(i, j),
14304            |a: i16, b: i16| -> u16 {
14305                if a <= b {
14306                    0xFFFF
14307                } else {
14308                    0
14309                }
14310            },
14311        );
14312    }
14313    #[simd_test(enable = "neon")]
14314    unsafe fn test_vcle_s32() {
14315        test_cmp_s32(
14316            |i, j| vcle_s32(i, j),
14317            |a: i32, b: i32| -> u32 {
14318                if a <= b {
14319                    0xFFFFFFFF
14320                } else {
14321                    0
14322                }
14323            },
14324        );
14325    }
14326    #[simd_test(enable = "neon")]
14327    unsafe fn test_vcleq_s32() {
14328        testq_cmp_s32(
14329            |i, j| vcleq_s32(i, j),
14330            |a: i32, b: i32| -> u32 {
14331                if a <= b {
14332                    0xFFFFFFFF
14333                } else {
14334                    0
14335                }
14336            },
14337        );
14338    }
14339
14340    #[simd_test(enable = "neon")]
14341    unsafe fn test_vcle_u8() {
14342        test_cmp_u8(
14343            |i, j| vcle_u8(i, j),
14344            |a: u8, b: u8| -> u8 {
14345                if a <= b {
14346                    0xFF
14347                } else {
14348                    0
14349                }
14350            },
14351        );
14352    }
14353    #[simd_test(enable = "neon")]
14354    unsafe fn test_vcleq_u8() {
14355        testq_cmp_u8(
14356            |i, j| vcleq_u8(i, j),
14357            |a: u8, b: u8| -> u8 {
14358                if a <= b {
14359                    0xFF
14360                } else {
14361                    0
14362                }
14363            },
14364        );
14365    }
14366    #[simd_test(enable = "neon")]
14367    unsafe fn test_vcle_u16() {
14368        test_cmp_u16(
14369            |i, j| vcle_u16(i, j),
14370            |a: u16, b: u16| -> u16 {
14371                if a <= b {
14372                    0xFFFF
14373                } else {
14374                    0
14375                }
14376            },
14377        );
14378    }
14379    #[simd_test(enable = "neon")]
14380    unsafe fn test_vcleq_u16() {
14381        testq_cmp_u16(
14382            |i, j| vcleq_u16(i, j),
14383            |a: u16, b: u16| -> u16 {
14384                if a <= b {
14385                    0xFFFF
14386                } else {
14387                    0
14388                }
14389            },
14390        );
14391    }
14392    #[simd_test(enable = "neon")]
14393    unsafe fn test_vcle_u32() {
14394        test_cmp_u32(
14395            |i, j| vcle_u32(i, j),
14396            |a: u32, b: u32| -> u32 {
14397                if a <= b {
14398                    0xFFFFFFFF
14399                } else {
14400                    0
14401                }
14402            },
14403        );
14404    }
14405    #[simd_test(enable = "neon")]
14406    unsafe fn test_vcleq_u32() {
14407        testq_cmp_u32(
14408            |i, j| vcleq_u32(i, j),
14409            |a: u32, b: u32| -> u32 {
14410                if a <= b {
14411                    0xFFFFFFFF
14412                } else {
14413                    0
14414                }
14415            },
14416        );
14417    }
14418
14419    #[simd_test(enable = "neon")]
14420    unsafe fn test_vcle_f32() {
14421        test_cmp_f32(
14422            |i, j| vcle_f32(i, j),
14423            |a: f32, b: f32| -> u32 {
14424                if a <= b {
14425                    0xFFFFFFFF
14426                } else {
14427                    0
14428                }
14429            },
14430        );
14431    }
14432    #[simd_test(enable = "neon")]
14433    unsafe fn test_vcleq_f32() {
14434        testq_cmp_f32(
14435            |i, j| vcleq_f32(i, j),
14436            |a: f32, b: f32| -> u32 {
14437                if a <= b {
14438                    0xFFFFFFFF
14439                } else {
14440                    0
14441                }
14442            },
14443        );
14444    }
14445
14446    #[simd_test(enable = "neon")]
14447    unsafe fn test_vcge_s8() {
14448        test_cmp_s8(
14449            |i, j| vcge_s8(i, j),
14450            |a: i8, b: i8| -> u8 {
14451                if a >= b {
14452                    0xFF
14453                } else {
14454                    0
14455                }
14456            },
14457        );
14458    }
14459    #[simd_test(enable = "neon")]
14460    unsafe fn test_vcgeq_s8() {
14461        testq_cmp_s8(
14462            |i, j| vcgeq_s8(i, j),
14463            |a: i8, b: i8| -> u8 {
14464                if a >= b {
14465                    0xFF
14466                } else {
14467                    0
14468                }
14469            },
14470        );
14471    }
14472    #[simd_test(enable = "neon")]
14473    unsafe fn test_vcge_s16() {
14474        test_cmp_s16(
14475            |i, j| vcge_s16(i, j),
14476            |a: i16, b: i16| -> u16 {
14477                if a >= b {
14478                    0xFFFF
14479                } else {
14480                    0
14481                }
14482            },
14483        );
14484    }
14485    #[simd_test(enable = "neon")]
14486    unsafe fn test_vcgeq_s16() {
14487        testq_cmp_s16(
14488            |i, j| vcgeq_s16(i, j),
14489            |a: i16, b: i16| -> u16 {
14490                if a >= b {
14491                    0xFFFF
14492                } else {
14493                    0
14494                }
14495            },
14496        );
14497    }
14498    #[simd_test(enable = "neon")]
14499    unsafe fn test_vcge_s32() {
14500        test_cmp_s32(
14501            |i, j| vcge_s32(i, j),
14502            |a: i32, b: i32| -> u32 {
14503                if a >= b {
14504                    0xFFFFFFFF
14505                } else {
14506                    0
14507                }
14508            },
14509        );
14510    }
14511    #[simd_test(enable = "neon")]
14512    unsafe fn test_vcgeq_s32() {
14513        testq_cmp_s32(
14514            |i, j| vcgeq_s32(i, j),
14515            |a: i32, b: i32| -> u32 {
14516                if a >= b {
14517                    0xFFFFFFFF
14518                } else {
14519                    0
14520                }
14521            },
14522        );
14523    }
14524
14525    #[simd_test(enable = "neon")]
14526    unsafe fn test_vcge_u8() {
14527        test_cmp_u8(
14528            |i, j| vcge_u8(i, j),
14529            |a: u8, b: u8| -> u8 {
14530                if a >= b {
14531                    0xFF
14532                } else {
14533                    0
14534                }
14535            },
14536        );
14537    }
14538    #[simd_test(enable = "neon")]
14539    unsafe fn test_vcgeq_u8() {
14540        testq_cmp_u8(
14541            |i, j| vcgeq_u8(i, j),
14542            |a: u8, b: u8| -> u8 {
14543                if a >= b {
14544                    0xFF
14545                } else {
14546                    0
14547                }
14548            },
14549        );
14550    }
14551    #[simd_test(enable = "neon")]
14552    unsafe fn test_vcge_u16() {
14553        test_cmp_u16(
14554            |i, j| vcge_u16(i, j),
14555            |a: u16, b: u16| -> u16 {
14556                if a >= b {
14557                    0xFFFF
14558                } else {
14559                    0
14560                }
14561            },
14562        );
14563    }
14564    #[simd_test(enable = "neon")]
14565    unsafe fn test_vcgeq_u16() {
14566        testq_cmp_u16(
14567            |i, j| vcgeq_u16(i, j),
14568            |a: u16, b: u16| -> u16 {
14569                if a >= b {
14570                    0xFFFF
14571                } else {
14572                    0
14573                }
14574            },
14575        );
14576    }
14577    #[simd_test(enable = "neon")]
14578    unsafe fn test_vcge_u32() {
14579        test_cmp_u32(
14580            |i, j| vcge_u32(i, j),
14581            |a: u32, b: u32| -> u32 {
14582                if a >= b {
14583                    0xFFFFFFFF
14584                } else {
14585                    0
14586                }
14587            },
14588        );
14589    }
14590    #[simd_test(enable = "neon")]
14591    unsafe fn test_vcgeq_u32() {
14592        testq_cmp_u32(
14593            |i, j| vcgeq_u32(i, j),
14594            |a: u32, b: u32| -> u32 {
14595                if a >= b {
14596                    0xFFFFFFFF
14597                } else {
14598                    0
14599                }
14600            },
14601        );
14602    }
14603
14604    #[simd_test(enable = "neon")]
14605    unsafe fn test_vcge_f32() {
14606        test_cmp_f32(
14607            |i, j| vcge_f32(i, j),
14608            |a: f32, b: f32| -> u32 {
14609                if a >= b {
14610                    0xFFFFFFFF
14611                } else {
14612                    0
14613                }
14614            },
14615        );
14616    }
14617    #[simd_test(enable = "neon")]
14618    unsafe fn test_vcgeq_f32() {
14619        testq_cmp_f32(
14620            |i, j| vcgeq_f32(i, j),
14621            |a: f32, b: f32| -> u32 {
14622                if a >= b {
14623                    0xFFFFFFFF
14624                } else {
14625                    0
14626                }
14627            },
14628        );
14629    }
14630
14631    #[simd_test(enable = "neon")]
14632    unsafe fn test_vqsub_s8() {
14633        test_ari_s8(
14634            |i, j| vqsub_s8(i, j),
14635            |a: i8, b: i8| -> i8 { a.saturating_sub(b) },
14636        );
14637    }
14638    #[simd_test(enable = "neon")]
14639    unsafe fn test_vqsubq_s8() {
14640        testq_ari_s8(
14641            |i, j| vqsubq_s8(i, j),
14642            |a: i8, b: i8| -> i8 { a.saturating_sub(b) },
14643        );
14644    }
14645    #[simd_test(enable = "neon")]
14646    unsafe fn test_vqsub_s16() {
14647        test_ari_s16(
14648            |i, j| vqsub_s16(i, j),
14649            |a: i16, b: i16| -> i16 { a.saturating_sub(b) },
14650        );
14651    }
14652    #[simd_test(enable = "neon")]
14653    unsafe fn test_vqsubq_s16() {
14654        testq_ari_s16(
14655            |i, j| vqsubq_s16(i, j),
14656            |a: i16, b: i16| -> i16 { a.saturating_sub(b) },
14657        );
14658    }
14659    #[simd_test(enable = "neon")]
14660    unsafe fn test_vqsub_s32() {
14661        test_ari_s32(
14662            |i, j| vqsub_s32(i, j),
14663            |a: i32, b: i32| -> i32 { a.saturating_sub(b) },
14664        );
14665    }
14666    #[simd_test(enable = "neon")]
14667    unsafe fn test_vqsubq_s32() {
14668        testq_ari_s32(
14669            |i, j| vqsubq_s32(i, j),
14670            |a: i32, b: i32| -> i32 { a.saturating_sub(b) },
14671        );
14672    }
14673
14674    #[simd_test(enable = "neon")]
14675    unsafe fn test_vqsub_u8() {
14676        test_ari_u8(
14677            |i, j| vqsub_u8(i, j),
14678            |a: u8, b: u8| -> u8 { a.saturating_sub(b) },
14679        );
14680    }
14681    #[simd_test(enable = "neon")]
14682    unsafe fn test_vqsubq_u8() {
14683        testq_ari_u8(
14684            |i, j| vqsubq_u8(i, j),
14685            |a: u8, b: u8| -> u8 { a.saturating_sub(b) },
14686        );
14687    }
14688    #[simd_test(enable = "neon")]
14689    unsafe fn test_vqsub_u16() {
14690        test_ari_u16(
14691            |i, j| vqsub_u16(i, j),
14692            |a: u16, b: u16| -> u16 { a.saturating_sub(b) },
14693        );
14694    }
14695    #[simd_test(enable = "neon")]
14696    unsafe fn test_vqsubq_u16() {
14697        testq_ari_u16(
14698            |i, j| vqsubq_u16(i, j),
14699            |a: u16, b: u16| -> u16 { a.saturating_sub(b) },
14700        );
14701    }
14702    #[simd_test(enable = "neon")]
14703    unsafe fn test_vqsub_u32() {
14704        test_ari_u32(
14705            |i, j| vqsub_u32(i, j),
14706            |a: u32, b: u32| -> u32 { a.saturating_sub(b) },
14707        );
14708    }
14709    #[simd_test(enable = "neon")]
14710    unsafe fn test_vqsubq_u32() {
14711        testq_ari_u32(
14712            |i, j| vqsubq_u32(i, j),
14713            |a: u32, b: u32| -> u32 { a.saturating_sub(b) },
14714        );
14715    }
14716
14717    #[simd_test(enable = "neon")]
14718    unsafe fn test_vhadd_s8() {
14719        test_ari_s8(|i, j| vhadd_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
14720    }
14721    #[simd_test(enable = "neon")]
14722    unsafe fn test_vhaddq_s8() {
14723        testq_ari_s8(|i, j| vhaddq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
14724    }
14725    #[simd_test(enable = "neon")]
14726    unsafe fn test_vhadd_s16() {
14727        test_ari_s16(|i, j| vhadd_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
14728    }
14729    #[simd_test(enable = "neon")]
14730    unsafe fn test_vhaddq_s16() {
14731        testq_ari_s16(|i, j| vhaddq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
14732    }
14733    #[simd_test(enable = "neon")]
14734    unsafe fn test_vhadd_s32() {
14735        test_ari_s32(|i, j| vhadd_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
14736    }
14737    #[simd_test(enable = "neon")]
14738    unsafe fn test_vhaddq_s32() {
14739        testq_ari_s32(|i, j| vhaddq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
14740    }
14741
14742    #[simd_test(enable = "neon")]
14743    unsafe fn test_vhadd_u8() {
14744        test_ari_u8(|i, j| vhadd_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
14745    }
14746    #[simd_test(enable = "neon")]
14747    unsafe fn test_vhaddq_u8() {
14748        testq_ari_u8(|i, j| vhaddq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
14749    }
14750    #[simd_test(enable = "neon")]
14751    unsafe fn test_vhadd_u16() {
14752        test_ari_u16(|i, j| vhadd_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
14753    }
14754    #[simd_test(enable = "neon")]
14755    unsafe fn test_vhaddq_u16() {
14756        testq_ari_u16(|i, j| vhaddq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
14757    }
14758    #[simd_test(enable = "neon")]
14759    unsafe fn test_vhadd_u32() {
14760        test_ari_u32(|i, j| vhadd_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
14761    }
14762    #[simd_test(enable = "neon")]
14763    unsafe fn test_vhaddq_u32() {
14764        testq_ari_u32(|i, j| vhaddq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
14765    }
14766
14767    #[simd_test(enable = "neon")]
14768    unsafe fn test_vrhadd_s8() {
14769        test_ari_s8(|i, j| vrhadd_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
14770    }
14771    #[simd_test(enable = "neon")]
14772    unsafe fn test_vrhaddq_s8() {
14773        testq_ari_s8(|i, j| vrhaddq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
14774    }
14775    #[simd_test(enable = "neon")]
14776    unsafe fn test_vrhadd_s16() {
14777        test_ari_s16(|i, j| vrhadd_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
14778    }
14779    #[simd_test(enable = "neon")]
14780    unsafe fn test_vrhaddq_s16() {
14781        testq_ari_s16(|i, j| vrhaddq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
14782    }
14783    #[simd_test(enable = "neon")]
14784    unsafe fn test_vrhadd_s32() {
14785        test_ari_s32(|i, j| vrhadd_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
14786    }
14787    #[simd_test(enable = "neon")]
14788    unsafe fn test_vrhaddq_s32() {
14789        testq_ari_s32(|i, j| vrhaddq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
14790    }
14791
14792    #[simd_test(enable = "neon")]
14793    unsafe fn test_vrhadd_u8() {
14794        test_ari_u8(|i, j| vrhadd_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
14795    }
14796    #[simd_test(enable = "neon")]
14797    unsafe fn test_vrhaddq_u8() {
14798        testq_ari_u8(|i, j| vrhaddq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
14799    }
14800    #[simd_test(enable = "neon")]
14801    unsafe fn test_vrhadd_u16() {
14802        test_ari_u16(|i, j| vrhadd_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
14803    }
14804    #[simd_test(enable = "neon")]
14805    unsafe fn test_vrhaddq_u16() {
14806        testq_ari_u16(|i, j| vrhaddq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
14807    }
14808    #[simd_test(enable = "neon")]
14809    unsafe fn test_vrhadd_u32() {
14810        test_ari_u32(|i, j| vrhadd_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
14811    }
14812    #[simd_test(enable = "neon")]
14813    unsafe fn test_vrhaddq_u32() {
14814        testq_ari_u32(|i, j| vrhaddq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
14815    }
14816
14817    #[simd_test(enable = "neon")]
14818    unsafe fn test_vqadd_s8() {
14819        test_ari_s8(
14820            |i, j| vqadd_s8(i, j),
14821            |a: i8, b: i8| -> i8 { a.saturating_add(b) },
14822        );
14823    }
14824    #[simd_test(enable = "neon")]
14825    unsafe fn test_vqaddq_s8() {
14826        testq_ari_s8(
14827            |i, j| vqaddq_s8(i, j),
14828            |a: i8, b: i8| -> i8 { a.saturating_add(b) },
14829        );
14830    }
14831    #[simd_test(enable = "neon")]
14832    unsafe fn test_vqadd_s16() {
14833        test_ari_s16(
14834            |i, j| vqadd_s16(i, j),
14835            |a: i16, b: i16| -> i16 { a.saturating_add(b) },
14836        );
14837    }
14838    #[simd_test(enable = "neon")]
14839    unsafe fn test_vqaddq_s16() {
14840        testq_ari_s16(
14841            |i, j| vqaddq_s16(i, j),
14842            |a: i16, b: i16| -> i16 { a.saturating_add(b) },
14843        );
14844    }
14845    #[simd_test(enable = "neon")]
14846    unsafe fn test_vqadd_s32() {
14847        test_ari_s32(
14848            |i, j| vqadd_s32(i, j),
14849            |a: i32, b: i32| -> i32 { a.saturating_add(b) },
14850        );
14851    }
14852    #[simd_test(enable = "neon")]
14853    unsafe fn test_vqaddq_s32() {
14854        testq_ari_s32(
14855            |i, j| vqaddq_s32(i, j),
14856            |a: i32, b: i32| -> i32 { a.saturating_add(b) },
14857        );
14858    }
14859
14860    #[simd_test(enable = "neon")]
14861    unsafe fn test_vqadd_u8() {
14862        test_ari_u8(
14863            |i, j| vqadd_u8(i, j),
14864            |a: u8, b: u8| -> u8 { a.saturating_add(b) },
14865        );
14866    }
14867    #[simd_test(enable = "neon")]
14868    unsafe fn test_vqaddq_u8() {
14869        testq_ari_u8(
14870            |i, j| vqaddq_u8(i, j),
14871            |a: u8, b: u8| -> u8 { a.saturating_add(b) },
14872        );
14873    }
14874    #[simd_test(enable = "neon")]
14875    unsafe fn test_vqadd_u16() {
14876        test_ari_u16(
14877            |i, j| vqadd_u16(i, j),
14878            |a: u16, b: u16| -> u16 { a.saturating_add(b) },
14879        );
14880    }
14881    #[simd_test(enable = "neon")]
14882    unsafe fn test_vqaddq_u16() {
14883        testq_ari_u16(
14884            |i, j| vqaddq_u16(i, j),
14885            |a: u16, b: u16| -> u16 { a.saturating_add(b) },
14886        );
14887    }
14888    #[simd_test(enable = "neon")]
14889    unsafe fn test_vqadd_u32() {
14890        test_ari_u32(
14891            |i, j| vqadd_u32(i, j),
14892            |a: u32, b: u32| -> u32 { a.saturating_add(b) },
14893        );
14894    }
14895    #[simd_test(enable = "neon")]
14896    unsafe fn test_vqaddq_u32() {
14897        testq_ari_u32(
14898            |i, j| vqaddq_u32(i, j),
14899            |a: u32, b: u32| -> u32 { a.saturating_add(b) },
14900        );
14901    }
14902
14903    #[simd_test(enable = "neon")]
14904    unsafe fn test_vmul_s8() {
14905        test_ari_s8(
14906            |i, j| vmul_s8(i, j),
14907            |a: i8, b: i8| -> i8 { a.overflowing_mul(b).0 },
14908        );
14909    }
14910    #[simd_test(enable = "neon")]
14911    unsafe fn test_vmulq_s8() {
14912        testq_ari_s8(
14913            |i, j| vmulq_s8(i, j),
14914            |a: i8, b: i8| -> i8 { a.overflowing_mul(b).0 },
14915        );
14916    }
14917    #[simd_test(enable = "neon")]
14918    unsafe fn test_vmul_s16() {
14919        test_ari_s16(
14920            |i, j| vmul_s16(i, j),
14921            |a: i16, b: i16| -> i16 { a.overflowing_mul(b).0 },
14922        );
14923    }
14924    #[simd_test(enable = "neon")]
14925    unsafe fn test_vmulq_s16() {
14926        testq_ari_s16(
14927            |i, j| vmulq_s16(i, j),
14928            |a: i16, b: i16| -> i16 { a.overflowing_mul(b).0 },
14929        );
14930    }
14931    #[simd_test(enable = "neon")]
14932    unsafe fn test_vmul_s32() {
14933        test_ari_s32(
14934            |i, j| vmul_s32(i, j),
14935            |a: i32, b: i32| -> i32 { a.overflowing_mul(b).0 },
14936        );
14937    }
14938    #[simd_test(enable = "neon")]
14939    unsafe fn test_vmulq_s32() {
14940        testq_ari_s32(
14941            |i, j| vmulq_s32(i, j),
14942            |a: i32, b: i32| -> i32 { a.overflowing_mul(b).0 },
14943        );
14944    }
14945
14946    #[simd_test(enable = "neon")]
14947    unsafe fn test_vmul_u8() {
14948        test_ari_u8(
14949            |i, j| vmul_u8(i, j),
14950            |a: u8, b: u8| -> u8 { a.overflowing_mul(b).0 },
14951        );
14952    }
14953    #[simd_test(enable = "neon")]
14954    unsafe fn test_vmulq_u8() {
14955        testq_ari_u8(
14956            |i, j| vmulq_u8(i, j),
14957            |a: u8, b: u8| -> u8 { a.overflowing_mul(b).0 },
14958        );
14959    }
14960    #[simd_test(enable = "neon")]
14961    unsafe fn test_vmul_u16() {
14962        test_ari_u16(
14963            |i, j| vmul_u16(i, j),
14964            |a: u16, b: u16| -> u16 { a.overflowing_mul(b).0 },
14965        );
14966    }
14967    #[simd_test(enable = "neon")]
14968    unsafe fn test_vmulq_u16() {
14969        testq_ari_u16(
14970            |i, j| vmulq_u16(i, j),
14971            |a: u16, b: u16| -> u16 { a.overflowing_mul(b).0 },
14972        );
14973    }
14974    #[simd_test(enable = "neon")]
14975    unsafe fn test_vmul_u32() {
14976        test_ari_u32(
14977            |i, j| vmul_u32(i, j),
14978            |a: u32, b: u32| -> u32 { a.overflowing_mul(b).0 },
14979        );
14980    }
14981    #[simd_test(enable = "neon")]
14982    unsafe fn test_vmulq_u32() {
14983        testq_ari_u32(
14984            |i, j| vmulq_u32(i, j),
14985            |a: u32, b: u32| -> u32 { a.overflowing_mul(b).0 },
14986        );
14987    }
14988
14989    #[simd_test(enable = "neon")]
14990    unsafe fn test_vmul_f32() {
14991        test_ari_f32(|i, j| vmul_f32(i, j), |a: f32, b: f32| -> f32 { a * b });
14992    }
14993    #[simd_test(enable = "neon")]
14994    unsafe fn test_vmulq_f32() {
14995        testq_ari_f32(|i, j| vmulq_f32(i, j), |a: f32, b: f32| -> f32 { a * b });
14996    }
14997
14998    #[simd_test(enable = "neon")]
14999    unsafe fn test_vsub_s8() {
15000        test_ari_s8(|i, j| vsub_s8(i, j), |a: i8, b: i8| -> i8 { a - b });
15001    }
15002    #[simd_test(enable = "neon")]
15003    unsafe fn test_vsubq_s8() {
15004        testq_ari_s8(|i, j| vsubq_s8(i, j), |a: i8, b: i8| -> i8 { a - b });
15005    }
15006    #[simd_test(enable = "neon")]
15007    unsafe fn test_vsub_s16() {
15008        test_ari_s16(|i, j| vsub_s16(i, j), |a: i16, b: i16| -> i16 { a - b });
15009    }
15010    #[simd_test(enable = "neon")]
15011    unsafe fn test_vsubq_s16() {
15012        testq_ari_s16(|i, j| vsubq_s16(i, j), |a: i16, b: i16| -> i16 { a - b });
15013    }
15014    #[simd_test(enable = "neon")]
15015    unsafe fn test_vsub_s32() {
15016        test_ari_s32(|i, j| vsub_s32(i, j), |a: i32, b: i32| -> i32 { a - b });
15017    }
15018    #[simd_test(enable = "neon")]
15019    unsafe fn test_vsubq_s32() {
15020        testq_ari_s32(|i, j| vsubq_s32(i, j), |a: i32, b: i32| -> i32 { a - b });
15021    }
15022
15023    #[simd_test(enable = "neon")]
15024    unsafe fn test_vsub_u8() {
15025        test_ari_u8(|i, j| vsub_u8(i, j), |a: u8, b: u8| -> u8 { a - b });
15026    }
15027    #[simd_test(enable = "neon")]
15028    unsafe fn test_vsubq_u8() {
15029        testq_ari_u8(|i, j| vsubq_u8(i, j), |a: u8, b: u8| -> u8 { a - b });
15030    }
15031    #[simd_test(enable = "neon")]
15032    unsafe fn test_vsub_u16() {
15033        test_ari_u16(|i, j| vsub_u16(i, j), |a: u16, b: u16| -> u16 { a - b });
15034    }
15035    #[simd_test(enable = "neon")]
15036    unsafe fn test_vsubq_u16() {
15037        testq_ari_u16(|i, j| vsubq_u16(i, j), |a: u16, b: u16| -> u16 { a - b });
15038    }
15039    #[simd_test(enable = "neon")]
15040    unsafe fn test_vsub_u32() {
15041        test_ari_u32(|i, j| vsub_u32(i, j), |a: u32, b: u32| -> u32 { a - b });
15042    }
15043    #[simd_test(enable = "neon")]
15044    unsafe fn test_vsubq_u32() {
15045        testq_ari_u32(|i, j| vsubq_u32(i, j), |a: u32, b: u32| -> u32 { a - b });
15046    }
15047
15048    #[simd_test(enable = "neon")]
15049    unsafe fn test_vsub_f32() {
15050        test_ari_f32(|i, j| vsub_f32(i, j), |a: f32, b: f32| -> f32 { a - b });
15051    }
15052    #[simd_test(enable = "neon")]
15053    unsafe fn test_vsubq_f32() {
15054        testq_ari_f32(|i, j| vsubq_f32(i, j), |a: f32, b: f32| -> f32 { a - b });
15055    }
15056
15057    #[simd_test(enable = "neon")]
15058    unsafe fn test_vhsub_s8() {
15059        test_ari_s8(
15060            |i, j| vhsub_s8(i, j),
15061            |a: i8, b: i8| -> i8 { (((a as i16) - (b as i16)) / 2) as i8 },
15062        );
15063    }
15064    #[simd_test(enable = "neon")]
15065    unsafe fn test_vhsubq_s8() {
15066        testq_ari_s8(
15067            |i, j| vhsubq_s8(i, j),
15068            |a: i8, b: i8| -> i8 { (((a as i16) - (b as i16)) / 2) as i8 },
15069        );
15070    }
15071    #[simd_test(enable = "neon")]
15072    unsafe fn test_vhsub_s16() {
15073        test_ari_s16(
15074            |i, j| vhsub_s16(i, j),
15075            |a: i16, b: i16| -> i16 { (((a as i32) - (b as i32)) / 2) as i16 },
15076        );
15077    }
15078    #[simd_test(enable = "neon")]
15079    unsafe fn test_vhsubq_s16() {
15080        testq_ari_s16(
15081            |i, j| vhsubq_s16(i, j),
15082            |a: i16, b: i16| -> i16 { (((a as i32) - (b as i32)) / 2) as i16 },
15083        );
15084    }
15085    #[simd_test(enable = "neon")]
15086    unsafe fn test_vhsub_s32() {
15087        test_ari_s32(
15088            |i, j| vhsub_s32(i, j),
15089            |a: i32, b: i32| -> i32 { (((a as i64) - (b as i64)) / 2) as i32 },
15090        );
15091    }
15092    #[simd_test(enable = "neon")]
15093    unsafe fn test_vhsubq_s32() {
15094        testq_ari_s32(
15095            |i, j| vhsubq_s32(i, j),
15096            |a: i32, b: i32| -> i32 { (((a as i64) - (b as i64)) / 2) as i32 },
15097        );
15098    }
15099
15100    #[simd_test(enable = "neon")]
15101    unsafe fn test_vhsub_u8() {
15102        test_ari_u8(
15103            |i, j| vhsub_u8(i, j),
15104            |a: u8, b: u8| -> u8 { (((a as u16) - (b as u16)) / 2) as u8 },
15105        );
15106    }
15107    #[simd_test(enable = "neon")]
15108    unsafe fn test_vhsubq_u8() {
15109        testq_ari_u8(
15110            |i, j| vhsubq_u8(i, j),
15111            |a: u8, b: u8| -> u8 { (((a as u16) - (b as u16)) / 2) as u8 },
15112        );
15113    }
15114    #[simd_test(enable = "neon")]
15115    unsafe fn test_vhsub_u16() {
15116        test_ari_u16(
15117            |i, j| vhsub_u16(i, j),
15118            |a: u16, b: u16| -> u16 { (((a as u16) - (b as u16)) / 2) as u16 },
15119        );
15120    }
15121    #[simd_test(enable = "neon")]
15122    unsafe fn test_vhsubq_u16() {
15123        testq_ari_u16(
15124            |i, j| vhsubq_u16(i, j),
15125            |a: u16, b: u16| -> u16 { (((a as u16) - (b as u16)) / 2) as u16 },
15126        );
15127    }
15128    #[simd_test(enable = "neon")]
15129    unsafe fn test_vhsub_u32() {
15130        test_ari_u32(
15131            |i, j| vhsub_u32(i, j),
15132            |a: u32, b: u32| -> u32 { (((a as u64) - (b as u64)) / 2) as u32 },
15133        );
15134    }
15135    #[simd_test(enable = "neon")]
15136    unsafe fn test_vhsubq_u32() {
15137        testq_ari_u32(
15138            |i, j| vhsubq_u32(i, j),
15139            |a: u32, b: u32| -> u32 { (((a as u64) - (b as u64)) / 2) as u32 },
15140        );
15141    }
15142
15143    #[simd_test(enable = "neon")]
15144    unsafe fn test_vabs_s8() {
15145        let a = i8x8::new(-1, 0, 1, -2, 0, 2, -128, 127);
15146        let r: i8x8 = transmute(vabs_s8(transmute(a)));
15147        let e = i8x8::new(1, 0, 1, 2, 0, 2, -128, 127);
15148        assert_eq!(r, e);
15149    }
15150    #[simd_test(enable = "neon")]
15151    unsafe fn test_vabsq_s8() {
15152        let a = i8x16::new(-1, 0, 1, -2, 0, 2, -128, 127, -1, 0, 1, -2, 0, 2, -128, 127);
15153        let r: i8x16 = transmute(vabsq_s8(transmute(a)));
15154        let e = i8x16::new(1, 0, 1, 2, 0, 2, -128, 127, 1, 0, 1, 2, 0, 2, -128, 127);
15155        assert_eq!(r, e);
15156    }
15157    #[simd_test(enable = "neon")]
15158    unsafe fn test_vabs_s16() {
15159        let a = i16x4::new(-1, 0, i16::MIN, i16::MAX);
15160        let r: i16x4 = transmute(vabs_s16(transmute(a)));
15161        let e = i16x4::new(1, 0, i16::MIN, i16::MAX);
15162        assert_eq!(r, e);
15163    }
15164    #[simd_test(enable = "neon")]
15165    unsafe fn test_vabsq_s16() {
15166        let a = i16x8::new(-1, 0, i16::MIN, i16::MAX, -1, 0, i16::MIN, i16::MAX);
15167        let r: i16x8 = transmute(vabsq_s16(transmute(a)));
15168        let e = i16x8::new(1, 0, i16::MIN, i16::MAX, 1, 0, i16::MIN, i16::MAX);
15169        assert_eq!(r, e);
15170    }
15171    #[simd_test(enable = "neon")]
15172    unsafe fn test_vabs_s32() {
15173        let a = i32x2::new(i32::MIN, i32::MIN + 1);
15174        let r: i32x2 = transmute(vabs_s32(transmute(a)));
15175        let e = i32x2::new(i32::MIN, i32::MAX);
15176        assert_eq!(r, e);
15177    }
15178    #[simd_test(enable = "neon")]
15179    unsafe fn test_vabsq_s32() {
15180        let a = i32x4::new(i32::MIN, i32::MIN + 1, 0, -1);
15181        let r: i32x4 = transmute(vabsq_s32(transmute(a)));
15182        let e = i32x4::new(i32::MIN, i32::MAX, 0, 1);
15183        assert_eq!(r, e);
15184    }
15185
15186    #[simd_test(enable = "neon")]
15187    unsafe fn test_vaba_s8() {
15188        let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15189        let b = i8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
15190        let c = i8x8::new(10, 9, 8, 7, 6, 5, 4, 3);
15191        let r: i8x8 = transmute(vaba_s8(transmute(a), transmute(b), transmute(c)));
15192        let e = i8x8::new(10, 10, 10, 10, 10, 10, 10, 10);
15193        assert_eq!(r, e);
15194    }
15195    #[simd_test(enable = "neon")]
15196    unsafe fn test_vaba_s16() {
15197        let a = i16x4::new(1, 2, 3, 4);
15198        let b = i16x4::new(1, 1, 1, 1);
15199        let c = i16x4::new(10, 9, 8, 7);
15200        let r: i16x4 = transmute(vaba_s16(transmute(a), transmute(b), transmute(c)));
15201        let e = i16x4::new(10, 10, 10, 10);
15202        assert_eq!(r, e);
15203    }
15204    #[simd_test(enable = "neon")]
15205    unsafe fn test_vaba_s32() {
15206        let a = i32x2::new(1, 2);
15207        let b = i32x2::new(1, 1);
15208        let c = i32x2::new(10, 9);
15209        let r: i32x2 = transmute(vaba_s32(transmute(a), transmute(b), transmute(c)));
15210        let e = i32x2::new(10, 10);
15211        assert_eq!(r, e);
15212    }
15213    #[simd_test(enable = "neon")]
15214    unsafe fn test_vaba_u8() {
15215        let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15216        let b = u8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
15217        let c = u8x8::new(10, 9, 8, 7, 6, 5, 4, 3);
15218        let r: u8x8 = transmute(vaba_u8(transmute(a), transmute(b), transmute(c)));
15219        let e = u8x8::new(10, 10, 10, 10, 10, 10, 10, 10);
15220        assert_eq!(r, e);
15221    }
15222    #[simd_test(enable = "neon")]
15223    unsafe fn test_vaba_u16() {
15224        let a = u16x4::new(1, 2, 3, 4);
15225        let b = u16x4::new(1, 1, 1, 1);
15226        let c = u16x4::new(10, 9, 8, 7);
15227        let r: u16x4 = transmute(vaba_u16(transmute(a), transmute(b), transmute(c)));
15228        let e = u16x4::new(10, 10, 10, 10);
15229        assert_eq!(r, e);
15230    }
15231    #[simd_test(enable = "neon")]
15232    unsafe fn test_vaba_u32() {
15233        let a = u32x2::new(1, 2);
15234        let b = u32x2::new(1, 1);
15235        let c = u32x2::new(10, 9);
15236        let r: u32x2 = transmute(vaba_u32(transmute(a), transmute(b), transmute(c)));
15237        let e = u32x2::new(10, 10);
15238        assert_eq!(r, e);
15239    }
15240    #[simd_test(enable = "neon")]
15241    unsafe fn test_vabaq_s8() {
15242        let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 8, 7, 6, 5, 4, 3, 2);
15243        let b = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
15244        let c = i8x16::new(10, 9, 8, 7, 6, 5, 4, 3, 12, 13, 14, 15, 16, 17, 18, 19);
15245        let r: i8x16 = transmute(vabaq_s8(transmute(a), transmute(b), transmute(c)));
15246        let e = i8x16::new(
15247            10, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 20, 20, 20,
15248        );
15249        assert_eq!(r, e);
15250    }
15251    #[simd_test(enable = "neon")]
15252    unsafe fn test_vabaq_s16() {
15253        let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15254        let b = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
15255        let c = i16x8::new(10, 9, 8, 7, 6, 5, 4, 3);
15256        let r: i16x8 = transmute(vabaq_s16(transmute(a), transmute(b), transmute(c)));
15257        let e = i16x8::new(10, 10, 10, 10, 10, 10, 10, 10);
15258        assert_eq!(r, e);
15259    }
15260    #[simd_test(enable = "neon")]
15261    unsafe fn test_vabaq_s32() {
15262        let a = i32x4::new(1, 2, 3, 4);
15263        let b = i32x4::new(1, 1, 1, 1);
15264        let c = i32x4::new(10, 9, 8, 7);
15265        let r: i32x4 = transmute(vabaq_s32(transmute(a), transmute(b), transmute(c)));
15266        let e = i32x4::new(10, 10, 10, 10);
15267        assert_eq!(r, e);
15268    }
15269    #[simd_test(enable = "neon")]
15270    unsafe fn test_vabaq_u8() {
15271        let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 8, 7, 6, 5, 4, 3, 2);
15272        let b = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
15273        let c = u8x16::new(10, 9, 8, 7, 6, 5, 4, 3, 12, 13, 14, 15, 16, 17, 18, 19);
15274        let r: u8x16 = transmute(vabaq_u8(transmute(a), transmute(b), transmute(c)));
15275        let e = u8x16::new(
15276            10, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 20, 20, 20,
15277        );
15278        assert_eq!(r, e);
15279    }
15280    #[simd_test(enable = "neon")]
15281    unsafe fn test_vabaq_u16() {
15282        let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15283        let b = u16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
15284        let c = u16x8::new(10, 9, 8, 7, 6, 5, 4, 3);
15285        let r: u16x8 = transmute(vabaq_u16(transmute(a), transmute(b), transmute(c)));
15286        let e = u16x8::new(10, 10, 10, 10, 10, 10, 10, 10);
15287        assert_eq!(r, e);
15288    }
15289    #[simd_test(enable = "neon")]
15290    unsafe fn test_vabaq_u32() {
15291        let a = u32x4::new(1, 2, 3, 4);
15292        let b = u32x4::new(1, 1, 1, 1);
15293        let c = u32x4::new(10, 9, 8, 7);
15294        let r: u32x4 = transmute(vabaq_u32(transmute(a), transmute(b), transmute(c)));
15295        let e = u32x4::new(10, 10, 10, 10);
15296        assert_eq!(r, e);
15297    }
15298
15299    #[simd_test(enable = "neon")]
15300    unsafe fn test_vpadd_s16() {
15301        let a = i16x4::new(1, 2, 3, 4);
15302        let b = i16x4::new(0, -1, -2, -3);
15303        let r: i16x4 = transmute(vpadd_s16(transmute(a), transmute(b)));
15304        let e = i16x4::new(3, 7, -1, -5);
15305        assert_eq!(r, e);
15306    }
15307    #[simd_test(enable = "neon")]
15308    unsafe fn test_vpadd_s32() {
15309        let a = i32x2::new(1, 2);
15310        let b = i32x2::new(0, -1);
15311        let r: i32x2 = transmute(vpadd_s32(transmute(a), transmute(b)));
15312        let e = i32x2::new(3, -1);
15313        assert_eq!(r, e);
15314    }
15315    #[simd_test(enable = "neon")]
15316    unsafe fn test_vpadd_s8() {
15317        let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15318        let b = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7);
15319        let r: i8x8 = transmute(vpadd_s8(transmute(a), transmute(b)));
15320        let e = i8x8::new(3, 7, 11, 15, -1, -5, -9, -13);
15321        assert_eq!(r, e);
15322    }
15323    #[simd_test(enable = "neon")]
15324    unsafe fn test_vpadd_u16() {
15325        let a = u16x4::new(1, 2, 3, 4);
15326        let b = u16x4::new(30, 31, 32, 33);
15327        let r: u16x4 = transmute(vpadd_u16(transmute(a), transmute(b)));
15328        let e = u16x4::new(3, 7, 61, 65);
15329        assert_eq!(r, e);
15330    }
15331    #[simd_test(enable = "neon")]
15332    unsafe fn test_vpadd_u32() {
15333        let a = u32x2::new(1, 2);
15334        let b = u32x2::new(30, 31);
15335        let r: u32x2 = transmute(vpadd_u32(transmute(a), transmute(b)));
15336        let e = u32x2::new(3, 61);
15337        assert_eq!(r, e);
15338    }
15339    #[simd_test(enable = "neon")]
15340    unsafe fn test_vpadd_u8() {
15341        let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
15342        let b = u8x8::new(30, 31, 32, 33, 34, 35, 36, 37);
15343        let r: u8x8 = transmute(vpadd_u8(transmute(a), transmute(b)));
15344        let e = u8x8::new(3, 7, 11, 15, 61, 65, 69, 73);
15345        assert_eq!(r, e);
15346    }
15347    #[simd_test(enable = "neon")]
15348    unsafe fn test_vcnt_s8() {
15349        let a: i8x8 = transmute(u8x8::new(
15350            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15351            0b00111111,
15352        ));
15353        let e = i8x8::new(3, 8, 0, 7, 2, 4, 1, 6);
15354        let r: i8x8 = transmute(vcnt_s8(transmute(a)));
15355        assert_eq!(r, e);
15356    }
15357    #[simd_test(enable = "neon")]
15358    unsafe fn test_vcntq_s8() {
15359        let a: i8x16 = transmute(u8x16::new(
15360            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15361            0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111,
15362            0b11100000, 0b00010000,
15363        ));
15364        let e = i8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1);
15365        let r: i8x16 = transmute(vcntq_s8(transmute(a)));
15366        assert_eq!(r, e);
15367    }
15368    #[simd_test(enable = "neon")]
15369    unsafe fn test_vcnt_u8() {
15370        let a = u8x8::new(
15371            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15372            0b00111111,
15373        );
15374        let e = u8x8::new(3, 8, 0, 7, 2, 4, 1, 6);
15375        let r: u8x8 = transmute(vcnt_u8(transmute(a)));
15376        assert_eq!(r, e);
15377    }
15378    #[simd_test(enable = "neon")]
15379    unsafe fn test_vcntq_u8() {
15380        let a = u8x16::new(
15381            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15382            0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111,
15383            0b11100000, 0b00010000,
15384        );
15385        let e = u8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1);
15386        let r: u8x16 = transmute(vcntq_u8(transmute(a)));
15387        assert_eq!(r, e);
15388    }
15389    #[simd_test(enable = "neon")]
15390    unsafe fn test_vcnt_p8() {
15391        let a = u8x8::new(
15392            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15393            0b00111111,
15394        );
15395        let e = u8x8::new(3, 8, 0, 7, 2, 4, 1, 6);
15396        let r: u8x8 = transmute(vcnt_p8(transmute(a)));
15397        assert_eq!(r, e);
15398    }
15399    #[simd_test(enable = "neon")]
15400    unsafe fn test_vcntq_p8() {
15401        let a = u8x16::new(
15402            0b11001000, 0b11111111, 0b00000000, 0b11011111, 0b10000001, 0b10101001, 0b00001000,
15403            0b00111111, 0b11101110, 0b00000000, 0b11111111, 0b00100001, 0b11111111, 0b10010111,
15404            0b11100000, 0b00010000,
15405        );
15406        let e = u8x16::new(3, 8, 0, 7, 2, 4, 1, 6, 6, 0, 8, 2, 8, 5, 3, 1);
15407        let r: u8x16 = transmute(vcntq_p8(transmute(a)));
15408        assert_eq!(r, e);
15409    }
15410    #[simd_test(enable = "neon")]
15411    unsafe fn test_vrev16_s8() {
15412        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15413        let r = i8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15414        let e: i8x8 = transmute(vrev16_s8(transmute(a)));
15415        assert_eq!(r, e);
15416    }
15417    #[simd_test(enable = "neon")]
15418    unsafe fn test_vrev16q_s8() {
15419        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15420        let r = i8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
15421        let e: i8x16 = transmute(vrev16q_s8(transmute(a)));
15422        assert_eq!(r, e);
15423    }
15424    #[simd_test(enable = "neon")]
15425    unsafe fn test_vrev16_u8() {
15426        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15427        let r = u8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15428        let e: u8x8 = transmute(vrev16_u8(transmute(a)));
15429        assert_eq!(r, e);
15430    }
15431    #[simd_test(enable = "neon")]
15432    unsafe fn test_vrev16q_u8() {
15433        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15434        let r = u8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
15435        let e: u8x16 = transmute(vrev16q_u8(transmute(a)));
15436        assert_eq!(r, e);
15437    }
15438    #[simd_test(enable = "neon")]
15439    unsafe fn test_vrev16_p8() {
15440        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15441        let r = i8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15442        let e: i8x8 = transmute(vrev16_p8(transmute(a)));
15443        assert_eq!(r, e);
15444    }
15445    #[simd_test(enable = "neon")]
15446    unsafe fn test_vrev16q_p8() {
15447        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15448        let r = u8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
15449        let e: u8x16 = transmute(vrev16q_p8(transmute(a)));
15450        assert_eq!(r, e);
15451    }
15452    #[simd_test(enable = "neon")]
15453    unsafe fn test_vrev32_s8() {
15454        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15455        let r = i8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15456        let e: i8x8 = transmute(vrev32_s8(transmute(a)));
15457        assert_eq!(r, e);
15458    }
15459    #[simd_test(enable = "neon")]
15460    unsafe fn test_vrev32q_s8() {
15461        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15462        let r = i8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
15463        let e: i8x16 = transmute(vrev32q_s8(transmute(a)));
15464        assert_eq!(r, e);
15465    }
15466    #[simd_test(enable = "neon")]
15467    unsafe fn test_vrev32_u8() {
15468        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15469        let r = u8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15470        let e: u8x8 = transmute(vrev32_u8(transmute(a)));
15471        assert_eq!(r, e);
15472    }
15473    #[simd_test(enable = "neon")]
15474    unsafe fn test_vrev32q_u8() {
15475        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15476        let r = u8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
15477        let e: u8x16 = transmute(vrev32q_u8(transmute(a)));
15478        assert_eq!(r, e);
15479    }
15480    #[simd_test(enable = "neon")]
15481    unsafe fn test_vrev32_s16() {
15482        let a = i16x4::new(0, 1, 2, 3);
15483        let r = i16x4::new(1, 0, 3, 2);
15484        let e: i16x4 = transmute(vrev32_s16(transmute(a)));
15485        assert_eq!(r, e);
15486    }
15487    #[simd_test(enable = "neon")]
15488    unsafe fn test_vrev32q_s16() {
15489        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15490        let r = i16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15491        let e: i16x8 = transmute(vrev32q_s16(transmute(a)));
15492        assert_eq!(r, e);
15493    }
15494    #[simd_test(enable = "neon")]
15495    unsafe fn test_vrev32_p16() {
15496        let a = i16x4::new(0, 1, 2, 3);
15497        let r = i16x4::new(1, 0, 3, 2);
15498        let e: i16x4 = transmute(vrev32_p16(transmute(a)));
15499        assert_eq!(r, e);
15500    }
15501    #[simd_test(enable = "neon")]
15502    unsafe fn test_vrev32q_p16() {
15503        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15504        let r = i16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15505        let e: i16x8 = transmute(vrev32q_p16(transmute(a)));
15506        assert_eq!(r, e);
15507    }
15508    #[simd_test(enable = "neon")]
15509    unsafe fn test_vrev32_u16() {
15510        let a = u16x4::new(0, 1, 2, 3);
15511        let r = u16x4::new(1, 0, 3, 2);
15512        let e: u16x4 = transmute(vrev32_u16(transmute(a)));
15513        assert_eq!(r, e);
15514    }
15515    #[simd_test(enable = "neon")]
15516    unsafe fn test_vrev32q_u16() {
15517        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15518        let r = u16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
15519        let e: u16x8 = transmute(vrev32q_u16(transmute(a)));
15520        assert_eq!(r, e);
15521    }
15522    #[simd_test(enable = "neon")]
15523    unsafe fn test_vrev32_p8() {
15524        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15525        let r = u8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15526        let e: u8x8 = transmute(vrev32_p8(transmute(a)));
15527        assert_eq!(r, e);
15528    }
15529    #[simd_test(enable = "neon")]
15530    unsafe fn test_vrev32q_p8() {
15531        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15532        let r = u8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
15533        let e: u8x16 = transmute(vrev32q_p8(transmute(a)));
15534        assert_eq!(r, e);
15535    }
15536    #[simd_test(enable = "neon")]
15537    unsafe fn test_vrev64_s8() {
15538        let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15539        let r = i8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
15540        let e: i8x8 = transmute(vrev64_s8(transmute(a)));
15541        assert_eq!(r, e);
15542    }
15543    #[simd_test(enable = "neon")]
15544    unsafe fn test_vrev64q_s8() {
15545        let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15546        let r = i8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
15547        let e: i8x16 = transmute(vrev64q_s8(transmute(a)));
15548        assert_eq!(r, e);
15549    }
15550    #[simd_test(enable = "neon")]
15551    unsafe fn test_vrev64_s16() {
15552        let a = i16x4::new(0, 1, 2, 3);
15553        let r = i16x4::new(3, 2, 1, 0);
15554        let e: i16x4 = transmute(vrev64_s16(transmute(a)));
15555        assert_eq!(r, e);
15556    }
15557    #[simd_test(enable = "neon")]
15558    unsafe fn test_vrev64q_s16() {
15559        let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15560        let r = i16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15561        let e: i16x8 = transmute(vrev64q_s16(transmute(a)));
15562        assert_eq!(r, e);
15563    }
15564    #[simd_test(enable = "neon")]
15565    unsafe fn test_vrev64_s32() {
15566        let a = i32x2::new(0, 1);
15567        let r = i32x2::new(1, 0);
15568        let e: i32x2 = transmute(vrev64_s32(transmute(a)));
15569        assert_eq!(r, e);
15570    }
15571    #[simd_test(enable = "neon")]
15572    unsafe fn test_vrev64q_s32() {
15573        let a = i32x4::new(0, 1, 2, 3);
15574        let r = i32x4::new(1, 0, 3, 2);
15575        let e: i32x4 = transmute(vrev64q_s32(transmute(a)));
15576        assert_eq!(r, e);
15577    }
15578    #[simd_test(enable = "neon")]
15579    unsafe fn test_vrev64_u8() {
15580        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15581        let r = u8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
15582        let e: u8x8 = transmute(vrev64_u8(transmute(a)));
15583        assert_eq!(r, e);
15584    }
15585    #[simd_test(enable = "neon")]
15586    unsafe fn test_vrev64q_u8() {
15587        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15588        let r = u8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
15589        let e: u8x16 = transmute(vrev64q_u8(transmute(a)));
15590        assert_eq!(r, e);
15591    }
15592    #[simd_test(enable = "neon")]
15593    unsafe fn test_vrev64_u16() {
15594        let a = u16x4::new(0, 1, 2, 3);
15595        let r = u16x4::new(3, 2, 1, 0);
15596        let e: u16x4 = transmute(vrev64_u16(transmute(a)));
15597        assert_eq!(r, e);
15598    }
15599    #[simd_test(enable = "neon")]
15600    unsafe fn test_vrev64q_u16() {
15601        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15602        let r = u16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15603        let e: u16x8 = transmute(vrev64q_u16(transmute(a)));
15604        assert_eq!(r, e);
15605    }
15606    #[simd_test(enable = "neon")]
15607    unsafe fn test_vrev64_u32() {
15608        let a = u32x2::new(0, 1);
15609        let r = u32x2::new(1, 0);
15610        let e: u32x2 = transmute(vrev64_u32(transmute(a)));
15611        assert_eq!(r, e);
15612    }
15613    #[simd_test(enable = "neon")]
15614    unsafe fn test_vrev64q_u32() {
15615        let a = u32x4::new(0, 1, 2, 3);
15616        let r = u32x4::new(1, 0, 3, 2);
15617        let e: u32x4 = transmute(vrev64q_u32(transmute(a)));
15618        assert_eq!(r, e);
15619    }
15620    #[simd_test(enable = "neon")]
15621    unsafe fn test_vrev64_f32() {
15622        let a = f32x2::new(1.0, 2.0);
15623        let r = f32x2::new(2.0, 1.0);
15624        let e: f32x2 = transmute(vrev64_f32(transmute(a)));
15625        assert_eq!(r, e);
15626    }
15627    #[simd_test(enable = "neon")]
15628    unsafe fn test_vrev64q_f32() {
15629        let a = f32x4::new(1.0, 2.0, -2.0, -1.0);
15630        let r = f32x4::new(2.0, 1.0, -1.0, -2.0);
15631        let e: f32x4 = transmute(vrev64q_f32(transmute(a)));
15632        assert_eq!(r, e);
15633    }
15634    #[simd_test(enable = "neon")]
15635    unsafe fn test_vrev64_p8() {
15636        let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15637        let r = u8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
15638        let e: u8x8 = transmute(vrev64_p8(transmute(a)));
15639        assert_eq!(r, e);
15640    }
15641    #[simd_test(enable = "neon")]
15642    unsafe fn test_vrev64q_p8() {
15643        let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
15644        let r = u8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
15645        let e: u8x16 = transmute(vrev64q_p8(transmute(a)));
15646        assert_eq!(r, e);
15647    }
15648    #[simd_test(enable = "neon")]
15649    unsafe fn test_vrev64_p16() {
15650        let a = u16x4::new(0, 1, 2, 3);
15651        let r = u16x4::new(3, 2, 1, 0);
15652        let e: u16x4 = transmute(vrev64_p16(transmute(a)));
15653        assert_eq!(r, e);
15654    }
15655    #[simd_test(enable = "neon")]
15656    unsafe fn test_vrev64q_p16() {
15657        let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
15658        let r = u16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
15659        let e: u16x8 = transmute(vrev64q_p16(transmute(a)));
15660        assert_eq!(r, e);
15661    }
15662    #[simd_test(enable = "neon,i8mm")]
15663    unsafe fn test_vmmlaq_s32() {
15664        let a = i32x4::new(1, 3, 4, -0x10000);
15665        let b = i8x16::new(1, 21, 31, 14, 5, 6, -128, 8, 9, 13, 15, 12, 13, -1, 20, 16);
15666        let c = i8x16::new(12, 22, 3, 4, -1, 56, 7, 8, 91, 10, -128, 15, 13, 14, 17, 16);
15667        let e = i32x4::new(123, -5353, 690, -65576);
15668        let r: i32x4 = transmute(vmmlaq_s32(transmute(a), transmute(b), transmute(c)));
15669        assert_eq!(r, e);
15670    }
15671
15672    #[simd_test(enable = "neon,i8mm")]
15673    unsafe fn test_vmmlaq_u32() {
15674        let a = u32x4::new(1, 3, 4, 0xffff0000);
15675        let b = u8x16::new(1, 21, 31, 14, 5, 6, 128, 8, 9, 13, 15, 12, 13, 255, 20, 16);
15676        let c = u8x16::new(12, 22, 3, 4, 255, 56, 7, 8, 91, 10, 128, 15, 13, 14, 17, 16);
15677        let e = u32x4::new(3195, 6935, 18354, 4294909144);
15678        let r: u32x4 = transmute(vmmlaq_u32(transmute(a), transmute(b), transmute(c)));
15679        assert_eq!(r, e);
15680    }
15681
15682    #[simd_test(enable = "neon,i8mm")]
15683    unsafe fn test_vusmmlaq_s32() {
15684        let a = i32x4::new(1, 3, 4, -0x10000);
15685        let b = u8x16::new(1, 21, 31, 14, 5, 6, 128, 8, 9, 13, 15, 12, 13, 255, 20, 16);
15686        let c = i8x16::new(12, 22, 3, 4, -1, 56, 7, 8, 91, 10, -128, 15, 13, 14, 17, 16);
15687        let e = i32x4::new(1915, -1001, 15026, -61992);
15688        let r: i32x4 = transmute(vusmmlaq_s32(transmute(a), transmute(b), transmute(c)));
15689        assert_eq!(r, e);
15690    }
15691
15692    macro_rules! test_vcombine {
15693        ($test_id:ident => $fn_id:ident ([$($a:expr),*], [$($b:expr),*])) => {
15694            #[allow(unused_assignments)]
15695            #[simd_test(enable = "neon")]
15696            unsafe fn $test_id() {
15697                let a = [$($a),*];
15698                let b = [$($b),*];
15699                let e = [$($a),* $(, $b)*];
15700                let c = $fn_id(transmute(a), transmute(b));
15701                let mut d = e;
15702                d = transmute(c);
15703                assert_eq!(d, e);
15704            }
15705        }
15706    }
15707
15708    test_vcombine!(test_vcombine_s8 => vcombine_s8([3_i8, -4, 5, -6, 7, 8, 9, 10], [13_i8, -14, 15, -16, 17, 18, 19, 110]));
15709    test_vcombine!(test_vcombine_u8 => vcombine_u8([3_u8, 4, 5, 6, 7, 8, 9, 10], [13_u8, 14, 15, 16, 17, 18, 19, 110]));
15710    test_vcombine!(test_vcombine_p8 => vcombine_p8([3_u8, 4, 5, 6, 7, 8, 9, 10], [13_u8, 14, 15, 16, 17, 18, 19, 110]));
15711
15712    test_vcombine!(test_vcombine_s16 => vcombine_s16([3_i16, -4, 5, -6], [13_i16, -14, 15, -16]));
15713    test_vcombine!(test_vcombine_u16 => vcombine_u16([3_u16, 4, 5, 6], [13_u16, 14, 15, 16]));
15714    test_vcombine!(test_vcombine_p16 => vcombine_p16([3_u16, 4, 5, 6], [13_u16, 14, 15, 16]));
15715    // FIXME: 16-bit floats
15716    // test_vcombine!(test_vcombine_f16 => vcombine_f16([3_f16, 4., 5., 6.],
15717    // [13_f16, 14., 15., 16.]));
15718
15719    test_vcombine!(test_vcombine_s32 => vcombine_s32([3_i32, -4], [13_i32, -14]));
15720    test_vcombine!(test_vcombine_u32 => vcombine_u32([3_u32, 4], [13_u32, 14]));
15721    // note: poly32x4 does not exist, and neither does vcombine_p32
15722    test_vcombine!(test_vcombine_f32 => vcombine_f32([3_f32, -4.], [13_f32, -14.]));
15723
15724    test_vcombine!(test_vcombine_s64 => vcombine_s64([-3_i64], [13_i64]));
15725    test_vcombine!(test_vcombine_u64 => vcombine_u64([3_u64], [13_u64]));
15726    test_vcombine!(test_vcombine_p64 => vcombine_p64([3_u64], [13_u64]));
15727    #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
15728    test_vcombine!(test_vcombine_f64 => vcombine_f64([-3_f64], [13_f64]));
15729}
15730
15731#[cfg(all(test, target_arch = "arm"))]
15732mod table_lookup_tests;
15733
15734#[cfg(all(test, target_arch = "arm"))]
15735mod shift_and_insert_tests;
15736
15737#[cfg(all(test, target_arch = "arm"))]
15738mod load_tests;
15739
15740#[cfg(all(test, target_arch = "arm"))]
15741mod store_tests;