core/stdarch/crates/core_arch/src/arm/
neon.rs

1use crate::core_arch::arm_shared::neon::*;
2use crate::mem::{align_of, transmute};
3
4#[cfg(test)]
5use stdarch_test::assert_instr;
6
7#[allow(improper_ctypes)]
8extern "unadjusted" {
9    #[link_name = "llvm.arm.neon.vbsl.v8i8"]
10    fn vbsl_s8_(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
11    #[link_name = "llvm.arm.neon.vbsl.v16i8"]
12    fn vbslq_s8_(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t;
13    #[link_name = "llvm.arm.neon.vpadals.v4i16.v8i8"]
14    pub(crate) fn vpadal_s8_(a: int16x4_t, b: int8x8_t) -> int16x4_t;
15    #[link_name = "llvm.arm.neon.vpadals.v2i32.v4i16"]
16    pub(crate) fn vpadal_s16_(a: int32x2_t, b: int16x4_t) -> int32x2_t;
17    #[link_name = "llvm.arm.neon.vpadals.v1i64.v2i32"]
18    pub(crate) fn vpadal_s32_(a: int64x1_t, b: int32x2_t) -> int64x1_t;
19    #[link_name = "llvm.arm.neon.vpadals.v8i16.v16i8"]
20    pub(crate) fn vpadalq_s8_(a: int16x8_t, b: int8x16_t) -> int16x8_t;
21    #[link_name = "llvm.arm.neon.vpadals.v4i32.v8i16"]
22    pub(crate) fn vpadalq_s16_(a: int32x4_t, b: int16x8_t) -> int32x4_t;
23    #[link_name = "llvm.arm.neon.vpadals.v2i64.v4i32"]
24    pub(crate) fn vpadalq_s32_(a: int64x2_t, b: int32x4_t) -> int64x2_t;
25
26    #[link_name = "llvm.arm.neon.vpadalu.v4i16.v8i8"]
27    pub(crate) fn vpadal_u8_(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t;
28    #[link_name = "llvm.arm.neon.vpadalu.v2i32.v4i16"]
29    pub(crate) fn vpadal_u16_(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t;
30    #[link_name = "llvm.arm.neon.vpadalu.v1i64.v2i32"]
31    pub(crate) fn vpadal_u32_(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t;
32    #[link_name = "llvm.arm.neon.vpadalu.v8i16.v16i8"]
33    pub(crate) fn vpadalq_u8_(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t;
34    #[link_name = "llvm.arm.neon.vpadalu.v4i32.v8i16"]
35    pub(crate) fn vpadalq_u16_(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t;
36    #[link_name = "llvm.arm.neon.vpadalu.v2i64.v4i32"]
37    pub(crate) fn vpadalq_u32_(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t;
38
39    #[link_name = "llvm.arm.neon.vtbl1"]
40    fn vtbl1(a: int8x8_t, b: int8x8_t) -> int8x8_t;
41    #[link_name = "llvm.arm.neon.vtbl2"]
42    fn vtbl2(a: int8x8_t, b: int8x8_t, b: int8x8_t) -> int8x8_t;
43    #[link_name = "llvm.arm.neon.vtbl3"]
44    fn vtbl3(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
45    #[link_name = "llvm.arm.neon.vtbl4"]
46    fn vtbl4(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t, d: int8x8_t) -> int8x8_t;
47
48    #[link_name = "llvm.arm.neon.vtbx1"]
49    fn vtbx1(a: int8x8_t, b: int8x8_t, b: int8x8_t) -> int8x8_t;
50    #[link_name = "llvm.arm.neon.vtbx2"]
51    fn vtbx2(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
52    #[link_name = "llvm.arm.neon.vtbx3"]
53    fn vtbx3(a: int8x8_t, b: int8x8_t, b: int8x8_t, c: int8x8_t, d: int8x8_t) -> int8x8_t;
54    #[link_name = "llvm.arm.neon.vtbx4"]
55    fn vtbx4(
56        a: int8x8_t,
57        b: int8x8_t,
58        b: int8x8_t,
59        c: int8x8_t,
60        d: int8x8_t,
61        e: int8x8_t,
62    ) -> int8x8_t;
63
64    #[link_name = "llvm.arm.neon.vshiftins.v8i8"]
65    fn vshiftins_v8i8(a: int8x8_t, b: int8x8_t, shift: int8x8_t) -> int8x8_t;
66    #[link_name = "llvm.arm.neon.vshiftins.v16i8"]
67    fn vshiftins_v16i8(a: int8x16_t, b: int8x16_t, shift: int8x16_t) -> int8x16_t;
68    #[link_name = "llvm.arm.neon.vshiftins.v4i16"]
69    fn vshiftins_v4i16(a: int16x4_t, b: int16x4_t, shift: int16x4_t) -> int16x4_t;
70    #[link_name = "llvm.arm.neon.vshiftins.v8i16"]
71    fn vshiftins_v8i16(a: int16x8_t, b: int16x8_t, shift: int16x8_t) -> int16x8_t;
72    #[link_name = "llvm.arm.neon.vshiftins.v2i32"]
73    fn vshiftins_v2i32(a: int32x2_t, b: int32x2_t, shift: int32x2_t) -> int32x2_t;
74    #[link_name = "llvm.arm.neon.vshiftins.v4i32"]
75    fn vshiftins_v4i32(a: int32x4_t, b: int32x4_t, shift: int32x4_t) -> int32x4_t;
76    #[link_name = "llvm.arm.neon.vshiftins.v1i64"]
77    fn vshiftins_v1i64(a: int64x1_t, b: int64x1_t, shift: int64x1_t) -> int64x1_t;
78    #[link_name = "llvm.arm.neon.vshiftins.v2i64"]
79    fn vshiftins_v2i64(a: int64x2_t, b: int64x2_t, shift: int64x2_t) -> int64x2_t;
80
81    #[link_name = "llvm.arm.neon.vld1.v8i8.p0i8"]
82    fn vld1_v8i8(addr: *const i8, align: i32) -> int8x8_t;
83    #[link_name = "llvm.arm.neon.vld1.v16i8.p0i8"]
84    fn vld1q_v16i8(addr: *const i8, align: i32) -> int8x16_t;
85    #[link_name = "llvm.arm.neon.vld1.v4i16.p0i8"]
86    fn vld1_v4i16(addr: *const i8, align: i32) -> int16x4_t;
87    #[link_name = "llvm.arm.neon.vld1.v8i16.p0i8"]
88    fn vld1q_v8i16(addr: *const i8, align: i32) -> int16x8_t;
89    #[link_name = "llvm.arm.neon.vld1.v2i32.p0i8"]
90    fn vld1_v2i32(addr: *const i8, align: i32) -> int32x2_t;
91    #[link_name = "llvm.arm.neon.vld1.v4i32.p0i8"]
92    fn vld1q_v4i32(addr: *const i8, align: i32) -> int32x4_t;
93    #[link_name = "llvm.arm.neon.vld1.v1i64.p0i8"]
94    fn vld1_v1i64(addr: *const i8, align: i32) -> int64x1_t;
95    #[link_name = "llvm.arm.neon.vld1.v2i64.p0i8"]
96    fn vld1q_v2i64(addr: *const i8, align: i32) -> int64x2_t;
97    #[link_name = "llvm.arm.neon.vld1.v2f32.p0i8"]
98    fn vld1_v2f32(addr: *const i8, align: i32) -> float32x2_t;
99    #[link_name = "llvm.arm.neon.vld1.v4f32.p0i8"]
100    fn vld1q_v4f32(addr: *const i8, align: i32) -> float32x4_t;
101
102    #[link_name = "llvm.arm.neon.vst1.p0i8.v8i8"]
103    fn vst1_v8i8(addr: *const i8, val: int8x8_t, align: i32);
104    #[link_name = "llvm.arm.neon.vst1.p0i8.v16i8"]
105    fn vst1q_v16i8(addr: *const i8, val: int8x16_t, align: i32);
106    #[link_name = "llvm.arm.neon.vst1.p0i8.v4i16"]
107    fn vst1_v4i16(addr: *const i8, val: int16x4_t, align: i32);
108    #[link_name = "llvm.arm.neon.vst1.p0i8.v8i16"]
109    fn vst1q_v8i16(addr: *const i8, val: int16x8_t, align: i32);
110    #[link_name = "llvm.arm.neon.vst1.p0i8.v2i32"]
111    fn vst1_v2i32(addr: *const i8, val: int32x2_t, align: i32);
112    #[link_name = "llvm.arm.neon.vst1.p0i8.v4i32"]
113    fn vst1q_v4i32(addr: *const i8, val: int32x4_t, align: i32);
114    #[link_name = "llvm.arm.neon.vst1.p0i8.v1i64"]
115    fn vst1_v1i64(addr: *const i8, val: int64x1_t, align: i32);
116    #[link_name = "llvm.arm.neon.vst1.p0i8.v2i64"]
117    fn vst1q_v2i64(addr: *const i8, val: int64x2_t, align: i32);
118    #[link_name = "llvm.arm.neon.vst1.p0i8.v2f32"]
119    fn vst1_v2f32(addr: *const i8, val: float32x2_t, align: i32);
120    #[link_name = "llvm.arm.neon.vst1.p0i8.v4f32"]
121    fn vst1q_v4f32(addr: *const i8, val: float32x4_t, align: i32);
122}
123
124/// Load multiple single-element structures to one, two, three, or four registers.
125#[inline]
126#[target_feature(enable = "neon,v7")]
127#[cfg_attr(test, assert_instr("vld1.8"))]
128#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
129pub unsafe fn vld1_s8(ptr: *const i8) -> int8x8_t {
130    vld1_v8i8(ptr as *const i8, align_of::<i8>() as i32)
131}
132
133/// Load multiple single-element structures to one, two, three, or four registers.
134#[inline]
135#[target_feature(enable = "neon,v7")]
136#[cfg_attr(test, assert_instr("vld1.8"))]
137#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
138pub unsafe fn vld1q_s8(ptr: *const i8) -> int8x16_t {
139    vld1q_v16i8(ptr as *const i8, align_of::<i8>() as i32)
140}
141
142/// Load multiple single-element structures to one, two, three, or four registers.
143#[inline]
144#[target_feature(enable = "neon,v7")]
145#[cfg_attr(test, assert_instr("vld1.16"))]
146#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
147pub unsafe fn vld1_s16(ptr: *const i16) -> int16x4_t {
148    vld1_v4i16(ptr as *const i8, align_of::<i16>() as i32)
149}
150
151/// Load multiple single-element structures to one, two, three, or four registers.
152#[inline]
153#[target_feature(enable = "neon,v7")]
154#[cfg_attr(test, assert_instr("vld1.16"))]
155#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
156pub unsafe fn vld1q_s16(ptr: *const i16) -> int16x8_t {
157    vld1q_v8i16(ptr as *const i8, align_of::<i16>() as i32)
158}
159
160/// Load multiple single-element structures to one, two, three, or four registers.
161#[inline]
162#[target_feature(enable = "neon,v7")]
163#[cfg_attr(test, assert_instr(vldr))]
164#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
165pub unsafe fn vld1_s32(ptr: *const i32) -> int32x2_t {
166    vld1_v2i32(ptr as *const i8, align_of::<i32>() as i32)
167}
168
169/// Load multiple single-element structures to one, two, three, or four registers.
170#[inline]
171#[target_feature(enable = "neon,v7")]
172#[cfg_attr(test, assert_instr("vld1.32"))]
173#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
174pub unsafe fn vld1q_s32(ptr: *const i32) -> int32x4_t {
175    vld1q_v4i32(ptr as *const i8, align_of::<i32>() as i32)
176}
177
178/// Load multiple single-element structures to one, two, three, or four registers.
179#[inline]
180#[target_feature(enable = "neon,v7")]
181#[cfg_attr(test, assert_instr(vldr))]
182#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
183pub unsafe fn vld1_s64(ptr: *const i64) -> int64x1_t {
184    vld1_v1i64(ptr as *const i8, align_of::<i64>() as i32)
185}
186
187/// Load multiple single-element structures to one, two, three, or four registers.
188#[inline]
189#[target_feature(enable = "neon,v7")]
190#[cfg_attr(test, assert_instr("vld1.64"))]
191#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
192pub unsafe fn vld1q_s64(ptr: *const i64) -> int64x2_t {
193    vld1q_v2i64(ptr as *const i8, align_of::<i64>() as i32)
194}
195
196/// Load multiple single-element structures to one, two, three, or four registers.
197#[inline]
198#[target_feature(enable = "neon,v7")]
199#[cfg_attr(test, assert_instr("vld1.8"))]
200#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
201pub unsafe fn vld1_u8(ptr: *const u8) -> uint8x8_t {
202    transmute(vld1_v8i8(ptr as *const i8, align_of::<u8>() as i32))
203}
204
205/// Load multiple single-element structures to one, two, three, or four registers.
206#[inline]
207#[target_feature(enable = "neon,v7")]
208#[cfg_attr(test, assert_instr("vld1.8"))]
209#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
210pub unsafe fn vld1q_u8(ptr: *const u8) -> uint8x16_t {
211    transmute(vld1q_v16i8(ptr as *const i8, align_of::<u8>() as i32))
212}
213
214/// Load multiple single-element structures to one, two, three, or four registers.
215#[inline]
216#[target_feature(enable = "neon,v7")]
217#[cfg_attr(test, assert_instr("vld1.16"))]
218#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
219pub unsafe fn vld1_u16(ptr: *const u16) -> uint16x4_t {
220    transmute(vld1_v4i16(ptr as *const i8, align_of::<u16>() as i32))
221}
222
223/// Load multiple single-element structures to one, two, three, or four registers.
224#[inline]
225#[target_feature(enable = "neon,v7")]
226#[cfg_attr(test, assert_instr("vld1.16"))]
227#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
228pub unsafe fn vld1q_u16(ptr: *const u16) -> uint16x8_t {
229    transmute(vld1q_v8i16(ptr as *const i8, align_of::<u16>() as i32))
230}
231
232/// Load multiple single-element structures to one, two, three, or four registers.
233#[inline]
234#[target_feature(enable = "neon,v7")]
235#[cfg_attr(test, assert_instr(vldr))]
236#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
237pub unsafe fn vld1_u32(ptr: *const u32) -> uint32x2_t {
238    transmute(vld1_v2i32(ptr as *const i8, align_of::<u32>() as i32))
239}
240
241/// Load multiple single-element structures to one, two, three, or four registers.
242#[inline]
243#[target_feature(enable = "neon,v7")]
244#[cfg_attr(test, assert_instr("vld1.32"))]
245#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
246pub unsafe fn vld1q_u32(ptr: *const u32) -> uint32x4_t {
247    transmute(vld1q_v4i32(ptr as *const i8, align_of::<u32>() as i32))
248}
249
250/// Load multiple single-element structures to one, two, three, or four registers.
251#[inline]
252#[target_feature(enable = "neon,v7")]
253#[cfg_attr(test, assert_instr(vldr))]
254#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
255pub unsafe fn vld1_u64(ptr: *const u64) -> uint64x1_t {
256    transmute(vld1_v1i64(ptr as *const i8, align_of::<u64>() as i32))
257}
258
259/// Load multiple single-element structures to one, two, three, or four registers.
260#[inline]
261#[target_feature(enable = "neon,v7")]
262#[cfg_attr(test, assert_instr("vld1.64"))]
263#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
264pub unsafe fn vld1q_u64(ptr: *const u64) -> uint64x2_t {
265    transmute(vld1q_v2i64(ptr as *const i8, align_of::<u64>() as i32))
266}
267
268/// Load multiple single-element structures to one, two, three, or four registers.
269#[inline]
270#[target_feature(enable = "neon,v7")]
271#[cfg_attr(test, assert_instr("vld1.8"))]
272#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
273pub unsafe fn vld1_p8(ptr: *const p8) -> poly8x8_t {
274    transmute(vld1_v8i8(ptr as *const i8, align_of::<p8>() as i32))
275}
276
277/// Load multiple single-element structures to one, two, three, or four registers.
278#[inline]
279#[target_feature(enable = "neon,v7")]
280#[cfg_attr(test, assert_instr("vld1.8"))]
281#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
282pub unsafe fn vld1q_p8(ptr: *const p8) -> poly8x16_t {
283    transmute(vld1q_v16i8(ptr as *const i8, align_of::<p8>() as i32))
284}
285
286/// Load multiple single-element structures to one, two, three, or four registers.
287#[inline]
288#[target_feature(enable = "neon,v7")]
289#[cfg_attr(test, assert_instr("vld1.16"))]
290#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
291pub unsafe fn vld1_p16(ptr: *const p16) -> poly16x4_t {
292    transmute(vld1_v4i16(ptr as *const i8, align_of::<p16>() as i32))
293}
294
295/// Load multiple single-element structures to one, two, three, or four registers.
296#[inline]
297#[target_feature(enable = "neon,v7")]
298#[cfg_attr(test, assert_instr("vld1.16"))]
299#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
300pub unsafe fn vld1q_p16(ptr: *const p16) -> poly16x8_t {
301    transmute(vld1q_v8i16(ptr as *const i8, align_of::<p16>() as i32))
302}
303
304/// Load multiple single-element structures to one, two, three, or four registers.
305///
306/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p64)
307#[inline]
308#[target_feature(enable = "neon,aes")]
309#[cfg_attr(test, assert_instr(vldr))]
310#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
311pub unsafe fn vld1_p64(ptr: *const p64) -> poly64x1_t {
312    transmute(vld1_v1i64(ptr as *const i8, align_of::<p64>() as i32))
313}
314
315/// Load multiple single-element structures to one, two, three, or four registers.
316///
317/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64)
318#[inline]
319#[target_feature(enable = "neon,aes")]
320#[cfg_attr(test, assert_instr("vld1.64"))]
321#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
322pub unsafe fn vld1q_p64(ptr: *const p64) -> poly64x2_t {
323    transmute(vld1q_v2i64(ptr as *const i8, align_of::<p64>() as i32))
324}
325
326/// Load multiple single-element structures to one, two, three, or four registers.
327#[inline]
328#[target_feature(enable = "neon,v7")]
329#[cfg_attr(test, assert_instr(vldr))]
330#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
331pub unsafe fn vld1_f32(ptr: *const f32) -> float32x2_t {
332    vld1_v2f32(ptr as *const i8, align_of::<f32>() as i32)
333}
334
335/// Load multiple single-element structures to one, two, three, or four registers.
336#[inline]
337#[target_feature(enable = "neon,v7")]
338#[cfg_attr(test, assert_instr("vld1.32"))]
339#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
340pub unsafe fn vld1q_f32(ptr: *const f32) -> float32x4_t {
341    vld1q_v4f32(ptr as *const i8, align_of::<f32>() as i32)
342}
343
344/// Store multiple single-element structures from one, two, three, or four registers.
345#[inline]
346#[target_feature(enable = "neon,v7")]
347#[cfg_attr(test, assert_instr("vst1.8"))]
348#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
349pub unsafe fn vst1_s8(ptr: *mut i8, a: int8x8_t) {
350    vst1_v8i8(ptr as *const i8, a, align_of::<i8>() as i32)
351}
352
353/// Store multiple single-element structures from one, two, three, or four registers.
354#[inline]
355#[target_feature(enable = "neon,v7")]
356#[cfg_attr(test, assert_instr("vst1.8"))]
357#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
358pub unsafe fn vst1q_s8(ptr: *mut i8, a: int8x16_t) {
359    vst1q_v16i8(ptr as *const i8, a, align_of::<i8>() as i32)
360}
361
362/// Store multiple single-element structures from one, two, three, or four registers.
363#[inline]
364#[target_feature(enable = "neon,v7")]
365#[cfg_attr(test, assert_instr("vst1.16"))]
366#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
367pub unsafe fn vst1_s16(ptr: *mut i16, a: int16x4_t) {
368    vst1_v4i16(ptr as *const i8, a, align_of::<i16>() as i32)
369}
370
371/// Store multiple single-element structures from one, two, three, or four registers.
372#[inline]
373#[target_feature(enable = "neon,v7")]
374#[cfg_attr(test, assert_instr("vst1.16"))]
375#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
376pub unsafe fn vst1q_s16(ptr: *mut i16, a: int16x8_t) {
377    vst1q_v8i16(ptr as *const i8, a, align_of::<i16>() as i32)
378}
379
380/// Store multiple single-element structures from one, two, three, or four registers.
381#[inline]
382#[target_feature(enable = "neon,v7")]
383#[cfg_attr(test, assert_instr("vst1.32"))]
384#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
385pub unsafe fn vst1_s32(ptr: *mut i32, a: int32x2_t) {
386    vst1_v2i32(ptr as *const i8, a, align_of::<i32>() as i32)
387}
388
389/// Store multiple single-element structures from one, two, three, or four registers.
390#[inline]
391#[target_feature(enable = "neon,v7")]
392#[cfg_attr(test, assert_instr("vst1.32"))]
393#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
394pub unsafe fn vst1q_s32(ptr: *mut i32, a: int32x4_t) {
395    vst1q_v4i32(ptr as *const i8, a, align_of::<i32>() as i32)
396}
397
398/// Store multiple single-element structures from one, two, three, or four registers.
399#[inline]
400#[target_feature(enable = "neon,v7")]
401#[cfg_attr(test, assert_instr("vst1.64"))]
402#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
403pub unsafe fn vst1_s64(ptr: *mut i64, a: int64x1_t) {
404    vst1_v1i64(ptr as *const i8, a, align_of::<i64>() as i32)
405}
406
407/// Store multiple single-element structures from one, two, three, or four registers.
408#[inline]
409#[target_feature(enable = "neon,v7")]
410#[cfg_attr(test, assert_instr("vst1.64"))]
411#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
412pub unsafe fn vst1q_s64(ptr: *mut i64, a: int64x2_t) {
413    vst1q_v2i64(ptr as *const i8, a, align_of::<i64>() as i32)
414}
415
416/// Store multiple single-element structures from one, two, three, or four registers.
417#[inline]
418#[target_feature(enable = "neon,v7")]
419#[cfg_attr(test, assert_instr("vst1.8"))]
420#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
421pub unsafe fn vst1_u8(ptr: *mut u8, a: uint8x8_t) {
422    vst1_v8i8(ptr as *const i8, transmute(a), align_of::<u8>() as i32)
423}
424
425/// Store multiple single-element structures from one, two, three, or four registers.
426#[inline]
427#[target_feature(enable = "neon,v7")]
428#[cfg_attr(test, assert_instr("vst1.8"))]
429#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
430pub unsafe fn vst1q_u8(ptr: *mut u8, a: uint8x16_t) {
431    vst1q_v16i8(ptr as *const i8, transmute(a), align_of::<u8>() as i32)
432}
433
434/// Store multiple single-element structures from one, two, three, or four registers.
435#[inline]
436#[target_feature(enable = "neon,v7")]
437#[cfg_attr(test, assert_instr("vst1.16"))]
438#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
439pub unsafe fn vst1_u16(ptr: *mut u16, a: uint16x4_t) {
440    vst1_v4i16(ptr as *const i8, transmute(a), align_of::<u16>() as i32)
441}
442
443/// Store multiple single-element structures from one, two, three, or four registers.
444#[inline]
445#[target_feature(enable = "neon,v7")]
446#[cfg_attr(test, assert_instr("vst1.16"))]
447#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
448pub unsafe fn vst1q_u16(ptr: *mut u16, a: uint16x8_t) {
449    vst1q_v8i16(ptr as *const i8, transmute(a), align_of::<u16>() as i32)
450}
451
452/// Store multiple single-element structures from one, two, three, or four registers.
453#[inline]
454#[target_feature(enable = "neon,v7")]
455#[cfg_attr(test, assert_instr("vst1.32"))]
456#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
457pub unsafe fn vst1_u32(ptr: *mut u32, a: uint32x2_t) {
458    vst1_v2i32(ptr as *const i8, transmute(a), align_of::<u32>() as i32)
459}
460
461/// Store multiple single-element structures from one, two, three, or four registers.
462#[inline]
463#[target_feature(enable = "neon,v7")]
464#[cfg_attr(test, assert_instr("vst1.32"))]
465#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
466pub unsafe fn vst1q_u32(ptr: *mut u32, a: uint32x4_t) {
467    vst1q_v4i32(ptr as *const i8, transmute(a), align_of::<u32>() as i32)
468}
469
470/// Store multiple single-element structures from one, two, three, or four registers.
471#[inline]
472#[target_feature(enable = "neon,v7")]
473#[cfg_attr(test, assert_instr("vst1.64"))]
474#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
475pub unsafe fn vst1_u64(ptr: *mut u64, a: uint64x1_t) {
476    vst1_v1i64(ptr as *const i8, transmute(a), align_of::<u64>() as i32)
477}
478
479/// Store multiple single-element structures from one, two, three, or four registers.
480#[inline]
481#[target_feature(enable = "neon,v7")]
482#[cfg_attr(test, assert_instr("vst1.64"))]
483#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
484pub unsafe fn vst1q_u64(ptr: *mut u64, a: uint64x2_t) {
485    vst1q_v2i64(ptr as *const i8, transmute(a), align_of::<u64>() as i32)
486}
487
488/// Store multiple single-element structures from one, two, three, or four registers.
489#[inline]
490#[target_feature(enable = "neon,v7")]
491#[cfg_attr(test, assert_instr("vst1.8"))]
492#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
493pub unsafe fn vst1_p8(ptr: *mut p8, a: poly8x8_t) {
494    vst1_v8i8(ptr as *const i8, transmute(a), align_of::<p8>() as i32)
495}
496
497/// Store multiple single-element structures from one, two, three, or four registers.
498#[inline]
499#[target_feature(enable = "neon,v7")]
500#[cfg_attr(test, assert_instr("vst1.8"))]
501#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
502pub unsafe fn vst1q_p8(ptr: *mut p8, a: poly8x16_t) {
503    vst1q_v16i8(ptr as *const i8, transmute(a), align_of::<p8>() as i32)
504}
505
506/// Store multiple single-element structures from one, two, three, or four registers.
507#[inline]
508#[target_feature(enable = "neon,v7")]
509#[cfg_attr(test, assert_instr("vst1.16"))]
510#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
511pub unsafe fn vst1_p16(ptr: *mut p16, a: poly16x4_t) {
512    vst1_v4i16(ptr as *const i8, transmute(a), align_of::<p16>() as i32)
513}
514
515/// Store multiple single-element structures from one, two, three, or four registers.
516#[inline]
517#[target_feature(enable = "neon,v7")]
518#[cfg_attr(test, assert_instr("vst1.16"))]
519#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
520pub unsafe fn vst1q_p16(ptr: *mut p16, a: poly16x8_t) {
521    vst1q_v8i16(ptr as *const i8, transmute(a), align_of::<p8>() as i32)
522}
523
524/// Store multiple single-element structures from one, two, three, or four registers.
525///
526/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1_p64)
527#[inline]
528#[target_feature(enable = "neon,aes,v8")]
529#[cfg_attr(test, assert_instr("vst1.64"))]
530#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
531pub unsafe fn vst1_p64(ptr: *mut p64, a: poly64x1_t) {
532    vst1_v1i64(ptr as *const i8, transmute(a), align_of::<p64>() as i32)
533}
534
535/// Store multiple single-element structures from one, two, three, or four registers.
536///
537/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst1q_p64)
538#[inline]
539#[target_feature(enable = "neon,aes,v8")]
540#[cfg_attr(test, assert_instr("vst1.64"))]
541#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
542pub unsafe fn vst1q_p64(ptr: *mut p64, a: poly64x2_t) {
543    vst1q_v2i64(ptr as *const i8, transmute(a), align_of::<p64>() as i32)
544}
545
546// Store multiple single-element structures from one, two, three, or four registers.
547#[inline]
548#[target_feature(enable = "neon,v7")]
549#[cfg_attr(test, assert_instr("vst1.32"))]
550#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
551pub unsafe fn vst1_f32(ptr: *mut f32, a: float32x2_t) {
552    vst1_v2f32(ptr as *const i8, a, align_of::<f32>() as i32)
553}
554
555// Store multiple single-element structures from one, two, three, or four registers.
556#[inline]
557#[target_feature(enable = "neon,v7")]
558#[cfg_attr(test, assert_instr("vst1.32"))]
559#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
560pub unsafe fn vst1q_f32(ptr: *mut f32, a: float32x4_t) {
561    vst1q_v4f32(ptr as *const i8, a, align_of::<f32>() as i32)
562}
563
564/// Table look-up
565#[inline]
566#[target_feature(enable = "neon,v7")]
567#[cfg_attr(test, assert_instr(vtbl))]
568#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
569pub unsafe fn vtbl1_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
570    vtbl1(a, b)
571}
572
573/// Table look-up
574#[inline]
575#[target_feature(enable = "neon,v7")]
576#[cfg_attr(test, assert_instr(vtbl))]
577#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
578pub unsafe fn vtbl1_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
579    transmute(vtbl1(transmute(a), transmute(b)))
580}
581
582/// Table look-up
583#[inline]
584#[target_feature(enable = "neon,v7")]
585#[cfg_attr(test, assert_instr(vtbl))]
586#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
587pub unsafe fn vtbl1_p8(a: poly8x8_t, b: uint8x8_t) -> poly8x8_t {
588    transmute(vtbl1(transmute(a), transmute(b)))
589}
590
591/// Table look-up
592#[inline]
593#[target_feature(enable = "neon,v7")]
594#[cfg_attr(test, assert_instr(vtbl))]
595#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
596pub unsafe fn vtbl2_s8(a: int8x8x2_t, b: int8x8_t) -> int8x8_t {
597    vtbl2(a.0, a.1, b)
598}
599
600/// Table look-up
601#[inline]
602#[target_feature(enable = "neon,v7")]
603#[cfg_attr(test, assert_instr(vtbl))]
604#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
605pub unsafe fn vtbl2_u8(a: uint8x8x2_t, b: uint8x8_t) -> uint8x8_t {
606    transmute(vtbl2(transmute(a.0), transmute(a.1), transmute(b)))
607}
608
609/// Table look-up
610#[inline]
611#[target_feature(enable = "neon,v7")]
612#[cfg_attr(test, assert_instr(vtbl))]
613#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
614pub unsafe fn vtbl2_p8(a: poly8x8x2_t, b: uint8x8_t) -> poly8x8_t {
615    transmute(vtbl2(transmute(a.0), transmute(a.1), transmute(b)))
616}
617
618/// Table look-up
619#[inline]
620#[target_feature(enable = "neon,v7")]
621#[cfg_attr(test, assert_instr(vtbl))]
622#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
623pub unsafe fn vtbl3_s8(a: int8x8x3_t, b: int8x8_t) -> int8x8_t {
624    vtbl3(a.0, a.1, a.2, b)
625}
626
627/// Table look-up
628#[inline]
629#[target_feature(enable = "neon,v7")]
630#[cfg_attr(test, assert_instr(vtbl))]
631#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
632pub unsafe fn vtbl3_u8(a: uint8x8x3_t, b: uint8x8_t) -> uint8x8_t {
633    transmute(vtbl3(
634        transmute(a.0),
635        transmute(a.1),
636        transmute(a.2),
637        transmute(b),
638    ))
639}
640
641/// Table look-up
642#[inline]
643#[target_feature(enable = "neon,v7")]
644#[cfg_attr(test, assert_instr(vtbl))]
645#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
646pub unsafe fn vtbl3_p8(a: poly8x8x3_t, b: uint8x8_t) -> poly8x8_t {
647    transmute(vtbl3(
648        transmute(a.0),
649        transmute(a.1),
650        transmute(a.2),
651        transmute(b),
652    ))
653}
654
655/// Table look-up
656#[inline]
657#[target_feature(enable = "neon,v7")]
658#[cfg_attr(test, assert_instr(vtbl))]
659#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
660pub unsafe fn vtbl4_s8(a: int8x8x4_t, b: int8x8_t) -> int8x8_t {
661    vtbl4(a.0, a.1, a.2, a.3, b)
662}
663
664/// Table look-up
665#[inline]
666#[target_feature(enable = "neon,v7")]
667#[cfg_attr(test, assert_instr(vtbl))]
668#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
669pub unsafe fn vtbl4_u8(a: uint8x8x4_t, b: uint8x8_t) -> uint8x8_t {
670    transmute(vtbl4(
671        transmute(a.0),
672        transmute(a.1),
673        transmute(a.2),
674        transmute(a.3),
675        transmute(b),
676    ))
677}
678
679/// Table look-up
680#[inline]
681#[target_feature(enable = "neon,v7")]
682#[cfg_attr(test, assert_instr(vtbl))]
683#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
684pub unsafe fn vtbl4_p8(a: poly8x8x4_t, b: uint8x8_t) -> poly8x8_t {
685    transmute(vtbl4(
686        transmute(a.0),
687        transmute(a.1),
688        transmute(a.2),
689        transmute(a.3),
690        transmute(b),
691    ))
692}
693
694/// Extended table look-up
695#[inline]
696#[target_feature(enable = "neon,v7")]
697#[cfg_attr(test, assert_instr(vtbx))]
698#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
699pub unsafe fn vtbx1_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
700    vtbx1(a, b, c)
701}
702
703/// Extended table look-up
704#[inline]
705#[target_feature(enable = "neon,v7")]
706#[cfg_attr(test, assert_instr(vtbx))]
707#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
708pub unsafe fn vtbx1_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
709    transmute(vtbx1(transmute(a), transmute(b), transmute(c)))
710}
711
712/// Extended table look-up
713#[inline]
714#[target_feature(enable = "neon,v7")]
715#[cfg_attr(test, assert_instr(vtbx))]
716#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
717pub unsafe fn vtbx1_p8(a: poly8x8_t, b: poly8x8_t, c: uint8x8_t) -> poly8x8_t {
718    transmute(vtbx1(transmute(a), transmute(b), transmute(c)))
719}
720
721/// Extended table look-up
722#[inline]
723#[target_feature(enable = "neon,v7")]
724#[cfg_attr(test, assert_instr(vtbx))]
725#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
726pub unsafe fn vtbx2_s8(a: int8x8_t, b: int8x8x2_t, c: int8x8_t) -> int8x8_t {
727    vtbx2(a, b.0, b.1, c)
728}
729
730/// Extended table look-up
731#[inline]
732#[target_feature(enable = "neon,v7")]
733#[cfg_attr(test, assert_instr(vtbx))]
734#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
735pub unsafe fn vtbx2_u8(a: uint8x8_t, b: uint8x8x2_t, c: uint8x8_t) -> uint8x8_t {
736    transmute(vtbx2(
737        transmute(a),
738        transmute(b.0),
739        transmute(b.1),
740        transmute(c),
741    ))
742}
743
744/// Extended table look-up
745#[inline]
746#[target_feature(enable = "neon,v7")]
747#[cfg_attr(test, assert_instr(vtbx))]
748#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
749pub unsafe fn vtbx2_p8(a: poly8x8_t, b: poly8x8x2_t, c: uint8x8_t) -> poly8x8_t {
750    transmute(vtbx2(
751        transmute(a),
752        transmute(b.0),
753        transmute(b.1),
754        transmute(c),
755    ))
756}
757
758/// Extended table look-up
759#[inline]
760#[target_feature(enable = "neon,v7")]
761#[cfg_attr(test, assert_instr(vtbx))]
762#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
763pub unsafe fn vtbx3_s8(a: int8x8_t, b: int8x8x3_t, c: int8x8_t) -> int8x8_t {
764    vtbx3(a, b.0, b.1, b.2, c)
765}
766
767/// Extended table look-up
768#[inline]
769#[target_feature(enable = "neon,v7")]
770#[cfg_attr(test, assert_instr(vtbx))]
771#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
772pub unsafe fn vtbx3_u8(a: uint8x8_t, b: uint8x8x3_t, c: uint8x8_t) -> uint8x8_t {
773    transmute(vtbx3(
774        transmute(a),
775        transmute(b.0),
776        transmute(b.1),
777        transmute(b.2),
778        transmute(c),
779    ))
780}
781
782/// Extended table look-up
783#[inline]
784#[target_feature(enable = "neon,v7")]
785#[cfg_attr(test, assert_instr(vtbx))]
786#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
787pub unsafe fn vtbx3_p8(a: poly8x8_t, b: poly8x8x3_t, c: uint8x8_t) -> poly8x8_t {
788    transmute(vtbx3(
789        transmute(a),
790        transmute(b.0),
791        transmute(b.1),
792        transmute(b.2),
793        transmute(c),
794    ))
795}
796
797/// Extended table look-up
798#[inline]
799#[target_feature(enable = "neon,v7")]
800#[cfg_attr(test, assert_instr(vtbx))]
801#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
802pub unsafe fn vtbx4_s8(a: int8x8_t, b: int8x8x4_t, c: int8x8_t) -> int8x8_t {
803    vtbx4(a, b.0, b.1, b.2, b.3, c)
804}
805
806/// Extended table look-up
807#[inline]
808#[target_feature(enable = "neon,v7")]
809#[cfg_attr(test, assert_instr(vtbx))]
810#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
811pub unsafe fn vtbx4_u8(a: uint8x8_t, b: uint8x8x4_t, c: uint8x8_t) -> uint8x8_t {
812    transmute(vtbx4(
813        transmute(a),
814        transmute(b.0),
815        transmute(b.1),
816        transmute(b.2),
817        transmute(b.3),
818        transmute(c),
819    ))
820}
821
822/// Extended table look-up
823#[inline]
824#[target_feature(enable = "neon,v7")]
825#[cfg_attr(test, assert_instr(vtbx))]
826#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
827pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t {
828    transmute(vtbx4(
829        transmute(a),
830        transmute(b.0),
831        transmute(b.1),
832        transmute(b.2),
833        transmute(b.3),
834        transmute(c),
835    ))
836}
837
838/// Shift Left and Insert (immediate)
839#[inline]
840#[target_feature(enable = "neon,v7")]
841#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
842#[rustc_legacy_const_generics(2)]
843#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
844pub unsafe fn vsli_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
845    static_assert_uimm_bits!(N, 3);
846    let n = N as i8;
847    vshiftins_v8i8(a, b, int8x8_t::splat(n))
848}
849/// Shift Left and Insert (immediate)
850#[inline]
851#[target_feature(enable = "neon,v7")]
852#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
853#[rustc_legacy_const_generics(2)]
854#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
855pub unsafe fn vsliq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t {
856    static_assert_uimm_bits!(N, 3);
857    let n = N as i8;
858    vshiftins_v16i8(a, b, int8x16_t::splat(n))
859}
860/// Shift Left and Insert (immediate)
861#[inline]
862#[target_feature(enable = "neon,v7")]
863#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
864#[rustc_legacy_const_generics(2)]
865#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
866pub unsafe fn vsli_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
867    static_assert_uimm_bits!(N, 4);
868    let n = N as i16;
869    vshiftins_v4i16(a, b, int16x4_t::splat(n))
870}
871/// Shift Left and Insert (immediate)
872#[inline]
873#[target_feature(enable = "neon,v7")]
874#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
875#[rustc_legacy_const_generics(2)]
876#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
877pub unsafe fn vsliq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
878    static_assert_uimm_bits!(N, 4);
879    let n = N as i16;
880    vshiftins_v8i16(a, b, int16x8_t::splat(n))
881}
882/// Shift Left and Insert (immediate)
883#[inline]
884#[target_feature(enable = "neon,v7")]
885#[cfg_attr(test, assert_instr("vsli.32", N = 1))]
886#[rustc_legacy_const_generics(2)]
887#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
888pub unsafe fn vsli_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
889    static_assert!(N >= 0 && N <= 31);
890    vshiftins_v2i32(a, b, int32x2_t::splat(N))
891}
892/// Shift Left and Insert (immediate)
893#[inline]
894#[target_feature(enable = "neon,v7")]
895#[cfg_attr(test, assert_instr("vsli.32", N = 1))]
896#[rustc_legacy_const_generics(2)]
897#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
898pub unsafe fn vsliq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
899    static_assert!(N >= 0 && N <= 31);
900    vshiftins_v4i32(a, b, int32x4_t::splat(N))
901}
902/// Shift Left and Insert (immediate)
903#[inline]
904#[target_feature(enable = "neon,v7")]
905#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
906#[rustc_legacy_const_generics(2)]
907#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
908pub unsafe fn vsli_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t {
909    static_assert!(0 <= N && N <= 63);
910    vshiftins_v1i64(a, b, int64x1_t::splat(N as i64))
911}
912/// Shift Left and Insert (immediate)
913#[inline]
914#[target_feature(enable = "neon,v7")]
915#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
916#[rustc_legacy_const_generics(2)]
917#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
918pub unsafe fn vsliq_n_s64<const N: i32>(a: int64x2_t, b: int64x2_t) -> int64x2_t {
919    static_assert!(0 <= N && N <= 63);
920    vshiftins_v2i64(a, b, int64x2_t::splat(N as i64))
921}
922/// Shift Left and Insert (immediate)
923#[inline]
924#[target_feature(enable = "neon,v7")]
925#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
926#[rustc_legacy_const_generics(2)]
927#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
928pub unsafe fn vsli_n_u8<const N: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
929    static_assert_uimm_bits!(N, 3);
930    let n = N as i8;
931    transmute(vshiftins_v8i8(
932        transmute(a),
933        transmute(b),
934        int8x8_t::splat(n),
935    ))
936}
937/// Shift Left and Insert (immediate)
938#[inline]
939#[target_feature(enable = "neon,v7")]
940#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
941#[rustc_legacy_const_generics(2)]
942#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
943pub unsafe fn vsliq_n_u8<const N: i32>(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
944    static_assert_uimm_bits!(N, 3);
945    let n = N as i8;
946    transmute(vshiftins_v16i8(
947        transmute(a),
948        transmute(b),
949        int8x16_t::splat(n),
950    ))
951}
952/// Shift Left and Insert (immediate)
953#[inline]
954#[target_feature(enable = "neon,v7")]
955#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
956#[rustc_legacy_const_generics(2)]
957#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
958pub unsafe fn vsli_n_u16<const N: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
959    static_assert_uimm_bits!(N, 4);
960    let n = N as i16;
961    transmute(vshiftins_v4i16(
962        transmute(a),
963        transmute(b),
964        int16x4_t::splat(n),
965    ))
966}
967/// Shift Left and Insert (immediate)
968#[inline]
969#[target_feature(enable = "neon,v7")]
970#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
971#[rustc_legacy_const_generics(2)]
972#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
973pub unsafe fn vsliq_n_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
974    static_assert_uimm_bits!(N, 4);
975    let n = N as i16;
976    transmute(vshiftins_v8i16(
977        transmute(a),
978        transmute(b),
979        int16x8_t::splat(n),
980    ))
981}
982/// Shift Left and Insert (immediate)
983#[inline]
984#[target_feature(enable = "neon,v7")]
985#[cfg_attr(test, assert_instr("vsli.32", N = 1))]
986#[rustc_legacy_const_generics(2)]
987#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
988pub unsafe fn vsli_n_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
989    static_assert!(N >= 0 && N <= 31);
990    transmute(vshiftins_v2i32(
991        transmute(a),
992        transmute(b),
993        int32x2_t::splat(N),
994    ))
995}
996/// Shift Left and Insert (immediate)
997#[inline]
998#[target_feature(enable = "neon,v7")]
999#[cfg_attr(test, assert_instr("vsli.32", N = 1))]
1000#[rustc_legacy_const_generics(2)]
1001#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1002pub unsafe fn vsliq_n_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1003    static_assert!(N >= 0 && N <= 31);
1004    transmute(vshiftins_v4i32(
1005        transmute(a),
1006        transmute(b),
1007        int32x4_t::splat(N),
1008    ))
1009}
1010/// Shift Left and Insert (immediate)
1011#[inline]
1012#[target_feature(enable = "neon,v7")]
1013#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
1014#[rustc_legacy_const_generics(2)]
1015#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1016pub unsafe fn vsli_n_u64<const N: i32>(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
1017    static_assert!(0 <= N && N <= 63);
1018    transmute(vshiftins_v1i64(
1019        transmute(a),
1020        transmute(b),
1021        int64x1_t::splat(N as i64),
1022    ))
1023}
1024/// Shift Left and Insert (immediate)
1025#[inline]
1026#[target_feature(enable = "neon,v7")]
1027#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
1028#[rustc_legacy_const_generics(2)]
1029#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1030pub unsafe fn vsliq_n_u64<const N: i32>(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
1031    static_assert!(0 <= N && N <= 63);
1032    transmute(vshiftins_v2i64(
1033        transmute(a),
1034        transmute(b),
1035        int64x2_t::splat(N as i64),
1036    ))
1037}
1038/// Shift Left and Insert (immediate)
1039#[inline]
1040#[target_feature(enable = "neon,v7")]
1041#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
1042#[rustc_legacy_const_generics(2)]
1043#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1044pub unsafe fn vsli_n_p8<const N: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
1045    static_assert_uimm_bits!(N, 3);
1046    let n = N as i8;
1047    transmute(vshiftins_v8i8(
1048        transmute(a),
1049        transmute(b),
1050        int8x8_t::splat(n),
1051    ))
1052}
1053/// Shift Left and Insert (immediate)
1054#[inline]
1055#[target_feature(enable = "neon,v7")]
1056#[cfg_attr(test, assert_instr("vsli.8", N = 1))]
1057#[rustc_legacy_const_generics(2)]
1058#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1059pub unsafe fn vsliq_n_p8<const N: i32>(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t {
1060    static_assert_uimm_bits!(N, 3);
1061    let n = N as i8;
1062    transmute(vshiftins_v16i8(
1063        transmute(a),
1064        transmute(b),
1065        int8x16_t::splat(n),
1066    ))
1067}
1068/// Shift Left and Insert (immediate)
1069#[inline]
1070#[target_feature(enable = "neon,v7")]
1071#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
1072#[rustc_legacy_const_generics(2)]
1073#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1074pub unsafe fn vsli_n_p16<const N: i32>(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t {
1075    static_assert_uimm_bits!(N, 4);
1076    let n = N as i16;
1077    transmute(vshiftins_v4i16(
1078        transmute(a),
1079        transmute(b),
1080        int16x4_t::splat(n),
1081    ))
1082}
1083
1084/// Shift Left and Insert (immediate)
1085#[inline]
1086#[target_feature(enable = "neon,v7")]
1087#[cfg_attr(test, assert_instr("vsli.16", N = 1))]
1088#[rustc_legacy_const_generics(2)]
1089#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1090pub unsafe fn vsliq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t {
1091    static_assert_uimm_bits!(N, 4);
1092    let n = N as i16;
1093    transmute(vshiftins_v8i16(
1094        transmute(a),
1095        transmute(b),
1096        int16x8_t::splat(n),
1097    ))
1098}
1099
1100/// Shift Left and Insert (immediate)
1101///
1102/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsli_n_p64)
1103#[inline]
1104#[target_feature(enable = "neon,v7,aes")]
1105#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
1106#[rustc_legacy_const_generics(2)]
1107#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1108pub unsafe fn vsli_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
1109    static_assert!(0 <= N && N <= 63);
1110    transmute(vshiftins_v1i64(
1111        transmute(a),
1112        transmute(b),
1113        int64x1_t::splat(N as i64),
1114    ))
1115}
1116
1117/// Shift Left and Insert (immediate)
1118///
1119/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64)
1120#[inline]
1121#[target_feature(enable = "neon,v7,aes")]
1122#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
1123#[rustc_legacy_const_generics(2)]
1124#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1125pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
1126    static_assert!(0 <= N && N <= 63);
1127    transmute(vshiftins_v2i64(
1128        transmute(a),
1129        transmute(b),
1130        int64x2_t::splat(N as i64),
1131    ))
1132}
1133/// Shift Right and Insert (immediate)
1134#[inline]
1135#[target_feature(enable = "neon,v7")]
1136#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1137#[rustc_legacy_const_generics(2)]
1138#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1139pub unsafe fn vsri_n_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1140    static_assert!(1 <= N && N <= 8);
1141    let n = -N as i8;
1142    vshiftins_v8i8(a, b, int8x8_t::splat(n))
1143}
1144/// Shift Right and Insert (immediate)
1145#[inline]
1146#[target_feature(enable = "neon,v7")]
1147#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1148#[rustc_legacy_const_generics(2)]
1149#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1150pub unsafe fn vsriq_n_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1151    static_assert!(1 <= N && N <= 8);
1152    let n = -N as i8;
1153    vshiftins_v16i8(a, b, int8x16_t::splat(n))
1154}
1155/// Shift Right and Insert (immediate)
1156#[inline]
1157#[target_feature(enable = "neon,v7")]
1158#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1159#[rustc_legacy_const_generics(2)]
1160#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1161pub unsafe fn vsri_n_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1162    static_assert!(1 <= N && N <= 16);
1163    let n = -N as i16;
1164    vshiftins_v4i16(a, b, int16x4_t::splat(n))
1165}
1166/// Shift Right and Insert (immediate)
1167#[inline]
1168#[target_feature(enable = "neon,v7")]
1169#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1170#[rustc_legacy_const_generics(2)]
1171#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1172pub unsafe fn vsriq_n_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1173    static_assert!(1 <= N && N <= 16);
1174    let n = -N as i16;
1175    vshiftins_v8i16(a, b, int16x8_t::splat(n))
1176}
1177/// Shift Right and Insert (immediate)
1178#[inline]
1179#[target_feature(enable = "neon,v7")]
1180#[cfg_attr(test, assert_instr("vsri.32", N = 1))]
1181#[rustc_legacy_const_generics(2)]
1182#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1183pub unsafe fn vsri_n_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1184    static_assert!(1 <= N && N <= 32);
1185    vshiftins_v2i32(a, b, int32x2_t::splat(-N))
1186}
1187/// Shift Right and Insert (immediate)
1188#[inline]
1189#[target_feature(enable = "neon,v7")]
1190#[cfg_attr(test, assert_instr("vsri.32", N = 1))]
1191#[rustc_legacy_const_generics(2)]
1192#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1193pub unsafe fn vsriq_n_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1194    static_assert!(1 <= N && N <= 32);
1195    vshiftins_v4i32(a, b, int32x4_t::splat(-N))
1196}
1197/// Shift Right and Insert (immediate)
1198#[inline]
1199#[target_feature(enable = "neon,v7")]
1200#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1201#[rustc_legacy_const_generics(2)]
1202#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1203pub unsafe fn vsri_n_s64<const N: i32>(a: int64x1_t, b: int64x1_t) -> int64x1_t {
1204    static_assert!(1 <= N && N <= 64);
1205    vshiftins_v1i64(a, b, int64x1_t::splat(-N as i64))
1206}
1207/// Shift Right and Insert (immediate)
1208#[inline]
1209#[target_feature(enable = "neon,v7")]
1210#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1211#[rustc_legacy_const_generics(2)]
1212#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1213pub unsafe fn vsriq_n_s64<const N: i32>(a: int64x2_t, b: int64x2_t) -> int64x2_t {
1214    static_assert!(1 <= N && N <= 64);
1215    vshiftins_v2i64(a, b, int64x2_t::splat(-N as i64))
1216}
1217/// Shift Right and Insert (immediate)
1218#[inline]
1219#[target_feature(enable = "neon,v7")]
1220#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1221#[rustc_legacy_const_generics(2)]
1222#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1223pub unsafe fn vsri_n_u8<const N: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1224    static_assert!(1 <= N && N <= 8);
1225    let n = -N as i8;
1226    transmute(vshiftins_v8i8(
1227        transmute(a),
1228        transmute(b),
1229        int8x8_t::splat(n),
1230    ))
1231}
1232/// Shift Right and Insert (immediate)
1233#[inline]
1234#[target_feature(enable = "neon,v7")]
1235#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1236#[rustc_legacy_const_generics(2)]
1237#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1238pub unsafe fn vsriq_n_u8<const N: i32>(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1239    static_assert!(1 <= N && N <= 8);
1240    let n = -N as i8;
1241    transmute(vshiftins_v16i8(
1242        transmute(a),
1243        transmute(b),
1244        int8x16_t::splat(n),
1245    ))
1246}
1247/// Shift Right and Insert (immediate)
1248#[inline]
1249#[target_feature(enable = "neon,v7")]
1250#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1251#[rustc_legacy_const_generics(2)]
1252#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1253pub unsafe fn vsri_n_u16<const N: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1254    static_assert!(1 <= N && N <= 16);
1255    let n = -N as i16;
1256    transmute(vshiftins_v4i16(
1257        transmute(a),
1258        transmute(b),
1259        int16x4_t::splat(n),
1260    ))
1261}
1262/// Shift Right and Insert (immediate)
1263#[inline]
1264#[target_feature(enable = "neon,v7")]
1265#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1266#[rustc_legacy_const_generics(2)]
1267#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1268pub unsafe fn vsriq_n_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1269    static_assert!(1 <= N && N <= 16);
1270    let n = -N as i16;
1271    transmute(vshiftins_v8i16(
1272        transmute(a),
1273        transmute(b),
1274        int16x8_t::splat(n),
1275    ))
1276}
1277/// Shift Right and Insert (immediate)
1278#[inline]
1279#[target_feature(enable = "neon,v7")]
1280#[cfg_attr(test, assert_instr("vsri.32", N = 1))]
1281#[rustc_legacy_const_generics(2)]
1282#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1283pub unsafe fn vsri_n_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1284    static_assert!(1 <= N && N <= 32);
1285    transmute(vshiftins_v2i32(
1286        transmute(a),
1287        transmute(b),
1288        int32x2_t::splat(-N),
1289    ))
1290}
1291/// Shift Right and Insert (immediate)
1292#[inline]
1293#[target_feature(enable = "neon,v7")]
1294#[cfg_attr(test, assert_instr("vsri.32", N = 1))]
1295#[rustc_legacy_const_generics(2)]
1296#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1297pub unsafe fn vsriq_n_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1298    static_assert!(1 <= N && N <= 32);
1299    transmute(vshiftins_v4i32(
1300        transmute(a),
1301        transmute(b),
1302        int32x4_t::splat(-N),
1303    ))
1304}
1305/// Shift Right and Insert (immediate)
1306#[inline]
1307#[target_feature(enable = "neon,v7")]
1308#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1309#[rustc_legacy_const_generics(2)]
1310#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1311pub unsafe fn vsri_n_u64<const N: i32>(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
1312    static_assert!(1 <= N && N <= 64);
1313    transmute(vshiftins_v1i64(
1314        transmute(a),
1315        transmute(b),
1316        int64x1_t::splat(-N as i64),
1317    ))
1318}
1319/// Shift Right and Insert (immediate)
1320#[inline]
1321#[target_feature(enable = "neon,v7")]
1322#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1323#[rustc_legacy_const_generics(2)]
1324#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1325pub unsafe fn vsriq_n_u64<const N: i32>(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
1326    static_assert!(1 <= N && N <= 64);
1327    transmute(vshiftins_v2i64(
1328        transmute(a),
1329        transmute(b),
1330        int64x2_t::splat(-N as i64),
1331    ))
1332}
1333/// Shift Right and Insert (immediate)
1334#[inline]
1335#[target_feature(enable = "neon,v7")]
1336#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1337#[rustc_legacy_const_generics(2)]
1338#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1339pub unsafe fn vsri_n_p8<const N: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
1340    static_assert!(1 <= N && N <= 8);
1341    let n = -N as i8;
1342    transmute(vshiftins_v8i8(
1343        transmute(a),
1344        transmute(b),
1345        int8x8_t::splat(n),
1346    ))
1347}
1348/// Shift Right and Insert (immediate)
1349#[inline]
1350#[target_feature(enable = "neon,v7")]
1351#[cfg_attr(test, assert_instr("vsri.8", N = 1))]
1352#[rustc_legacy_const_generics(2)]
1353#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1354pub unsafe fn vsriq_n_p8<const N: i32>(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t {
1355    static_assert!(1 <= N && N <= 8);
1356    let n = -N as i8;
1357    transmute(vshiftins_v16i8(
1358        transmute(a),
1359        transmute(b),
1360        int8x16_t::splat(n),
1361    ))
1362}
1363/// Shift Right and Insert (immediate)
1364#[inline]
1365#[target_feature(enable = "neon,v7")]
1366#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1367#[rustc_legacy_const_generics(2)]
1368#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1369pub unsafe fn vsri_n_p16<const N: i32>(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t {
1370    static_assert!(1 <= N && N <= 16);
1371    let n = -N as i16;
1372    transmute(vshiftins_v4i16(
1373        transmute(a),
1374        transmute(b),
1375        int16x4_t::splat(n),
1376    ))
1377}
1378/// Shift Right and Insert (immediate)
1379#[inline]
1380#[target_feature(enable = "neon,v7")]
1381#[cfg_attr(test, assert_instr("vsri.16", N = 1))]
1382#[rustc_legacy_const_generics(2)]
1383#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1384pub unsafe fn vsriq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t {
1385    static_assert!(1 <= N && N <= 16);
1386    let n = -N as i16;
1387    transmute(vshiftins_v8i16(
1388        transmute(a),
1389        transmute(b),
1390        int16x8_t::splat(n),
1391    ))
1392}
1393
1394/// Shift Right and Insert (immediate)
1395///
1396/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_p64)
1397#[inline]
1398#[target_feature(enable = "neon,v7,aes")]
1399#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1400#[rustc_legacy_const_generics(2)]
1401#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1402pub unsafe fn vsri_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
1403    static_assert!(1 <= N && N <= 64);
1404    transmute(vshiftins_v1i64(
1405        transmute(a),
1406        transmute(b),
1407        int64x1_t::splat(-N as i64),
1408    ))
1409}
1410
1411/// Shift Right and Insert (immediate)
1412///
1413/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64)
1414#[inline]
1415#[target_feature(enable = "neon,v7,aes")]
1416#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
1417#[rustc_legacy_const_generics(2)]
1418#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
1419pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
1420    static_assert!(1 <= N && N <= 64);
1421    transmute(vshiftins_v2i64(
1422        transmute(a),
1423        transmute(b),
1424        int64x2_t::splat(-N as i64),
1425    ))
1426}
1427
1428#[cfg(test)]
1429mod tests {
1430    use super::*;
1431    use crate::core_arch::{arm::*, simd::*};
1432    use crate::mem::transmute;
1433    use stdarch_test::simd_test;
1434
1435    #[simd_test(enable = "neon")]
1436    unsafe fn test_vcvtq_s32_f32() {
1437        let f = f32x4::new(-1., 2., 3., 4.);
1438        let e = i32x4::new(-1, 2, 3, 4);
1439        let r: i32x4 = transmute(vcvtq_s32_f32(transmute(f)));
1440        assert_eq!(r, e);
1441    }
1442
1443    #[simd_test(enable = "neon")]
1444    unsafe fn test_vcvtq_u32_f32() {
1445        let f = f32x4::new(1., 2., 3., 4.);
1446        let e = u32x4::new(1, 2, 3, 4);
1447        let r: u32x4 = transmute(vcvtq_u32_f32(transmute(f)));
1448        assert_eq!(r, e);
1449    }
1450}
core/stdarch/crates/core_arch/src/arm/neon.rs

core/stdarch/crates/core_arch/src/arm/
neon.rs
