Targets the ARMv4T, with code as a32 code by default.
Targets the ARMv5TE, with code as a32 code by default.
Bare MIPS32r2, little endian, softfloat, O32 calling convention
Targets the ARMv4T, with code as t32 code by default.
Targets the ARMv5TE, with code as t32 code by default.
A “bare wasm” target representing a WebAssembly output that makes zero
assumptions about its environment.
NB: This target is in the process of being renamed to
wasm32-wasip1. For more information see:
The wasm32-wasip1 enables compiling to WebAssembly using the first
version of the WASI standard, called “preview1”. This version of the
standard was never formally specified and WASI has since evolved to a
“preview2”. This target in rustc uses the previous version of the proposal.
The wasm32-wasip1-threads target is an extension of the wasm32-wasip1
target where threads are enabled by default for all crates. This target
should be considered “in flux” as WASI itself has moved on from “p1” to “p2”
now and threads in “p2” are still under heavy design.
The wasm32-wasip2 target is the next evolution of the
wasm32-wasi target. While the wasi specification is still under
active development, the {review 2 iteration is considered an “island
of stability” that should allow users to rely on it indefinitely.
A “bare wasm” target representing a WebAssembly output that makes zero
assumptions about its environment.