Function core::arch::riscv64::sinval_vma_asid

source ·
pub unsafe fn sinval_vma_asid(asid: usize)
🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)
Available on RISC-V RV64 only.
Expand description

Invalidate supervisor translation cache for given address space

This instruction invalidates any address-translation cache entries that an SFENCE.VMA instruction with the same values of vaddr and asid would invalidate.