Function core::arch::riscv64::aes64im

source ·
pub unsafe fn aes64im(rs1: u64) -> u64
🔬This is a nightly-only experimental API. (riscv_ext_intrinsics #114544)
Available on RISC-V RV64 and target feature zkne and target feature zknd only.
Expand description

This instruction accelerates the inverse MixColumns step of the AES Block Cipher, and is used to aid creation of the decryption KeySchedule.

The instruction applies the inverse MixColumns transformation to two columns of the state array, packed into a single 64-bit register. It is used to create the inverse cipher KeySchedule, according to the equivalent inverse cipher construction in (Page 23, Section 5.3.5). This instruction must always be implemented such that its execution latency does not depend on the data being operated on.

Source: RISC-V Cryptography Extensions Volume I: Scalar & Entropy Source Instructions

Version: v1.0.1

Section: 3.9

§Safety

This function is safe to use if the zkne or zknd target feature is present.