core/stdarch/crates/core_arch/src/x86_64/
avx.rs

1//! Advanced Vector Extensions (AVX)
2//!
3//! The references are:
4//!
5//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
6//!   Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
7//!   Programmer's Manual, Volume 3: General-Purpose and System
8//!   Instructions][amd64_ref].
9//!
10//! [Wikipedia][wiki] provides a quick overview of the instructions available.
11//!
12//! [intel64_ref]: https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
13//! [amd64_ref]: https://docs.amd.com/v/u/en-US/24594_3.37
14//! [wiki]: https://en.wikipedia.org/wiki/Advanced_Vector_Extensions
15
16use crate::{core_arch::x86::*, mem::transmute};
17
18/// Copies `a` to result, and insert the 64-bit integer `i` into result
19/// at the location specified by `index`.
20///
21/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insert_epi64)
22#[inline]
23#[rustc_legacy_const_generics(2)]
24#[target_feature(enable = "avx")]
25// This intrinsic has no corresponding instruction.
26#[stable(feature = "simd_x86", since = "1.27.0")]
27#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
28pub const fn _mm256_insert_epi64<const INDEX: i32>(a: __m256i, i: i64) -> __m256i {
29    static_assert_uimm_bits!(INDEX, 2);
30    unsafe { transmute(simd_insert!(a.as_i64x4(), INDEX as u32, i)) }
31}
32
33/// Extracts a 64-bit integer from `a`, selected with `INDEX`.
34///
35/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extract_epi64)
36#[inline]
37#[target_feature(enable = "avx")]
38#[rustc_legacy_const_generics(1)]
39// This intrinsic has no corresponding instruction.
40#[stable(feature = "simd_x86", since = "1.27.0")]
41#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
42pub const fn _mm256_extract_epi64<const INDEX: i32>(a: __m256i) -> i64 {
43    static_assert_uimm_bits!(INDEX, 2);
44    unsafe { simd_extract!(a.as_i64x4(), INDEX as u32) }
45}
46
47#[cfg(test)]
48mod tests {
49    use crate::core_arch::assert_eq_const as assert_eq;
50    use stdarch_test::simd_test;
51
52    use crate::core_arch::arch::x86_64::*;
53
54    #[simd_test(enable = "avx")]
55    const fn test_mm256_insert_epi64() {
56        let a = _mm256_setr_epi64x(1, 2, 3, 4);
57        let r = _mm256_insert_epi64::<3>(a, 0);
58        let e = _mm256_setr_epi64x(1, 2, 3, 0);
59        assert_eq_m256i(r, e);
60    }
61
62    #[simd_test(enable = "avx")]
63    const fn test_mm256_extract_epi64() {
64        let a = _mm256_setr_epi64x(0, 1, 2, 3);
65        let r = _mm256_extract_epi64::<3>(a);
66        assert_eq!(r, 3);
67    }
68}
core/stdarch/crates/core_arch/src/x86_64/avx.rs

core/stdarch/crates/core_arch/src/x86_64/
avx.rs
