rustc_target/spec/targets/
riscv32_wrs_vxworks.rs

1use crate::spec::{StackProbeType, Target, TargetOptions, base};
2
3pub(crate) fn target() -> Target {
4    Target {
5        llvm_target: "riscv32".into(),
6        metadata: crate::spec::TargetMetadata {
7            description: None,
8            tier: Some(3),
9            host_tools: Some(false),
10            std: Some(true),
11        },
12        pointer_width: 32,
13        data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
14        arch: "riscv32".into(),
15        options: TargetOptions {
16            cpu: "generic-rv32".into(),
17            llvm_abiname: "ilp32d".into(),
18            max_atomic_width: Some(32),
19            features: "+m,+a,+f,+d,+c".into(),
20            stack_probes: StackProbeType::Inline,
21            ..base::vxworks::opts()
22        },
23    }
24}