rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs

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1use crate::spec::{
2    LinkSelfContainedDefault, LinkerFlavor, MergeFunctions, PanicStrategy, Target, TargetOptions,
3};
4
5pub(crate) fn target() -> Target {
6    Target {
7        arch: "nvptx64".into(),
8        data_layout: "e-i64:64-i128:128-v16:16-v32:32-n16:32:64".into(),
9        llvm_target: "nvptx64-nvidia-cuda".into(),
10        metadata: crate::spec::TargetMetadata {
11            description: Some("--emit=asm generates PTX code that runs on NVIDIA GPUs".into()),
12            tier: Some(2),
13            host_tools: Some(false),
14            std: Some(false),
15        },
16        pointer_width: 64,
17
18        options: TargetOptions {
19            os: "cuda".into(),
20            vendor: "nvidia".into(),
21            linker_flavor: LinkerFlavor::Ptx,
22            // The linker can be installed from `crates.io`.
23            linker: Some("rust-ptx-linker".into()),
24
25            // With `ptx-linker` approach, it can be later overridden via link flags.
26            cpu: "sm_30".into(),
27
28            // FIXME: create tests for the atomics.
29            max_atomic_width: Some(64),
30
31            // Unwinding on CUDA is neither feasible nor useful.
32            panic_strategy: PanicStrategy::Abort,
33
34            // Needed to use `dylib` and `bin` crate types and the linker.
35            dynamic_linking: true,
36
37            // Avoid using dylib because it contain metadata not supported
38            // by LLVM NVPTX backend.
39            only_cdylib: true,
40
41            // Let the `ptx-linker` to handle LLVM lowering into MC / assembly.
42            obj_is_bitcode: true,
43
44            // Convenient and predicable naming scheme.
45            dll_prefix: "".into(),
46            dll_suffix: ".ptx".into(),
47            exe_suffix: ".ptx".into(),
48
49            // Disable MergeFunctions LLVM optimisation pass because it can
50            // produce kernel functions that call other kernel functions.
51            // This behavior is not supported by PTX ISA.
52            merge_functions: MergeFunctions::Disabled,
53
54            // The LLVM backend does not support stack canaries for this target
55            supports_stack_protector: false,
56
57            // Support using `self-contained` linkers like the llvm-bitcode-linker
58            link_self_contained: LinkSelfContainedDefault::True,
59
60            ..Default::default()
61        },
62    }
63}
rustc_target/spec/targets/nvptx64_nvidia_cuda.rs

rustc_target/spec/targets/
nvptx64_nvidia_cuda.rs
