1use std::fmt;
2
3use rustc_span::Symbol;
4
5use super::{InlineAsmArch, InlineAsmType, ModifierInfo};
6
7#[allow(non_camel_case_types)]
pub enum Msp430InlineAsmRegClass { reg, }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for Msp430InlineAsmRegClass { }
#[automatically_derived]
#[doc(hidden)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for Msp430InlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for Msp430InlineAsmRegClass {
#[inline]
fn clone(&self) -> Msp430InlineAsmRegClass { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for Msp430InlineAsmRegClass {
fn encode(&self, __encoder: &mut __E) {
match *self { Msp430InlineAsmRegClass::reg => {} }
}
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for Msp430InlineAsmRegClass {
fn decode(__decoder: &mut __D) -> Self {
Msp430InlineAsmRegClass::reg
}
}
};
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for Msp430InlineAsmRegClass {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
::core::fmt::Formatter::write_str(f, "reg")
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for Msp430InlineAsmRegClass {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) -> () {}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for Msp430InlineAsmRegClass { }
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for Msp430InlineAsmRegClass {
#[inline]
fn eq(&self, other: &Msp430InlineAsmRegClass) -> bool { true }
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for Msp430InlineAsmRegClass {
#[inline]
fn partial_cmp(&self, other: &Msp430InlineAsmRegClass)
-> ::core::option::Option<::core::cmp::Ordering> {
::core::option::Option::Some(::core::cmp::Ordering::Equal)
}
}
#[automatically_derived]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for Msp430InlineAsmRegClass {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) -> () {}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for Msp430InlineAsmRegClass where __CTX: crate::HashStableContext
{
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self { Msp430InlineAsmRegClass::reg => {} }
}
}
};
impl Msp430InlineAsmRegClass {
pub fn name(self) -> rustc_span::Symbol {
match self { Self::reg => rustc_span::sym::reg, }
}
pub fn parse(name: rustc_span::Symbol)
-> Result<Self, &'static [rustc_span::Symbol]> {
match name {
rustc_span::sym::reg => Ok(Self::reg),
_ => Err(&[rustc_span::sym::reg]),
}
}
}
pub(super) fn regclass_map()
->
rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>> {
use rustc_data_structures::fx::FxHashMap;
use rustc_data_structures::fx::FxIndexSet;
use super::InlineAsmRegClass;
let mut map = FxHashMap::default();
map.insert(InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg),
FxIndexSet::default());
map
}def_reg_class! {
8 Msp430 Msp430InlineAsmRegClass {
9 reg,
10 }
11}
12
13impl Msp430InlineAsmRegClass {
14 pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
15 &[]
16 }
17
18 pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
19 None
20 }
21
22 pub fn suggest_modifier(
23 self,
24 _arch: InlineAsmArch,
25 _ty: InlineAsmType,
26 ) -> Option<ModifierInfo> {
27 None
28 }
29
30 pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<ModifierInfo> {
31 None
32 }
33
34 pub fn supported_types(
35 self,
36 arch: InlineAsmArch,
37 ) -> &'static [(InlineAsmType, Option<Symbol>)] {
38 match (self, arch) {
39 (Self::reg, _) => {
use super::InlineAsmType::*;
&[(I8, None), (I16, None)]
}types! { _: I8, I16; },
40 }
41 }
42}
43
44#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
pub enum Msp430InlineAsmReg {
r5,
r6,
r7,
r8,
r9,
r10,
r11,
r12,
r13,
r14,
r15,
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::Copy for Msp430InlineAsmReg { }
#[automatically_derived]
#[doc(hidden)]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
unsafe impl ::core::clone::TrivialClone for Msp430InlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::clone::Clone for Msp430InlineAsmReg {
#[inline]
fn clone(&self) -> Msp430InlineAsmReg { *self }
}
const _: () =
{
impl<__E: ::rustc_span::SpanEncoder> ::rustc_serialize::Encodable<__E>
for Msp430InlineAsmReg {
fn encode(&self, __encoder: &mut __E) {
let disc =
match *self {
Msp430InlineAsmReg::r5 => { 0usize }
Msp430InlineAsmReg::r6 => { 1usize }
Msp430InlineAsmReg::r7 => { 2usize }
Msp430InlineAsmReg::r8 => { 3usize }
Msp430InlineAsmReg::r9 => { 4usize }
Msp430InlineAsmReg::r10 => { 5usize }
Msp430InlineAsmReg::r11 => { 6usize }
Msp430InlineAsmReg::r12 => { 7usize }
Msp430InlineAsmReg::r13 => { 8usize }
Msp430InlineAsmReg::r14 => { 9usize }
Msp430InlineAsmReg::r15 => { 10usize }
};
::rustc_serialize::Encoder::emit_u8(__encoder, disc as u8);
match *self {
Msp430InlineAsmReg::r5 => {}
Msp430InlineAsmReg::r6 => {}
Msp430InlineAsmReg::r7 => {}
Msp430InlineAsmReg::r8 => {}
Msp430InlineAsmReg::r9 => {}
Msp430InlineAsmReg::r10 => {}
Msp430InlineAsmReg::r11 => {}
Msp430InlineAsmReg::r12 => {}
Msp430InlineAsmReg::r13 => {}
Msp430InlineAsmReg::r14 => {}
Msp430InlineAsmReg::r15 => {}
}
}
}
};
const _: () =
{
impl<__D: ::rustc_span::SpanDecoder> ::rustc_serialize::Decodable<__D>
for Msp430InlineAsmReg {
fn decode(__decoder: &mut __D) -> Self {
match ::rustc_serialize::Decoder::read_u8(__decoder) as usize
{
0usize => { Msp430InlineAsmReg::r5 }
1usize => { Msp430InlineAsmReg::r6 }
2usize => { Msp430InlineAsmReg::r7 }
3usize => { Msp430InlineAsmReg::r8 }
4usize => { Msp430InlineAsmReg::r9 }
5usize => { Msp430InlineAsmReg::r10 }
6usize => { Msp430InlineAsmReg::r11 }
7usize => { Msp430InlineAsmReg::r12 }
8usize => { Msp430InlineAsmReg::r13 }
9usize => { Msp430InlineAsmReg::r14 }
10usize => { Msp430InlineAsmReg::r15 }
n => {
::core::panicking::panic_fmt(format_args!("invalid enum variant tag while decoding `Msp430InlineAsmReg`, expected 0..11, actual {0}",
n));
}
}
}
}
};
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::fmt::Debug for Msp430InlineAsmReg {
#[inline]
fn fmt(&self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result {
::core::fmt::Formatter::write_str(f,
match self {
Msp430InlineAsmReg::r5 => "r5",
Msp430InlineAsmReg::r6 => "r6",
Msp430InlineAsmReg::r7 => "r7",
Msp430InlineAsmReg::r8 => "r8",
Msp430InlineAsmReg::r9 => "r9",
Msp430InlineAsmReg::r10 => "r10",
Msp430InlineAsmReg::r11 => "r11",
Msp430InlineAsmReg::r12 => "r12",
Msp430InlineAsmReg::r13 => "r13",
Msp430InlineAsmReg::r14 => "r14",
Msp430InlineAsmReg::r15 => "r15",
})
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::Eq for Msp430InlineAsmReg {
#[inline]
#[doc(hidden)]
#[coverage(off)]
fn assert_receiver_is_total_eq(&self) -> () {}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::marker::StructuralPartialEq for Msp430InlineAsmReg { }
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialEq for Msp430InlineAsmReg {
#[inline]
fn eq(&self, other: &Msp430InlineAsmReg) -> bool {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
__self_discr == __arg1_discr
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::cmp::PartialOrd for Msp430InlineAsmReg {
#[inline]
fn partial_cmp(&self, other: &Msp430InlineAsmReg)
-> ::core::option::Option<::core::cmp::Ordering> {
let __self_discr = ::core::intrinsics::discriminant_value(self);
let __arg1_discr = ::core::intrinsics::discriminant_value(other);
::core::cmp::PartialOrd::partial_cmp(&__self_discr, &__arg1_discr)
}
}
#[automatically_derived]
#[allow(unreachable_code)]
#[allow(non_camel_case_types)]
impl ::core::hash::Hash for Msp430InlineAsmReg {
#[inline]
fn hash<__H: ::core::hash::Hasher>(&self, state: &mut __H) -> () {
let __self_discr = ::core::intrinsics::discriminant_value(self);
::core::hash::Hash::hash(&__self_discr, state)
}
}
const _: () =
{
impl<__CTX> ::rustc_data_structures::stable_hasher::HashStable<__CTX>
for Msp430InlineAsmReg where __CTX: crate::HashStableContext {
#[inline]
fn hash_stable(&self, __hcx: &mut __CTX,
__hasher:
&mut ::rustc_data_structures::stable_hasher::StableHasher) {
::std::mem::discriminant(self).hash_stable(__hcx, __hasher);
match *self {
Msp430InlineAsmReg::r5 => {}
Msp430InlineAsmReg::r6 => {}
Msp430InlineAsmReg::r7 => {}
Msp430InlineAsmReg::r8 => {}
Msp430InlineAsmReg::r9 => {}
Msp430InlineAsmReg::r10 => {}
Msp430InlineAsmReg::r11 => {}
Msp430InlineAsmReg::r12 => {}
Msp430InlineAsmReg::r13 => {}
Msp430InlineAsmReg::r14 => {}
Msp430InlineAsmReg::r15 => {}
}
}
}
};
impl Msp430InlineAsmReg {
pub fn name(self) -> &'static str {
match self {
Self::r5 => "r5",
Self::r6 => "r6",
Self::r7 => "r7",
Self::r8 => "r8",
Self::r9 => "r9",
Self::r10 => "r10",
Self::r11 => "r11",
Self::r12 => "r12",
Self::r13 => "r13",
Self::r14 => "r14",
Self::r15 => "r15",
}
}
pub fn reg_class(self) -> Msp430InlineAsmRegClass {
match self {
Self::r5 => Msp430InlineAsmRegClass::reg,
Self::r6 => Msp430InlineAsmRegClass::reg,
Self::r7 => Msp430InlineAsmRegClass::reg,
Self::r8 => Msp430InlineAsmRegClass::reg,
Self::r9 => Msp430InlineAsmRegClass::reg,
Self::r10 => Msp430InlineAsmRegClass::reg,
Self::r11 => Msp430InlineAsmRegClass::reg,
Self::r12 => Msp430InlineAsmRegClass::reg,
Self::r13 => Msp430InlineAsmRegClass::reg,
Self::r14 => Msp430InlineAsmRegClass::reg,
Self::r15 => Msp430InlineAsmRegClass::reg,
}
}
pub fn parse(name: &str) -> Result<Self, &'static str> {
match name {
"r5" => Ok(Self::r5),
"r6" => Ok(Self::r6),
"r7" => Ok(Self::r7),
"r8" => Ok(Self::r8),
"r9" => Ok(Self::r9),
"r10" => Ok(Self::r10),
"r11" => Ok(Self::r11),
"r12" => Ok(Self::r12),
"r13" => Ok(Self::r13),
"r14" => Ok(Self::r14),
"r15" => Ok(Self::r15),
"r0" | "pc" =>
Err("the program counter cannot be used as an operand for inline asm"),
"r1" | "sp" =>
Err("the stack pointer cannot be used as an operand for inline asm"),
"r2" | "sr" =>
Err("the status register cannot be used as an operand for inline asm"),
"r3" | "cg" =>
Err("the constant generator cannot be used as an operand for inline asm"),
"r4" | "fp" =>
Err("the frame pointer cannot be used as an operand for inline asm"),
_ => Err("unknown register"),
}
}
pub fn validate(self, _arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target, _is_clobber: bool)
-> Result<(), &'static str> {
match self {
Self::r5 => { Ok(()) }
Self::r6 => { Ok(()) }
Self::r7 => { Ok(()) }
Self::r8 => { Ok(()) }
Self::r9 => { Ok(()) }
Self::r10 => { Ok(()) }
Self::r11 => { Ok(()) }
Self::r12 => { Ok(()) }
Self::r13 => { Ok(()) }
Self::r14 => { Ok(()) }
Self::r15 => { Ok(()) }
}
}
}
pub(super) fn fill_reg_map(_arch: super::InlineAsmArch,
_reloc_model: crate::spec::RelocModel,
_target_features: &rustc_data_structures::fx::FxIndexSet<Symbol>,
_target: &crate::spec::Target,
_map:
&mut rustc_data_structures::fx::FxHashMap<super::InlineAsmRegClass,
rustc_data_structures::fx::FxIndexSet<super::InlineAsmReg>>) {
#[allow(unused_imports)]
use super::{InlineAsmReg, InlineAsmRegClass};
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r5));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r6));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r7));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r8));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r9));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r10));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r11));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r12));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r13));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r14));
}
}
if true {
if let Some(set) =
_map.get_mut(&InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg))
{
set.insert(InlineAsmReg::Msp430(Msp430InlineAsmReg::r15));
}
}
}def_regs! {
47 Msp430 Msp430InlineAsmReg Msp430InlineAsmRegClass {
48 r5: reg = ["r5"],
49 r6: reg = ["r6"],
50 r7: reg = ["r7"],
51 r8: reg = ["r8"],
52 r9: reg = ["r9"],
53 r10: reg = ["r10"],
54 r11: reg = ["r11"],
55 r12: reg = ["r12"],
56 r13: reg = ["r13"],
57 r14: reg = ["r14"],
58 r15: reg = ["r15"],
59
60 #error = ["r0", "pc"] =>
61 "the program counter cannot be used as an operand for inline asm",
62 #error = ["r1", "sp"] =>
63 "the stack pointer cannot be used as an operand for inline asm",
64 #error = ["r2", "sr"] =>
65 "the status register cannot be used as an operand for inline asm",
66 #error = ["r3", "cg"] =>
67 "the constant generator cannot be used as an operand for inline asm",
68 #error = ["r4", "fp"] =>
69 "the frame pointer cannot be used as an operand for inline asm",
70 }
71}
72
73impl Msp430InlineAsmReg {
74 pub fn emit(
75 self,
76 out: &mut dyn fmt::Write,
77 _arch: InlineAsmArch,
78 _modifier: Option<char>,
79 ) -> fmt::Result {
80 out.write_str(self.name())
81 }
82}