core/stdarch/crates/core_arch/src/x86/
bmi2.rs

1//! Bit Manipulation Instruction (BMI) Set 2.0.
2//!
3//! The reference is [Intel 64 and IA-32 Architectures Software Developer's
4//! Manual Volume 2: Instruction Set Reference, A-Z][intel64_ref].
5//!
6//! [Wikipedia][wikipedia_bmi] provides a quick overview of the instructions
7//! available.
8//!
9//! [intel64_ref]: https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
10//! [wikipedia_bmi]:
11//! https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29
12
13#[cfg(test)]
14use stdarch_test::assert_instr;
15
16/// Unsigned multiply without affecting flags.
17///
18/// Unsigned multiplication of `a` with `b` returning a pair `(lo, hi)` with
19/// the low half and the high half of the result.
20///
21/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mulx_u32)
22#[inline]
23// LLVM BUG (should be mulxl): https://bugs.llvm.org/show_bug.cgi?id=34232
24#[cfg_attr(all(test, target_arch = "x86_64"), assert_instr(imul))]
25#[cfg_attr(all(test, target_arch = "x86"), assert_instr(mul))]
26#[target_feature(enable = "bmi2")]
27#[stable(feature = "simd_x86", since = "1.27.0")]
28#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
29pub const fn _mulx_u32(a: u32, b: u32, hi: &mut u32) -> u32 {
30    let result: u64 = (a as u64) * (b as u64);
31    *hi = (result >> 32) as u32;
32    result as u32
33}
34
35/// Zeroes higher bits of `a` >= `index`.
36///
37/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_bzhi_u32)
38#[inline]
39#[target_feature(enable = "bmi2")]
40#[cfg_attr(test, assert_instr(bzhi))]
41#[stable(feature = "simd_x86", since = "1.27.0")]
42pub fn _bzhi_u32(a: u32, index: u32) -> u32 {
43    unsafe { x86_bmi2_bzhi_32(a, index) }
44}
45
46/// Scatter contiguous low order bits of `a` to the result at the positions
47/// specified by the `mask`.
48///
49/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_pdep_u32)
50#[inline]
51#[target_feature(enable = "bmi2")]
52#[cfg_attr(test, assert_instr(pdep))]
53#[stable(feature = "simd_x86", since = "1.27.0")]
54pub fn _pdep_u32(a: u32, mask: u32) -> u32 {
55    unsafe { x86_bmi2_pdep_32(a, mask) }
56}
57
58/// Gathers the bits of `x` specified by the `mask` into the contiguous low
59/// order bit positions of the result.
60///
61/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_pext_u32)
62#[inline]
63#[target_feature(enable = "bmi2")]
64#[cfg_attr(test, assert_instr(pext))]
65#[stable(feature = "simd_x86", since = "1.27.0")]
66pub fn _pext_u32(a: u32, mask: u32) -> u32 {
67    unsafe { x86_bmi2_pext_32(a, mask) }
68}
69
70unsafe extern "C" {
71    #[link_name = "llvm.x86.bmi.bzhi.32"]
72    fn x86_bmi2_bzhi_32(x: u32, y: u32) -> u32;
73    #[link_name = "llvm.x86.bmi.pdep.32"]
74    fn x86_bmi2_pdep_32(x: u32, y: u32) -> u32;
75    #[link_name = "llvm.x86.bmi.pext.32"]
76    fn x86_bmi2_pext_32(x: u32, y: u32) -> u32;
77}
78
79#[cfg(test)]
80mod tests {
81    use crate::core_arch::assert_eq_const as assert_eq;
82    use stdarch_test::simd_test;
83
84    use crate::core_arch::x86::*;
85
86    #[simd_test(enable = "bmi2")]
87    fn test_pext_u32() {
88        let n = 0b1011_1110_1001_0011u32;
89
90        let m0 = 0b0110_0011_1000_0101u32;
91        let s0 = 0b0000_0000_0011_0101u32;
92
93        let m1 = 0b1110_1011_1110_1111u32;
94        let s1 = 0b0001_0111_0100_0011u32;
95
96        assert_eq!(_pext_u32(n, m0), s0);
97        assert_eq!(_pext_u32(n, m1), s1);
98    }
99
100    #[simd_test(enable = "bmi2")]
101    fn test_pdep_u32() {
102        let n = 0b1011_1110_1001_0011u32;
103
104        let m0 = 0b0110_0011_1000_0101u32;
105        let s0 = 0b0000_0010_0000_0101u32;
106
107        let m1 = 0b1110_1011_1110_1111u32;
108        let s1 = 0b1110_1001_0010_0011u32;
109
110        assert_eq!(_pdep_u32(n, m0), s0);
111        assert_eq!(_pdep_u32(n, m1), s1);
112    }
113
114    #[simd_test(enable = "bmi2")]
115    fn test_bzhi_u32() {
116        let n = 0b1111_0010u32;
117        let s = 0b0001_0010u32;
118        assert_eq!(_bzhi_u32(n, 5), s);
119    }
120
121    #[simd_test(enable = "bmi2")]
122    const fn test_mulx_u32() {
123        let a: u32 = 4_294_967_200;
124        let b: u32 = 2;
125        let mut hi = 0;
126        let lo = _mulx_u32(a, b, &mut hi);
127        /*
128        result = 8589934400
129               = 0b0001_1111_1111_1111_1111_1111_1111_0100_0000u64
130                   ^~hi ^~lo~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
131                */
132        assert_eq!(lo, 0b1111_1111_1111_1111_1111_1111_0100_0000u32);
133        assert_eq!(hi, 0b0001u32);
134    }
135}
core/stdarch/crates/core_arch/src/x86/bmi2.rs

core/stdarch/crates/core_arch/src/x86/
bmi2.rs
